You will work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineers, process/reliability specialists, ATE engineers, and operations in a dynamic and high-energy work environment to bring industry-defining products to market.

Your responsibilities will include:

• Collaborating with cross-functional teams to craft essential next-generation product features that are important for performance, power optimization, and power management.
• Collaborating to craft tools for post-silicon work, build post-silicon methodologies to characterize silicon power, correlate silicon behavior with simulation.
• Working with various Arch & Design teams to come up with test plans of new features.
• Collaborating with other validation & bring-up teams to bring up/characterize silicon power and power saving features.
• Working with design & estimation teams to correlate with pre-silicon expectation, work with HW and SW teams to do the vital tuning and optimization of silicon power.
• Developing power consumption models to be used in binning, productization, and customer application notes, characterize and develop various power control mechanisms together with Arch/Design/SW teams.

We need to see:

• B. Tech or M. Tech in Electronics Engineering stream, with 3+ years related work experience, excellent problem-solving, collaborative, and interpersonal skills.
• Strong understanding of aspects related to silicon power and performance, technology node impacts, Hardware and Software interactions at system level.
• Hands-on experience with silicon bring up, validation, and productization, good knowledge in board and system design considerations, Power supply design.
• Very good problem-solving and hardware debugging skills, very good data analysis and logical reasoning skills.
• Strong familiarity with HW lab environment and understanding of various lab equipment.
• Experience in working with windows. Linux exposure is highly preferred.
• Working experience with scripting languages like perl and/or python is a plus point.
• Must be a great teammate and ready to collaborate with global teams from diverse cultural backgrounds in a high-energy environment.
• Exposure to critical path analysis, power analysis, process technologies, transistor/device physics, silicon reliability, and aging mechanisms.
• Background with power supply and substrate noise analysis and mitigation. Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software applications.

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