Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

Job Description

As a Principal STA Engineer, you will be responsible for owning full-chip and block-level STA sign-off across all PVT corners and operational modes. You will drive timing closure from synthesis through place-and-route to tapeout, ensuring first-pass silicon success.

Responsibilities

• Owning full-chip and block-level STA sign-off across all PVT corners and operational modes.
• Driving timing closure from synthesis through place-and-route to tapeout, ensuring first-pass silicon success.
• Analyzing and resolving setup/hold violations, noise, signal integrity (SI), OCV, and derates.
• Defining and validating timing margins, guard-bands, and sign-off criteria for advanced node designs.
• Managing complexities at 7nm, 5nm, and 3nm nodes, including variation-aware timing (AOCV/POCV), crosstalk, and clock distribution.
• Developing and reviewing SDC constraints (clocks, IO delays, exceptions) for MCMM designs.
• Building scalable timing methodologies and driving constraint validation and consistency across teams.
• Utilizing STA tools (Primetime, Tempus) and scripting (Tcl/Python) for automation and flow efficiency.
• Leading timing reviews and sign-off meetings with cross-functional stakeholders.

The Impact You Will Have

• Ensuring successful tapeouts and robust silicon performance at advanced technology nodes.
• Driving innovation in timing sign-off methodologies, influencing industry standards and best practices.
• Reducing time-to-market by achieving efficient timing closure and minimizing design iterations.
• Enhancing cross-functional collaboration and knowledge sharing within Synopsys engineering teams.
• Mentoring and developing junior engineers, building a stronger and more resilient team.
• Contributing to architectural decisions that improve timing convergence and silicon reliability.
• Streamlining timing analysis workflows through automation, improving productivity and accuracy.

What You’ll Need

• B.Eng, or MS in Electrical Engineering or a related field.
• 10–15+ years of experience in STA and timing sign-off for SoCs.
• Proven record of successful tapeouts in advanced nodes (7nm, 5nm, 3nm).
• Expertise in STA tools (Primetime, Tempus) and scripting languages (Tcl, Python, Perl).
• Deep understanding of EM/IR and reliability impacts on timing.
• Experience with full-chip integration and hierarchical STA methodologies.
• Ability to develop scalable timing methodologies for MCMM designs.

Who You Are

• Technical leader and mentor, passionate about knowledge sharing.
• Collaborative communicator, able to lead cross-functional teams and drive consensus.
• Detail-oriented and analytical, with a relentless focus on quality and accuracy.
• Innovative thinker, eager to explore new approaches and technologies.
• Adaptable, capable of navigating fast-paced and evolving engineering environments.
• Confident decision-maker, able to advocate for best practices and influence architectural choices.

The Team You’ll Be A Part Of

You will join a dynamic, highly skilled SOC engineering team dedicated to delivering world-class silicon solutions at the forefront of semiconductor technology.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

• Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• Time Away

In addition to company holidays, we have ETO and FTO Programs.

• Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• Retirement Plans

Save for your future with our retirement plans that vary by region and country.

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