At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a highly experienced architect with a strong background in memory PHYs and power modeling, ready to lead innovation in efficient silicon solutions. With 15+ years in engineering and a BSEE/MSEE, you bring expertise with industry-standard tools,including Power Artist and PTPX,a collaborative spirit, and a passion for mentoring teams and delivering outstanding results.

What You’ll Be Doing:

• Designing and developing power-efficient memory PHY architectures.
• Driving the creation and optimization of effective power models for memory subsystems.
• Taking responsibility for project outcomes and ensuring high-quality deliverables.
• Utilizing tools such as Power Artist and PTPX for power analysis and optimization.
• Collaborating closely with large cross-functional teams,including engineering, product management, and customers,to align requirements and integration.
• Mentoring engineers and sharing best practices.
• Evaluating new technologies or architectural improvements.
• Supporting IP integration and validation efforts.

The Impact You Will Have:

• Advance Synopsys’ leadership in memory PHY innovation.
• Drive efficient power modeling practices that enhance product performance and competitiveness.
• Take ownership of outcomes, ensuring projects meet and exceed expectations.
• Shape future technology and product direction.
• Support robust, scalable architectures.
• Foster a collaborative and inclusive team culture across large, multidisciplinary groups.
• Deliver solutions trusted by leading semiconductor companies.

What You’ll Need:

• 15+ years in memory PHY architecture and power modeling.
• Expertise with industry-standard design and simulation tools, including Power Artist and PTPX.
• Proven experience driving efficient power models and taking responsibility for outcomes.
• BSEE/MSEE required.
• Strong analytical and communication skills.
• Strong digital and/or analog design skills
• Ability to work effectively with large cross-functional teams.

Who You Are:

• Strategic, collaborative, and detail-oriented.
• Inclusive leader and effective communicator.
• Adaptable and innovative problem-solver.
• Accountable and results-driven.

The Team You’ll Be A Part Of:

Join a diverse, expert engineering group focused on power-optimized memory PHY IP for next-generation silicon platforms. You will collaborate with a large cross-functional team to drive innovation and ensure successful outcomes.

Rewards and Benefits:

We offer comprehensive health, wellness, and financial benefits. Your recruiter will provide more details during the hiring process.

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