We are seeking an experienced and visionary ASIC Digital Architect to join our team. As a key member of our design team, you will be responsible for defining and developing ASIC RTL design and verification at both chip and block levels. You will create and execute design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols. You will collaborate with cross-functional teams to ensure seamless integration and functionality of designs. You will utilize advanced design and verification methodologies and tools to achieve high-quality results. You will mentor and guide junior engineers, promoting best practices, and fostering a culture of continuous improvement. You will communicate with internal and external stakeholders to align on project goals and deliverables.
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