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YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_09715a53-2f9"},"title":"Analog Design Engineer, Sr Staff","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.</p>\n<p>In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ &amp; PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&amp;D team developing high speed (&gt;200Gbps) analog integrated circuits in the latest FinFET process nodes.</p>\n<p><strong>Responsibilities:</strong></p>\n<ul>\n<li>Reviewing SerDes standards and architecture documents to develop comprehensive analog sub-block specifications.</li>\n<li>Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.</li>\n<li>Proposing and executing design and verification strategies that leverage advanced simulator features for highest-quality design outcomes.</li>\n<li>Overseeing physical layout to minimize parasitic effects, device stress, and process variation, ensuring robust silicon performance.</li>\n<li>Collaborating closely with digital RTL engineers to develop calibration, adaptation, and control algorithms for analog circuits.</li>\n<li>Presenting simulation data for peer and customer reviews, effectively communicating design decisions and results.</li>\n<li>Mentoring and reviewing the progress of junior engineers, fostering a high-performance team environment.</li>\n<li>Documenting design features, test plans, and methodologies to ensure traceability and reproducibility.</li>\n<li>Consulting on the electrical characterization of analog circuits within the SerDes IP product portfolio.</li>\n</ul>\n<p><strong>Impact:</strong></p>\n<ul>\n<li>Drive the development of industry-leading SerDes solutions that enable next-generation high-speed communication interfaces.</li>\n<li>Enhance product competitiveness by delivering robust, low-power, and high-performance analog blocks for global customers.</li>\n<li>Accelerate time-to-market by proposing efficient design and verification strategies that streamline development cycles.</li>\n<li>Champion best practices in layout and design for reliability, contributing to high-yield and manufacturable solutions.</li>\n<li>Advance the technical expertise of the broader team through mentorship and technical leadership.</li>\n<li>Strengthen customer trust by delivering well-documented, silicon-proven solutions and providing expert technical support.</li>\n<li>Contribute to the continuous evolution of Synopsys’ analog and mixed-signal IP portfolio, ensuring ongoing leadership in the semiconductor industry.</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>BS/BTech degree and 8+ years of experience in IC design, or MS/MTech/PhD with 6+ years of experience.</li>\n<li>In-depth familiarity with transistor-level circuit design and solid CMOS fundamentals.</li>\n<li>Silicon-proven experience implementing circuits for TX, RX, and Clock paths within SerDes architectures.</li>\n<li>Detailed design experience with several of the following: receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillators, phase interpolators, DLLs, PLLs, bandgap references, ADCs, and DACs.</li>\n<li>Expertise in optimizing FinFET CMOS layout to minimize parasitic effects and local device mismatch.</li>\n<li>Awareness of ESD issues and design for reliability, including electromigration, IR-drop, and aging.</li>\n<li>Experience using EDA tools for schematic entry, physical layout, and design verification.</li>\n<li>Strong knowledge of SPICE simulators and simulation methodologies.</li>\n<li>Proficiency in Verilog-A for analog behavioral modeling and simulation control/data capture.</li>\n<li>Programming experience in TCL, Perl, C, Python, or MATLAB.</li>\n</ul>\n<p><strong>Team:</strong> You will join a high-impact analog/mixed-signal design team renowned for delivering state-of-the-art SerDes IP solutions. The team’s focus is on innovation, quality, and collaboration, working closely with digital design, layout, verification, and product engineering teams.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_09715a53-2f9","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/analog-design-engineer-sr-staff/44408/93685544224?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["SerDes","high-speed analog circuit design","FinFET CMOS layout","transistor-level circuit design","solid CMOS fundamentals","SPICE simulators","simulation methodologies","Verilog-A","analog behavioral modeling","TCL","Perl","C","Python","MATLAB"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:22.529Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"SerDes, high-speed analog circuit design, FinFET CMOS layout, transistor-level circuit design, solid CMOS fundamentals, SPICE simulators, simulation methodologies, Verilog-A, analog behavioral modeling, TCL, Perl, C, Python, MATLAB"}]}