As a Sr. Staff Engineer, you will be a key member of our Emulation/Validation team, responsible for bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.

Key responsibilities include:

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.
• Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.
• Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.

The impact you will have includes enhancing cross-functional collaboration to elevate product quality and end-customer satisfaction, transforming the approach to Emulation IP usage in validating cutting-edge digital designs and system architectures, and driving innovation by defining and refining requirements for IP product development, particularly in emulation contexts.

To succeed in this role, you will need 8+ years of relevant experience in emulation, verification, or IP product development, expert-level knowledge of PCIe/ DDR/ Ethernet interfaces, including protocol and verification strategies, extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification, and a demonstrated track record in leading IP product development initiatives with a focus on emulation.

If you are a proactive and collaborative problem-solver with a passion for excellence, innovative thinker who embraces change and seeks out opportunities for continuous improvement, strong communicator able to articulate complex technical concepts to diverse audiences, resilient and adaptable, thriving in dynamic environments and embracing new challenges, and committed to mentoring others and fostering an inclusive, team-oriented culture, then we encourage you to apply for this exciting opportunity.

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Responsibilities:

• Collaborate with R&D architects and customers on hardware-assisted verification products.

• Drive all aspects of the technology life cycle, from development to product sign-off and customer deployment.

• Define test strategies and methodologies to improve ease-of-use, quality of results, and interoperability with other Synopsys tools.

• Become an expert in emulation and prototyping methodologies and flows, including design, partitioning, testing, synthesis, and simulation-based verification.

• Leverage your close interaction with customers, R&D, Marketing, and Sales teams to demonstrate the differentiated emulation/verification environment.

• Adapt to recognised best practices and policies in Synopsys to become proficient in various processes involved in the Product Release Cycle.

• Work with designs from varied verticals to enable and support key ZeBu products in early-stage development.

The Impact You Will Have:

• Enhance Synopsys' emulation and prototyping solutions by driving technology development and customer deployment.

• Improve the ease-of-use, quality of results, and interoperability of Synopsys tools, contributing to overall product excellence.

• Provide expert consultation for solving complex problems, thereby increasing customer satisfaction and product adoption.

• Ensure successful execution of projects from start to completion, contributing to the timely delivery of high-quality products.

• Support the advancement of cutting-edge designs in various verticals such as HPC, AI, storage, networking, and automotive.

• Facilitate the proliferation of Synopsys' differentiated emulation/verification environment through close collaboration with multiple teams.

What You’ll Need:

• BSEE/MS with 7+ years of related experience.

• Expertise in Emulation and/or Prototyping flows, systems, and methodologies.

• Strong proficiency in Verilog, System Verilog, and VHDL.

• Understanding of verification concepts and experience with functional simulators.

• Experience with scripting languages.

• Knowledge in Simulation flows, Assertion, DPI, and Transactors.

• Complex problem-solving and debugging skills.

• Strong communication skills and the ability to interact with customers and peers.

• Knowledge in synthesis and timing analysis concepts (preferred).

• Familiarity with Synopsys solutions and tools like ZeBu, HAPS, VCS, Verdi, Proto Compiler, Synplify, DC, and Formality (preferred).

• Experience with Xilinx & Altera architecture and toolchains (preferred).

• Understanding of SW/HW debug methodologies and experience with standard SW/HW debug tools (preferred).

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Defining, validating, and enabling complex multi-rack FPGA-based systems to support cutting-edge hardware development.
• Developing and optimizing RTL code for Xilinx UltraScale, UltraScale+, and Versal FPGAs to ensure maximum performance and reliability.
• Driving the development and integration of hardware emulation strategies on leading FPGA platforms such as Zebu and HAPS.
• Mapping RTL designs into FPGA environments, utilizing deep verification and implementation knowledge to facilitate smooth prototyping and validation.
• Generating and packaging diagnostic tests for both production and field use, ensuring robust system performance and rapid troubleshooting.

As a Staff Hardware Engineer, you will work closely with cross-functional teams to accelerate the development of next-generation technologies through advanced FPGA design and integration. You will strengthen team productivity and knowledge by actively collaborating, mentoring, and sharing expertise with colleagues.

Requirements include:

• BS/MS in Computer Science, Electrical Engineering, or a related field.
• 5+ years of hands-on experience in RTL design and verification, preferably with complex FPGA systems.
• Proficiency in Hardware Description Languages such as VERILOG, VHDL, or SystemVerilog.
• Expertise in using industry-standard EDA tools and methodologies for design and verification.
• Hands-on experience with FPGA flows and tools like Vivado, and familiarity with Unix/Linux environments.
• Experience with scripting languages (Shell, Perl, Python, TCL) for automation and productivity enhancement.
• Background in HDL simulation, emulation, and prototyping platforms (e.g., Zebu, HAPS).
• Strong logical thinking and problem-solving abilities, with a keen attention to detail.

Benefits include:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

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You will report key metrics and drive continuous improvement initiatives in Emulation IP quality and performance.

You will provide technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.

You will stay ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.

You will review and validate test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

You will collaborate cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.

You will mentor and guide junior engineers, fostering a culture of innovation and continuous improvement.

This role requires 10-20 years of relevant experience in emulation, verification, or IP product development.

You should have expert-level knowledge of PCIe and DDR interfaces, including protocol and verification strategies.

You should have extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

You should have demonstrated track record in leading IP product development initiatives with a focus on emulation.

You should have strong background in cross-functional collaboration, with an ability to drive consensus and deliver results.

You should have outstanding communication skills, with the ability to influence and inspire change across diverse teams.

You should be adaptable and comfortable working in a fast-paced, matrixed, and international environment.

As a proactive and collaborative problem-solver with a passion for excellence, you will be a strong fit for this role.

You will join a dynamic, high-performing engineering team focused on IP development, emulation, and verification at the forefront of semiconductor innovation.

Our team is collaborative, cross-functional, and globally distributed, working together to solve complex challenges and deliver industry-leading solutions.

You will have the opportunity to collaborate with experts across multiple domains, drive impactful initiatives, and shape the future of digital design and verification at Synopsys.

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Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15159

Remote Eligible

No

Date Posted

02/04/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an enthusiastic and detail-oriented SoC RTL Performance Verification Engineer with a passion for developing and deploying verification solutions for System on Chip (SoC) designs. With a strong background in RTL hardware design and verification, you excel in using industry-standard languages like Verilog and SystemVerilog. Your expertise in developing ZeBu emulation-based verification IP (transactor) and solutions makes you a valuable asset to any team. You thrive in dynamic environments, tackling complex problems creatively while adhering to company policies and procedures. Your communication skills are exemplary, allowing you to work effectively with both internal teams and external clients. With a deep understanding of protocols like AMBA AXI/CHI and proficiency in UNIX and scripting, you bring a comprehensive skill set to the table, ready to make an impact in the rapidly evolving field of SoC performance verification.

What You’ll Be Doing:

• Developing SoC Performance Validation (PV) flow and components (transactor model and CI/CD automation) on ZeBu emulator.

• Creating emulation-based transactor and solutions using SystemVerilog and C++.

• Providing technical support and guidance to customers during the deployment of the ZeBu emulator.

The Impact You Will Have:

• Ensuring the reliability and performance of customer SoC designs through rigorous validation processes.

• Enhancing the capabilities of the ZeBu emulator transactor to meet evolving industry standards and customer needs.

• Contributing to the development of innovative SoC PV solutions that set Synopsys apart from competitors.

• Supporting customers in achieving their design and performance goals, thereby strengthening Synopsys' market position.

• Driving continuous improvement in SoC PV methodologies, leading to more efficient and effective processes.

• Fostering collaboration and knowledge sharing within the team, enhancing overall performance and innovation.

What You’ll Need:

• Bachelor's degree in Electrical Engineering or a related field (RTL design/verification) with a minimum of 12+ years of experience.

• A solid understanding of the SoC architecture among HW IPs, AMBA system buses, and LPDDR memory controllers in a mobile AP.

• Proficiency in developing emulation-based transactor models and solutions using SystemVerilog and C++.

• Proficiency with UNIX and scripting.

The Team You’ll Be A Part Of:

You will be part of a dynamic and innovative team focused on developing and deploying cutting-edge verification solutions for SoC designs. The team values collaboration, continuous learning, and a commitment to excellence, working together to drive technological advancements and deliver exceptional results for our customers.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.

What you need

• 8+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe or DDR interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

XML job scraping automation by YubHub

What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

What you need

• 8+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR/ Ethernet interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

XML job scraping automation by YubHub

What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

What you need

• 15+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR / Ethernet interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

XML job scraping automation by YubHub

What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.

What you need

• 15+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR / Ethernet interfaces, including protocol and verification strategies.

XML job scraping automation by YubHub

What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.
• Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.
• Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.

What you need

• 8+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe or DDR interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.
• Demonstrated track record in leading IP product development initiatives with a focus on emulation.
• Strong background in cross-functional collaboration, with an ability to drive consensus and deliver results.
• Outstanding communication skills, with the ability to influence and inspire change across diverse teams.
• Adaptability and comfort working in a fast-paced, matrixed, and international environment.

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