In this role, you will work broadly with verification and validation of Onboard Chargers (OBC) within various customer projects. You will be an important part of our technical deliveries and work closely with both internal teams and external partners to ensure that our solutions meet the highest quality standards.

The work covers the entire chain of test and validation activities – from requirement review and breakdown into test plans, to the execution of functional tests, system tests, and various environmental and climate validations. You will work both in lab environments, climate chambers, and in the field, contributing to the development of test methods, test environments, and automated tests.

A central part of the role is analysing test results, identifying deviations and improvement opportunities, and compiling reports to present your recommendations to both technical teams and project organisations. You will collaborate cross-functionally with several areas of expertise, often taking on a coordinating role in many of the assignments.

This role is suitable for someone who wants to combine hands-on testing, technical analysis, and collaboration in an environment where new projects and technological solutions are constantly evolving.

Requirements

• At least 4 years of experience in software testing related to OBC
• Bachelor’s degree or higher in a technical field such as Engineering Physics, Vehicle Engineering, Software Engineering, or equivalent
• Experience in breaking down requirements into a test plan
• Good knowledge of measurement systems and sensors for software testing
• Programming skills in C/C++ or Python
• Experience with communication protocols such as CAN, CANalyser, CANoe, or FlexRay
• HIL experience with systems such as dSpace or ETAS
• Experience working with tools such as INCA, MDA, and MATLAB/Simulink
• Knowledge of standards such as ISO15118, ISO61851, ISO18246
• Category B driving licence
• Communicates fluently in Swedish and English

Preferred Qualifications

• Experience in coordinating roles or cross-functional work
• Background in electrification or E-mobility

About You

To thrive and succeed in this role, we believe you have an analytical and structured working style, with the ability to break down complex technical questions and create clarity in both processes and test methodology. You take initiative, work independently, and take responsibility for moving your work forward, while also valuing collaboration and contributing actively to the team’s shared goals.

Since the role involves frequent contact with both colleagues and customers, you are communicative, relationship-oriented, and confident in presenting technical results in a way that is easy to understand. You are a natural problem solver who enjoys a hands-on environment where you can test, analyse, and improve – and you see opportunities even when challenges arise.

We also believe you have a strong desire to develop and stay updated on new technologies. You thrive in a dynamic environment where priorities may shift and have the ability to maintain focus and structure even when multiple tasks are running in parallel.

What We Offer

At AVL, you become part of a global technology company at the forefront of development, simulation, and testing within the future of mobility. As the world’s largest independent player in the field, with over 12,000 employees internationally, we drive innovation for a greener, safer, and better world of mobility.

Our focus spans the entire value chain – from early concept phases to industrialization and series production. We work with advanced technologies in electrification, software, autonomous driving, digitalization, and energy-efficient drivetrains, helping our customers shape the mobility solutions of the future.

With us, you will have a workplace where you can grow, influence, and help drive technological development forward – making a real difference for the mobility of tomorrow.

Interested?

In this recruitment process, we apply continuous selection. The process may move quickly, and the position may be filled before the final application date.

We look forward to receiving your application!

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Your responsibilities will include:

• Verifying and validating OBC systems through various testing activities, including functional testing, system testing, and environmental testing
• Collaborating with cross-functional teams to identify and resolve issues related to OBC systems
• Developing and maintaining test plans, test cases, and test scripts
• Analyzing test results and identifying areas for improvement
• Presenting findings and recommendations to technical teams and project organizations

To succeed in this role, you should have:

• At least 4 years of experience in software testing related to OBC
• A degree in a technical field, such as engineering physics, vehicle engineering, software engineering, or a related field
• Experience with requirement analysis and test planning
• Good knowledge of measurement systems and sensors for software testing
• Programming skills in C/C++ or Python
• Experience with communication protocols such as CAN, CANalyser, CANoe, or FlexRay
• HIL experience with systems such as dSpace or ETAS
• Experience with tools such as INCA, MDA, and MATLAB/Simulink
• Knowledge of standards such as ISO15118, ISO61851, and ISO18246
• A valid driver's license
• Excellent communication skills in Swedish and English

Preferred qualifications include:

• Experience in coordinating roles or cross-functional work
• Background in electrification or e-mobility

If you are a motivated and detail-oriented individual who enjoys working in a fast-paced environment, we encourage you to apply for this exciting opportunity.

At AVL, we offer a competitive salary and benefits package, as well as opportunities for professional growth and development. We are an equal opportunities employer and welcome applications from diverse candidates.

To apply, please submit your resume and cover letter through our website. We look forward to hearing from you!

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In this role, you will have the opportunity to work with advanced tools such as SystemWeaver, DOORS, and Elektra, and you will be able to analyze functions using MATLAB/Simulink. You will also participate in verification and validation activities, and you will ensure that development processes follow quality frameworks such as Automotive SPICE and CMMI.

As a Functional Safety Engineer at AVL, you will be part of a global team that is dedicated to providing innovative solutions for the automotive industry. You will have the opportunity to work on exciting projects, and you will be able to contribute to the development of new technologies and products.

We are looking for a highly motivated and experienced individual who has a strong background in functional safety and automotive engineering. You should have a solid understanding of ISO 26262 and experience with tools such as SystemWeaver, DOORS, and Elektra. You should also be proficient in MATLAB/Simulink and have experience with verification and validation activities.

If you are a motivated and experienced individual who is passionate about functional safety and automotive engineering, we encourage you to apply for this exciting opportunity.

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Your main responsibilities will include:

• Validating and verifying the BEV energy system to ensure it meets the required specifications and standards
• Collaborating with cross-functional teams to develop and test new technologies and features
• Analyzing data and identifying areas for improvement
• Developing and implementing test plans and procedures
• Collaborating with suppliers and partners to ensure compliance with regulatory requirements

We offer a dynamic and innovative work environment with opportunities for professional growth and development. Our team is passionate about creating high-performance electric vehicles that exceed customer expectations.

If you are a motivated and detail-oriented individual with a passion for electric vehicle technology, we encourage you to apply for this exciting opportunity.

Duration: 5-6 months Start date: Flexible Location: Weissach, Germany Language: English Salary: Competitive salary and benefits package Required skills:

• Bachelor's degree in Mechanical Engineering, Electrical Engineering, Mechatronics, or related field
• Experience with validation and verification of electric vehicle systems
• Strong analytical and problem-solving skills
• Excellent communication and collaboration skills
• Experience with data analysis and interpretation
• Familiarity with regulatory requirements and industry standards
• Proficiency in Microsoft Office and other software tools
• Ability to work in a fast-paced environment and prioritize tasks effectively

Preferred skills:

• Experience with simulation tools and modeling software
• Familiarity with programming languages such as Python or C++
• Experience with data visualization tools and techniques
• Knowledge of electric vehicle safety and security standards
• Familiarity with agile development methodologies
• Experience with version control systems such as Git

If you are a motivated and detail-oriented individual with a passion for electric vehicle technology, we encourage you to apply for this exciting opportunity.

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You will take ownership of managing User Verification backlogs efficiently, finding gaps in our processes and proposing fixes that boost our operational efficiency, and supporting and motivating your team to reach their KPIs and grow professionally.

To thrive in this environment, you will need to have great empathy and high emotional intelligence, be a structured thinker who can make decisions independently and confidently, and be tenacious and relentless in your pursuit of excellence.

In addition, you will need to have proven skills in leading a team of User Verification Agents, a good knowledge of performance management and coaching, and a deep understanding of KYC, KYB, and EDD.

As a bonus, you will enjoy a hybrid setup with 2 days remote and 3 days in-office weekly, a MacBook, delicious lunches, private health insurance, and a monthly contribution to your phone and internet bills.

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Key responsibilities include:

• Scaling the decision-making process for tools for the tvScientific AI team, from our workflows to our training infrastructure to our Kubernetes deployments
• Improving the developer experience for the data science team
• Upgrading our observability tooling
• Serving as a technical lead and mentor to the team
• Making every deployment smooth as our infrastructure evolves

Requirements include:

• Deep understanding of Linux
• Excellent writing skills
• A systems-oriented mindset
• Experience in high-performance software (RTB, HFT, etc.)
• Software engineering experience + reliability (e.g. CI/CD) expertise
• Strong observability instincts
• Demonstrated ability to use AI to improve speed and quality in your day-to-day workflow for relevant outputs
• Strong track record of critical evaluation and verification of AI-assisted work (e.g., testing, source-checking, data validation, peer review)
• High integrity and ownership: you protect sensitive data, avoid over-reliance on AI, and remain accountable for final decisions and deliverables

Nice-to-haves include:

• Reverse-engineering experience
• Terraform, EKS, or MLOps experience
• Python, Scala, or Zig experience
• NixOS experience
• Adtech or CTV experience
• Experience deploying a distributed system across multiple clouds
• Experience in hard real-time low-latency

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The vendors and partners you'll manage span verification, threat intelligence, process outsourcing, capability evaluation, civil society consultation, and research collaboration. You'll build repeatable processes where they're needed while staying nimble enough to handle novel partnership structures, like research collaborations, civil society consultations, and model red-teaming engagements that don't fit neatly into standard procurement workflows.

You'll work closely with legal, procurement, finance, and engineering teams, and you'll be the person who knows where every Safeguards contract stands, what we're spending, and where we should consider a change.

This is a role for someone who's comfortable operating across commercial, legal, and technical contexts in a fast-moving environment , someone who can negotiate contract terms, work with legal teams to redline contracts, set up model access for a research partner, and handle a vendor performance issue in one day.

*Important context for this role: In this position you may be exposed to and engage with explicit content spanning a range of topics, including those of a sexual, violent, or psychologically disturbing nature.

Responsibilities:

Vendor Selection & Onboarding - Understand the broad vendor landscape for Safeguards and drive vendor selection processes with expert input, factoring in tradeoffs between capability, price, and internal resources across categories including verification, threat intelligence, process outsourcing, and capability evaluation

Conduct vendor due diligence and coordinate security and data governance reviews for vendors handling sensitive model access or content

Forecast future partnership needs and proactively research vendors and partners that could meet emerging Safeguards requirements

Contract & Budget Management - Manage contracts across the Safeguards vendor and partner portfolio, working with legal and procurement teams on contract redlining, negotiation, and execution

Work with legal teams and potential research partners to develop novel agreements for research collaboration, civil society consultation, and model red-teaming

Handle invoicing, payment, and renewal processes with partners

Own Safeguards vendor budget tracking and planning in partnership with finance teams, maintaining a clear picture of current spend and forecasting future needs

Ongoing Vendor & Partner Management - Manage vendor and researcher access to models and products during testing phases and trials

Oversee and monitor vendor performance and usage, flagging issues and resolving concerns and disputes as they arise

Report on vendor performance, spend, and contract status to Safeguards leadership

You may be a good fit if you have:

5+ years in vendor management, procurement, or contract operations, ideally in risk, fraud, compliance, or trust & safety contexts at a technology company

Demonstrated experience reviewing and negotiating contracts, including comfort with redlining and working alongside legal counsel

Track record managing vendor budgets, including forecasting, tracking spend, and making tradeoff recommendations

Understanding of AI safety, account abuse, or platform integrity issues , you know what verification vendors, threat intelligence providers, and content screening tools actually do

Experience onboarding vendors and standing up new vendor relationships from scratch, not just managing existing ones

Strong cross-functional collaboration skills, particularly with legal, procurement, finance, and engineering teams

Comfort with ambiguity and fast-moving environments , you've built or significantly improved vendor management processes, not just inherited them

Nice to have:

Experience in AI safety or AI-adjacent vendor ecosystems

Familiarity with procurement tools such as Ironclad or Zip

Annual compensation range for this role is $245,000-$285,000 USD

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You will work on a new aircraft development project, bringing pragmatic SEIT thinking to deeply understand local requirements and champion 'Test' as a design tool to drive rapid capability development, ensuring that end-user needs are met in challenging operational environments.

Key Responsibilities:

• Work with customers and end-users to evolve the regional Concept of Operations (CONOPS) the product life cycle, developing inputs to high-level requirements informing key design decisions.

• Deploy right-sized, Agile Systems Engineering governance approaches for rapid capability development efforts - with the right amount of process discipline and artifacts and support System Design Reviews (SDRs).

• Manage System Interfaces and develop integration processes for sovereign Mission System equipment and Payloads, developing test objectives and test plans for execution.

• Work with partner organisations to coordinate a broad range of in-country development activities including bench and environmental testing of individual components, building and operating Hardware In Lab (HIL)/Hardware In The Loop (HITL) integration environments, flight testing of uncrewed and crewed surrogate platforms, and ground and flight test of the Omen System.

• Liaise with partner organisations and local authorities to secure operational approvals (airspace, frequency, physical deconfliction, safety, and appropriate test range facilities).

• Shape, build and utilise Anduril in-country development facilities establishing local capability.

• Plan, coordinate and execute major test and demonstration events, including resourcing, logistics (equipment export/import), conduct Test Readiness Reviews (TRRs), perform as Test Director (TD), and ensure high-impact, timely reporting.

• Conduct safety assessments with a pragmatic understanding of hazards and mitigations - holding the safety of team members above all else.

Requirements:

• Bachelor degree or higher in Aerospace Engineering, Systems Engineering or aviation-related technical discipline.

• 10+ years of experience in Aerospace or product development/test and evaluation environments and aviation safety/quality systems.

• Demonstrable Systems Engineering proficiency, with first-hand understanding of both the benefits and limitations of the approach.

• Experience in all facets of the test process including writing test plans and procedures, conducting risk assessments, mitigating hazards, running test readiness reviews, directing test events, and responding to unplanned occurrences.

• Familiarity engaging with interdisciplinary design teams to evolve test requirements.

• Able to work with stakeholders and partners to find solutions and approach to drive fast test outcomes.

• Exposure to verification and validation testing, qualification, certification, airworthiness and obtaining permission to operate.

• Experience with ground and flight testing crewed or uncrewed developmental aircraft (Group 3 or larger) at the System/Platform level.

• Familiarity with airspace management in the Middle East and other regional regulatory practices desirable.

• Experience working in the Middle East and Arabic Language Proficiency advantageous.

Eligible to obtain and maintain a security clearance in United States, United Kingdom, or Australia.

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Working with industry partners, you will identify USA differentiated components and sub-manufacturers that would enable the creation of a broad portfolio of mission-specific compute solutions that would enable various platforms.

Key responsibilities include:

• Working with industry vendors and partners to source and design cutting-edge AI compute architectures, board-level solutions, and integrated systems.
• Collaborating with cross-functional engineering teams to design for our customers' requirements.
• Employing Model-Based Systems Engineering (MBSE) methodologies to effectively define interfaces between various system components within the architecture, ensuring seamless integration and streamlined development processes.
• Developing system architectures that encompass all critical components and subsystems, ensuring a holistic and integrated approach.
• Defining key capabilities and performance requirements of the hardware system, ensuring alignment with customer needs and industry standards.
• Decomposing system functionality into modular components, enabling efficient design and development processes.
• Leading thorough evaluations and making informed recommendations regarding potential external technology partnerships or vendors, leveraging their expertise when necessary to expedite hardware development processes.
• Leading comprehensive technical planning, system integration, verification and validation, cost and risk, as well as supportability and effectiveness analyses.
• Leading functional analysis, timeline analysis, detailed trade studies, requirements allocation, and interface definition studies to aid in translating customer requirements into hardware and software specifications.
• Providing oversight in conducting testing and validation of hardware designs, ensuring quality, reliability, and compliance with industry regulations and standards.
• Driving the product lifecycle from prototype to LRIP to FRP.

Requirements include:

• A Bachelor of Science degree in an engineering field AND 10 years of related professional/military experience in Computer Engineering, MBSE, Systems Engineering OR a Master's degree with 5 years of related professional/military experience.
• Previous experience working in hardware supply chain and manufacturing.
• Ability to set/manage customer and internal/external stakeholder expectations while also prioritizing key program initiatives (schedule, cost, quality, etc.).
• Strong understanding of various architecture frameworks (DoDAF, etc.), knowledge and understanding of interface control documents (ICDs).
• Experience with hardware verification, testing, and validation methodologies.
• Experience in data center server and/or personal computer manufacturing.
• Ability to obtain or have active DoD Top Secret Clearance with the ability to obtain SCI access, with a background investigation completed within the last 6 years or currently enrolled into Continuous Evaluation.

Salary range: $254,000-$336,000 USD.

Additional benefits include:

• Comprehensive medical, dental, and vision plans at little to no cost to you.
• Generous time off: Highly competitive PTO plans with a holiday hiatus in December.
• Caregiver & Wellness Leave is available to care for family members, bond with a new baby, or address your own medical needs.
• Family Planning & Parenting Support: Coverage for fertility treatments (e.g., IVF, preservation), adoption, and gestational carriers, along with resources to support you and your partner from planning to parenting.
• Mental Health Resources: Access free mental health resources 24/7, including therapy and life coaching.
• Professional Development: Annual reimbursement for professional development.
• Commuter Benefits: Company-funded commuter benefits based on your region.
• Relocation Assistance: Available depending on role eligibility.
• Retirement Savings Plan: Traditional 401(k), Roth, and after-tax (mega backdoor Roth) options.

Please note that Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information.

To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind:

• No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process.
• Please always verify communications:

Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency.

• Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage.
• What to Do If You Suspect Fraud: Should you encounter any questions or concerns about the legitimacy of an Anduril job opportunity, please reach out to contact@anduril.com.

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Responsibilities:

• Perform detailed configuration and programming of SEL protective relays (e.g., SEL-751, SEL-787, SEL-700G, etc.) using acSELerator QuickSet and SEL Grid Configurator.
• Develop and implement custom automation logic in SEL RTAC platforms using acSELerator Architect, IEC 61131-3 languages (Structured Text, Ladder Logic), and SEL Logic Engine.
• Design and test SCADA communication protocols including DNP3, Modbus, IEC 61850 GOOSE/MMS, and SEL protocols over Ethernet and serial interfaces.
• Conduct factory acceptance testing (FAT), site acceptance testing (SAT), relay setting validation, and end-to-end functional verification.
• Generate comprehensive documentation: one-line diagrams, logic diagrams, setting files, HMI screens, and commissioning reports.
• Provide technical support during system energization, troubleshooting, and post-commissioning maintenance.
• Collaborate with project managers, SCADA engineers, and field crews to ensure seamless integration and schedule compliance.
• Remain current with SEL firmware updates, NERC CIP cybersecurity requirements, and industry best practices.

Basic Qualifications:

• Advanced proficiency in acSELerator QuickSet, Architect, and RTAC Web Interface.
• Demonstrated ability to develop complex automation sequences, synchrophasor applications, and remedial action schemes.
• Expertise in relay event analysis using SEL SynchroWAVE and Event Reporter.
• Familiarity with IEC 61850 configuration via SCL files (SCD, ICD, CID).
• SEL Authorized Training (e.g., SEL-5030, SEL-5033) preferred; PE license a plus but not required.

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This role requires a seasoned professional with a proven track record of commanding manufacturing environments and fostering a culture of continuous improvement.

Key responsibilities include:

• Ensuring consistent, safe, and efficient production by leading initiatives to enhance product output and operational capabilities.

• Championing manufacturing optimization, driving cost reduction, quality improvement, productivity gains, and continuous improvement activities (including 5S) to boost utilization and uptime.

• Managing process capability and efficiency initiatives to reduce cycle times, increase yield, and prevent escapes.

• Championing cross-training and safety programs ensuring adherence to procedures, current training, incident documentation, and proactive hazard correction.

• Improving equipment, data and systems capability, managing Capex & asset lifecycle and integrating physical best practices

• Leading digital tool enhancements and integrating systematic best practices

• Supporting compliance with AS9100, FAR/DFAR, and MRA/MRL assessments, while collaborating on digital tool enhancements and integrating best practices.

Qualifications include:

• Bachelor’s degree in Engineering, Operations Management, Business Administration, or a related field.

• 8+ years of experience in manufacturing operations leadership, with a strong track record in driving production improvements and managing complex processes.

• Proven expertise in leading safety programs, implementing training, managing asset lifecycle and change control, and overseeing critical compliance standards (e.g., AS9100, FAR/DFAR).

• Demonstrated success in manufacturing optimization, including cost reduction, quality enhancement, productivity increases, and the application of continuous improvement methodologies (e.g., 5S).

• Strong communication and project management skills, with the ability to articulate strategic initiatives, manage cross-functional teams, and deliver concise leadership reports.

• Eligible to obtain and maintain an active U.S. security clearance.

Preferred qualifications include experience with Lean and Six Sigma methodologies, integrating hardware, software, and firmware in end system products, and familiarity with Process Verification and Validation (V&V) practices.

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Key Responsibilities: Test Asset Design and Build Test Platform Construction Test Facility Operations Inventory Management and Planning Reporting Cross-functional Collaboration

Requirements: Bachelor's degree in Engineering, or a related field. Minimum of 5 years of experience in aerospace/automotive technician roles, test technician roles, or similar, with experience in test and verification activities. Experience in operating large scale verification and validation rig equipment. Strong experience in electrical wiring installations. Proficiency with oscilloscopes, multimeters and other test equipment. Skill in maintenance and use of 3D printing equipment. Experience in creating and operating development workshops and facilities. Exceptional critical thinking and problem-solving abilities with a proactive approach to identifying and resolving issues. Excellent written and verbal communication skills, with the ability to present complex information clearly and concisely to diverse audiences.

Preferred Qualifications: Experience in working with high voltage systems. Experience in a specific industry relevant to Automotive, Aviation or high-tech engineering.

Salary Range: The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

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Your work will shape GitLab's enterprise security posture in the rapidly growing software supply chain security market. You'll focus on SLSA Level 3 compliance, secrets management, CI/CD security hardening, and the foundations of GitLab's global zero trust architecture.

Some examples of our projects:

• SLSA Level 3 compliance and provenance attestation across GitLab's CI/CD platform
• Integrated secrets management and runner security for container-isolated, secure pipelines

You'll lead the end-to-end software supply chain security architecture for GitLab's CI/CD platform, including SLSA Level 3 implementation and CI infrastructure hardening. You'll drive cross-team technical strategy and decisions across our Software Supply Chain Security (SSCS) stage teams, aligning engineering work to SSCS strategic plans.

You'll collaborate with infrastructure and CI/CD teams to design and land long-term initiatives for secure, scalable runner architecture, container isolation, and pipeline security at scale. You'll propose and validate technical implementations that support architectural changes to improve CI/CD scaling and performance on critical paths.

You'll teach, mentor, and coach Staff Engineers and individual contributors, raising the bar on supply chain threat modeling, secrets management, artifact signing, and SBOM lifecycle practices.

You'll partner with Engineering Managers and senior leadership to define roadmaps, break down complex initiatives, and enable Staff Engineers to lead sub-department-wide efforts.

You'll engage with customers and external stakeholders as a technical consultant and spokesperson for GitLab's software supply chain security capabilities and roadmap.

You'll collaborate with product, security, and compliance stakeholders to ensure features meet enterprise security, governance, and regulatory expectations in the software supply chain security market.

Key responsibilities include:

• Providing architectural leadership across multiple engineering teams
• Shaping GitLab's enterprise security posture in the rapidly growing software supply chain security market
• Focusing on SLSA Level 3 compliance, secrets management, CI/CD security hardening, and the foundations of GitLab's global zero trust architecture

Key requirements include:

• Deep expertise in software supply chain security, including threat modeling for supply chain attack vectors, SLSA implementation and attestation systems, and SBOM generation and lifecycle management
• Strong knowledge of artifact signing and verification using the Sigstore ecosystem, including Cosign, Fulcio, Rekor, and in-toto attestations
• Experience designing and hardening CI/CD security, such as runner isolation, pipeline security controls, and secrets management in large-scale environments

Preferred qualifications include:

• Background in distributed systems and infrastructure, including building resilient CI/CD platforms that process high pipeline volumes and optimizing performance for critical paths
• Practical experience with container security and Kubernetes security, including admission controllers, policy controllers, workload isolation, and registry hardening
• Proficiency in Go or Rust in a production environment, combined with expert-level understanding of CI/CD workflows and DevSecOps best practices
• Experience operating as a Principal or Staff Engineer across multiple development teams, providing architectural leadership and partnering with Engineering Managers and senior leaders
• Demonstrated capacity to clearly communicate complex problems and solutions

Our Software Supply Chain Security stage engineering teams are responsible for authentication and access within GitLab. We also build features that help customers manage vulnerabilities, dependencies, security policies, and compliance frameworks across their organizations.

The base salary range for this role's listed level is currently for residents of the United States only. This range is intended to reflect the role's base salary rate in locations throughout the US. Grade level and salary ranges are determined through interviews and a review of education, experience, knowledge, skills, abilities of the applicant, equity with other team members, alignment with market data, and geographic location. The base salary range does not include any bonuses, equity, or benefits.

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xAI's mission is to create AI systems that can accurately understand the universe and aid humanity in its pursuit of knowledge.

Our team is small and highly motivated, focused on engineering excellence. We operate with a flat organisational structure, where all employees are expected to be hands-on and contribute directly to the company's mission.

Responsibilities

We're looking for a Member of Technical Staff to join our team. Key responsibilities include:

Scaling synthetic coding data to trillions of tokens with large-scale Docker verification. Distilling the intelligence of flagship models into flash models through synthetic data generation. Optimising mid-training data mixtures to boost the ceiling for RL. Engineering long-context data recipes. Developing robust and diverse evaluation for mid-training checkpoints.

Basic Qualifications

To be successful in this role, you'll need:

Expertise in ML and large model scaling, with familiarity across all kinds of scaling laws. Strong ability to design ML experiments. Familiarity with state-of-the-art techniques for curating AI training data for text, image, audio, and video modalities. Strong engineering abilities in Spark, Ray, and other frameworks for large-scale data processing.

Compensation and Benefits

The base salary for this role is $180,000 - $440,000 USD. Our total rewards package includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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Join us as Staff Software Engineer for Twilio Stytch's Agent team and help build the future of agent identity. You will be a foundational member of a team pioneering the next generation of authentication, verification, and identity solutions that will empower AI developers and protect users globally.

In this role, you'll:

• Build and own product capabilities for Stytch's agentic identity platform on Twilio.
• Design, implement, and maintain scalable, reliable distributed services, optimizing for security, latency, and developer experience.
• Partner with Product and Engineering leadership to set direction, translate customer needs into technical plans, and deliver high-impact roadmap features.
• Collaborate across Twilio and Stytch teams to align on architecture, integrate platform capabilities, and unblock cross-team initiatives.
• Write clean, maintainable, and well-tested code, setting a high bar for technical excellence across the team.
• Own the end-to-end lifecycle of new services, from initial design and prototyping through to production deployment and operational readiness.
• Mentor other engineers on the team, fostering a culture of innovation, ownership, and continuous learning.
• Communicate complex technical concepts effectively to diverse audiences, from fellow engineers to executive leadership.
• Stay at the forefront of industry trends and emerging threats in identity and authentication to ensure our products are secure and innovative.

We're seeking a talented Staff Engineer who brings deep hands-on technical expertise, a strategic mindset, and a passion for building secure, developer-first experiences.

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This role requires expertise in low-level systems security and the ability to architect solutions that balance security requirements with the performance demands of training AI models across our massive fleet.

Responsibilities:

• Design and implement secure boot chains from firmware through OS initialization for diverse hardware platforms (CPUs, BMCs, switches, peripherals, and embedded microcontrollers)

• Architect attestation systems that provide cryptographic proof of system state from hardware root of trust through application layer

• Develop measured boot implementations and runtime integrity monitoring

• Create reference architectures and security requirements for bare-metal deployments

• Integrate security controls with infrastructure teams without impacting training performance

• Prototype and validate security mechanisms before production deployment

• Conduct firmware vulnerability assessments and penetration testing

• Build firmware analysis pipelines for continuous security monitoring

• Document security architectures and maintain threat models

• Collaborate with software and hardware vendors to ensure security capabilities meet our requirements

Who you are:

• 8+ years of experience in systems security, with at least 5 years focused on firmware and hardware security (firmware, bootloaders, and OS-level security)

• Hands-on experience with secure boot, measured boot, and attestation technologies (TPM, Intel TXT, AMD SEV, ARM TrustZone)

• Strong understanding of cryptographic protocols and hardware security modules

• Experience with UEFI/BIOS or embedded firmware security, bootloader hardening, and chain of trust implementation

• Proficiency in low-level programming (C, Rust, Assembly) and systems programming

• Knowledge of firmware vulnerability assessment and threat modeling

• Track record of designing security architectures for complex, distributed systems

• Experience with supply chain security

• Ability to work effectively across hardware and software boundaries

• Knowledge of NIST firmware security guidelines and hardware security frameworks

Strong candidates may also have:

• Experience with confidential computing technologies and hardware-based TEEs

• Knowledge of SLSA framework and software supply chain security standards

• Experience securing large-scale HPC or cloud infrastructure

• Contributions to open-source security projects (coreboot, CHIPSEC, etc.)

• Background in formal verification or security proof techniques

• Experience with silicon root of trust implementations

• Experience working with building foundational technical designs, operational leadership, and vendor collaboration

• Previous work with AI/ML infrastructure security

Annual Salary: $405,000-$485,000 USD

Logistics:

• Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

• Required field of study: A field relevant to the role as demonstrated through coursework, training, or professional experience

• Minimum years of experience: Years of experience required will correlate with the internal job level requirements for the position

• Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.

• Visa sponsorship: We do sponsor visas! However, we aren't able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

Why work with us?

• Competitive compensation and benefits

• Optional equity donation matching

• Generous vacation and parental leave

• Flexible working hours

• Lovely office space in which to collaborate with colleagues

Guidance on Candidates' AI Usage: Learn about our policy for using AI in our application process

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Your work will be at the intersection of security, distributed systems, and product engineering, helping build trusted payments infrastructure from the ground up.

Responsibilities

• Design and implement fraud detection and prevention systems that operate at global scale and low latency
• Develop risk scoring engines, anomaly detection pipelines, and real-time enforcement mechanisms
• Collaborate with product, compliance, X Money, Fraud Prevention, and infrastructure teams to ensure a secure and seamless user experience
• Monitor and analyze fraud trends, and proactively respond to new attack vectors
• Define engineering standards around observability, reliability, and rapid response in fraud-related systems

Basic Qualifications

• 7+ years of backend or systems engineering, with exposure to fraud, risk, or abuse prevention systems preferred
• Skilled in distributed systems: You've built resilient, high-throughput systems that operate under real-time constraints
• Security-conscious: You understand threat models, data sensitivity, and defense-in-depth principles
• Analytical and pragmatic: You value simple, high-leverage solutions and adapt quickly to evolving challenges
• Builder mentality: You're excited by zero-to-one problems and proven ability to thrive in fast-paced environments. You are willing to work hard.

Bonus

• Experience with real-time anomaly detection, machine learning for fraud, or rule-based risk systems
• Familiarity with AML/KYC regulations, chargeback flows, or identity verification systems
• Experience in fintech, trust & safety, or adversarial system design
• Comfortable working in a zero-to-one environment with rapid iteration
• Experience with: Golang, Postgres, Kafka, Memcached

Compensation and Benefits

$180,000 - $440,000 USD Base salary is just one part of our total rewards package at xAI, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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Key responsibilities include:

• Design and implement flight control laws and supporting logic across multiple flight regimes.
• Build and mature high-fidelity 6DOF simulation environments used for control development and ensure accurate pre-flight performance predictions.
• Execute verification activities, including linear analysis, Monte Carlo campaigns, disturbance/sensitivity/degraded operation testing, and HIL validation.
• Diagnose and resolve simulation-to-test mismatches, including unidentified dynamics and modeling gaps.
• Support flight test operations and contribute to rapid iteration between flights.
• Work closely with propulsion, aero, actuation, sensors, state estimation, and autonomy teams to ensure accurate integrated system performance in the 6DOF simulation environment.
• Mentor, teach, and up-skill younger engineers.

Required qualifications include 6+ years of experience in flight controls/GNC on real flight vehicles, with demonstrated contributions from design through test.

Preferred qualifications include autonomous systems or missile/UAV GNC background, familiarity with sensor and air data systems, CI/CD pipelines, and modern DevSecOps practices.

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Key responsibilities include:

• Developing mission systems requirements and architectures to ensure overall system effectiveness
• Selecting mission system baselines through make vs buy trades and vendor engagements
• Developing the integration & test verification plan to include resources from bench-level hardware-in-the-loop (HIL) to flight test
• Defining mission system software architectures including baseline processing and advanced algorithm development
• Driving trade studies and system-of-systems analysis to balance performance, cost, and schedule
• Serving as a technical subject matter expert for mission systems engineering across the aircraft program
• Ensuring compliance with MIL-HDBK-516C, DO-178C, DO-254, and related standards
• Collaborating with program management to de-risk architectures and ensure technical maturity gates are met
• Interfacing with customers, partners, and suppliers to align system requirements and certifications

The ideal candidate will have a B.S. in Aerospace Engineering, Electrical Engineering, Systems Engineering, or related field, and 15+ years of relevant aerospace/defense experience, with at least 5 years in aircraft mission systems integration.

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You will own a project that ties directly to our critical path avionics development while receiving direct mentorship from Senior Electrical Engineers and other cross-functional leads. Our team looks for engineers that value first principles engineering and extreme ownership.

Responsibilities: Design efforts include circuit design for our embedded system, system integration and verification, environmental test, qualification, and automation, debug, root cause, and drive resolution. Systems must be designed for high-reliability, radiation, aggressive temperature changes, and high-magnitude vibration.

Required qualifications: Have a degree in Electrical Engineering or equivalent, Strong technical fundamentals, Have been part of an engineering team/club, Experience with electrical design software, Altium, KiCAD, etc.

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An Avionics Specialist/Sr. Technician - High Voltage supports the entire Avionics team and other cross-functional teams. It is an essential role spanning design, verification, procurement, manufacturing, and test. You will work specifically with the Power Systems team as they design and verify all X-BAT high voltage power systems. This includes the generator, battery, and all power converters.

Responsibilities:

• Set up and execute test campaigns for custom circuits and sub-systems such as verifying logic levels, voltage rails, and basic circuit functions
• Perform benchtop PCBA testing and debugging
• Support engineers through environmental qualification that includes temperature, vibration, altitude, humidity, etc.
• Design, verify, and deploy simple PCBAs, fixtures, and harnesses
• Assist with the avionics lab design and buildout

Requirements:

• 2+ years working around high voltage, high power systems. Such as 270V and higher
• Experience performing benchtop testing with basic EE equipment (multimeter, oscilloscope, electronic load, thermal chamber, etc.)
• Experience performing PCBA and harness rework
• Proficiency reading and interpreting schematics
• Experience working on multidisciplinary hardware development projects, which can be from an internship, job, club, team, personal project, etc…
• Demonstrated history of showing ownership of project outcomes and delivering exceptional results
• Record of working hard, being a trustworthy teammate, holding yourself and others to high standards, and being kind to others

$36 - $54 an hour

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Design and implement flight control laws and supporting logic across multiple flight regimes. Build and mature high-fidelity 6DOF simulation environments used for control development and ensure accurate pre-flight performance predictions. Execute verification activities, including linear analysis, Monte Carlo campaigns, disturbance/sensitivity/degraded operation testing, and HIL validation. Diagnose and resolve simulation-to-test mismatches, including unidentified dynamics and modeling gaps. Support flight test operations and contribute to rapid iteration between flights. Work closely with propulsion, aero, actuation, sensors, state estimation, and autonomy teams to ensure accurate integrated system performance in the 6DOF simulation environment.

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Design and implement flight control laws and supporting logic across multiple flight regimes. Build and mature high-fidelity 6DOF simulation environments used for control development and ensure accurate pre-flight performance predictions. Execute verification activities, including linear analysis, Monte Carlo campaigns, disturbance/sensitivity/degraded operation testing, and HIL validation. Diagnose and resolve simulation-to-test mismatches, including unidentified dynamics and modeling gaps. Support flight test operations and contribute to rapid iteration between flights. Work closely with propulsion, aero, actuation, sensors, state estimation, and autonomy teams to ensure accurate integrated system performance in the 6DOF simulation environment.

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Key responsibilities include developing test plans and procedures, executing verification and validation (V&V) efforts, analysing test data, and collaborating cross-functionally with engineering, manufacturing, and program teams. The ideal candidate has strong experience with aerospace or defence systems, familiarity with regulatory standards (e.g., DO-178C, DO-254, MIL HDBK 516c), and a proven ability to troubleshoot complex system issues.

Qualifications include a degree in engineering or a related field, 7+ years of relevant experience, and strong analytical, communication, and leadership skills. Experience with automated testing, hardware-in-the-loop (HIL), and flight test support is highly desirable.

Responsibilities: Develop test plans and procedures Executing verification and validation (V&V) efforts Analyse test data Collaborate cross-functionally with engineering, manufacturing, and program teams

Required qualifications: Bachelor's degree in Engineering, Computer Science, or a related technical field Hands-on experience in testing (e.g., 3–7+ years depending on level) across software, hardware, or integrated systems Knowledge of test methodologies including verification & validation (V&V), regression testing, and test case development Experience with test tools and automation, such as scripting (Python, MATLAB, or similar) and test frameworks Ability to read and interpret technical documentation, requirements, and system specifications Strong problem-solving skills with the ability to troubleshoot and isolate defects Experience working in cross-functional teams (engineering, QA, systems, manufacturing) Familiarity with relevant standards (e.g., ISO, MIL-STD, DO-178C/DO-254 for aerospace/defence roles) Strong written and verbal communication skills for documenting and reporting test results

Preferred qualifications: Experience testing and troubleshooting complex embedded systems Experience with large programmes and fielding first of type systems

Salary: $150,000 - $220,000 a year

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Key responsibilities include developing test plans and procedures, executing verification and validation (V&V) efforts, analyzing test data, and collaborating cross-functionally with engineering, manufacturing, and program teams. The ideal candidate has strong experience with aerospace or defense systems, familiarity with regulatory standards (e.g., DO-178C, DO-254, MIL HDBK 516c), and a proven ability to troubleshoot complex system issues.

The successful candidate will have a degree in engineering or a related field, 2-5 years of relevant experience, and strong analytical, communication, and leadership skills. Experience with automated testing, hardware-in-the-loop (HIL), and flight test support is highly desirable.

Benefits include pay within the range of $95,000 to $140,000 per year, bonus, benefits, and equity.

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We are seeking a Quality Engineer to support our quality management system by ensuring manufacturing processes, materials, and products meet internal and regulatory quality standards.

As a Quality Engineer, you will work closely with manufacturing, engineering, and supply chain teams to implement quality controls, investigate nonconformances, and drive continuous improvement across production operations.

Responsibilities ---------------

Quality Engineering & Process Improvement

• Develop and implement quality controls to ensure manufacturing processes consistently meet product specifications and regulatory requirements.
• Lead root cause investigations for nonconformances, process deviations, and quality events.
• Implement corrective and preventive actions (CAPA) and verify effectiveness.
• Support continuous improvement initiatives to strengthen manufacturing quality, reliability, and efficiency.
• Collaborate with engineering and manufacturing teams to improve processes, documentation, and inspection methods.
• Support new product introduction and process development by integrating quality requirements into production workflows.

Inspection & Verification

• Support receiving, in-process, and final inspections of materials, components, and assemblies.
• Verify that manufacturing work is performed in accordance with approved drawings, specifications, and procedures.
• Review inspection results and evaluate nonconformances for disposition.
• Support calibration and maintenance of inspection tools and measuring equipment.

Supplier Quality & Material Verification

• Assist with supplier quality activities including review of material certifications, inspection reports, and supplier documentation.
• Support supplier qualification, evaluation, and corrective action activities.
• Coordinate with procurement and engineering teams to ensure supplied materials meet technical and quality requirements.

Quality Systems & Documentation

• Maintain quality documentation, inspection records, and traceability in accordance with company procedures and regulatory requirements.
• Support document control programs and ensure procedures, forms, and work instructions remain current.
• Assist with development and improvement of quality procedures and manufacturing documentation.

Audits & Regulatory Compliance

• Support internal audits, external audits, and quality system assessments.
• Participate in corrective action reviews and follow-up verification.
• Help maintain compliance with NQA-1 quality requirements and applicable DOE and NRC regulatory frameworks.
• Support audit readiness and quality program implementation as manufacturing operations scale.

Requirements ------------

• Bachelor’s degree in Engineering, Materials Science, Mechanical Engineering, Industrial Engineering, or a related technical discipline.
• 3+ years of experience in quality engineering, quality assurance, or manufacturing engineering within an industrial or regulated manufacturing environment.
• Experience working with quality systems such as NQA-1, ISO 9001, AS9100, or similar regulated standards.
• Ability to read and interpret engineering drawings, specifications, and technical documentation.
• Experience performing root cause analysis using structured methods such as 5 Whys, Fishbone, or similar tools.
• Hands-on experience with inspection tools such as calipers, micrometers, gauges, or other measurement equipment.
• Strong analytical, documentation, and problem-solving skills.
• Ability to work cross-functionally with manufacturing, engineering, and supply chain teams.
• Experience working in nuclear, aerospace, defense, energy, or other regulated industries is a plus.

Benefits --------

• Health, Dental & Vision Insurance
• Health Savings Account
• Disability and Life Insurance
• 401K Plan
• Paid Time Off, Holidays

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This role requires advanced technical knowledge, exceptional attention to detail, and the ability to represent quality during customer interactions. The inspector must have a deep understanding of the product (“Corsair”), internal documentation, and applicable standards to ensure all deliverables meet the highest level of quality prior to release.

Key Responsibilities:

• Perform end-of-line inspections on completed assemblies prior to delivery
• Ensure all products meet IPC/WHMA-A-620 standards and internal quality requirements
• Verify mechanical, electrical, and composite components meet specifications
• Review and validate torque values and torque striping
• Inspect welds and ensure compliance with applicable standards
• Identify defects and nonconformances with high accuracy and attention to detail
• Write clear, detailed, and actionable issue tickets for discrepancies
• Maintain thorough documentation and traceability within company systems
• Develop deep product knowledge and understand the full system (“Corsair”) inside and out
• Interpret and apply internal procedures, specifications, and quality standards
• Interact with customers and confidently walk them through inspection processes and findings
• Support quality and production teams by communicating issues and driving resolution

Required Qualifications:

• IPC/WHMA-A-620 Certification (Required)
• Strong mechanical knowledge and inspection experience
• Extensive composite inspection experience
• Knowledge of welding inspection fundamentals
• Strong understanding of torque values and verification methods
• Ability to read and interpret engineering drawings and specifications
• Strong understanding of internal documentation and quality standards
• Excellent written communication skills for detailed issue reporting
• Ability to interact professionally with customers and explain processes
• Exceptional attention to detail and problem-solving ability

Physical Demands:

• Mobility and Movement: Ability to stand and walk for extended periods (e.g., 4–8 hours/day), climb stairs or ladders occasionally (if accessing elevated workspaces), bend, stoop, kneel, or crouch as needed during inspections or audits
• Manual Dexterity: Ability to manipulate small parts and tools during product inspections. Ability to use precision measuring instruments (e.g., calipers, micrometers)
• Lifting and Carrying: Ability to lift and carry up to 25–50 pounds occasionally (e.g., sample materials, equipment). Ability to push or pull carts or equipment as needed
• Visual and Auditory Requirements: Must have strong visual acuity (close vision, color vision, depth perception) to inspect products and read technical documents. Ability to detect subtle differences in materials, surface finish, or defects. Adequate hearing ability to respond to alarms, machine sounds, or communicate in noisy environments
• Environmental Conditions: Ability to work in manufacturing, warehouse, or cleanroom environments (may include exposure to dust, noise, or temperature variations). May require wearing personal protective equipment (PPE) such as gloves, safety glasses, ear protection, or lab coats
• Technology Use: Comfortable working at a computer workstation for extended periods (for report writing, data analysis, and documentation)

Additional Information:

• Benefits: Medical Insurance, Dental and Vision Insurance, Time Off, Parental Leave, Competitive Salary, Retirement Plan, Stock Options, Life and Disability Insurance, Pet Insurance
• Saronic CCPA Notice for Candidates and California Employees: This role requires access to export-controlled information or items that require “U.S. Person” status.

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In this pivotal role, you will be responsible for ensuring the electrical and software systems that enable autonomy, control, and communications meet reliability and integration requirements.

You will lead efforts in electrical architecture design, software- and hardware-in-the-loop (HITL) verification, and failure mode analysis for electronics and embedded systems.

Working with electrical, software, and other engineers, you’ll identify reliability drivers, define test requirements, and execute end-to-end full lifecycle system performance verification across mission scenarios and environmental conditions.

Your expertise will be crucial in ensuring the reliability and performance of our innovative maritime technology as we advance towards the future of autonomous vessels.

Requirements

• Lead electrical and software system integration efforts, and work cross-functionally to ensure aspects such as signal integrity, power management, communication protocols, and autonomy behavior meets design intent and system requirements (design criteria)
• Define and maintain system-level electrical and software interface requirements using Jama and internal tools, ensuring clarity across design teams
• Help develop and execute integration and validation test plans for electrical subsystems, software-in-the-loop (SIL), and hardware-in-the-loop (HITL) testing
• Define and execute electrical reliability tests (e.g., EMI/EMC, power cycling, thermal stress) to validate robustness and fault tolerance
• Support root cause investigations for electrical and software-related failures, coordinating corrective actions and preventive measures
• Lead technical reviews related to system interfaces, electrical integration, and software verification results, ensuring feedback is integrated into design updates
• Mentor other engineers in best practices for electrical and software reliability, including fault-tolerant design, redundancy, and diagnostic coverage
• Define top-down use cases, system architecture, and design reference missions for products alongside product architects and responsible engineers
• Define, document, and maintain system requirements (design criteria) using Jama and in-house developed tools/environments
• Work closely with engineering teams to ensure requirements are accurately interpreted and implemented
• Maintain up-to-date technical documentation for system requirements, testing requirements, verification and validation
• Clearly articulate technical information to stakeholders at all levels, ensuring alignment of objectives across engineering, software, and mission operations
• Participate in systems engineering activities including concept development, system design, integration, and testing
• Develop, own, and execute subsystem- and system-level verification and validation (V&V) plans to ensure designs meet functional, performance, autonomy, reliability, and safety requirements
• Define test objectives, configurations, procedures, and success criteria for subsystem and full-system integration tests
• Lead root cause analysis/failure investigation, and corrective action for issues found during R&D and qualification testing alongside the development, quality, and test teams.
• Develop and maintain internal data analysis and visualization tools to streamline test reporting and decision-making
• Collaborate closely with mission operations, design engineers, and other stakeholders to collect, analyze, and interpret in-field or post-deployment data, feeding results back into design iterations
• Work with hardware-in-the-loop (HITL) engineers to architect verification & test campaigns and execute subsystem- and system-level testing
• Help drive the development of internal tools, guides, calculators, or similar via Palantir Foundry, Confluence, Excel, or similar
• Support the engineering design cycle process as a subject matter expert to ensure teams adhere to our hardware design best practices, and analysis best practices

Qualifications

• This job posting is intended for candidates at all levels, including Sr, Staff, etc., and generally requires at a minimum 2+ years of industry experience as a Design Engineer, Development Engineer, Test Engineer, Systems Engineer, Reliability Engineer, or similar
• Bachelor’s degree or greater in Mechanical, Aerospace, Industrial, Systems, Software, Computer, Electrical Engineering, or similar
• Experience working on advanced hardware systems, autonomous systems, complex electronics systems, or similar
• Requirement decomposition experience for both hardware and software
• Coding and software development experience, such as in Python, Java, C++, or similar
• Experience with failure analysis, root cause analysis methodologies, corrective action management, and risk management
• Experience architecting and designing test campaigns (subsystem level to the vehicle/vessel/product level) as well as creating & executing test plans
• Familiarity with industry processes, standards, and guides, such as MIL-STDs, ABS Rules, ABYC, COLREGs, ISO, NASA, IEC, IEEE, and similar
• Ability to travel as needed

Preferred Qualifications

• Experience with requirements management tools such as Jama, DOORS, Innoslate, 3DX, Cameo, Flow, or similar
• Experience developing tools, guides, and engineering solutions in Palantir Foundry
• Hands on test engineering experience including data collection, analysis, and closing feedback loops to improve designs & outcomes
• Experience with analysis tools such as MATLAB, Excel, ANSYS, FEMAP, etc.
• Modeling/CAD Experience
• HALT (Highly Accelerated Life Testing), environmental testing, mechanical/loads testing, electrical testing and/or debugging, software testing and/or debugging
• Technical writing experience developing standards, specifications, user guides, or similar

Additional Information

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Saronic pays 100% of the premium for employees and 80% for dependents
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium under the basic plan for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan with company match
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Pet Insurance: Discounted

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You will work closely with cross-functional teams, including mechanical, electrical, and software engineering, to deliver reliable, high-performance control solutions that meet safety and regulatory standards.

Responsibilities:

• Design, program, and commission PLC, DCS, and SCADA systems for industrial processes and machinery
• Develop and maintain control system architecture, including hardware selection, software logic, and HMI development
• Perform system modeling, simulation, and analysis to optimize control strategies (PID tuning, feedforward, etc.)
• Conduct Factory Acceptance Testing (FAT) and Site Acceptance Testing (SAT) for new and modified systems
• Troubleshoot and resolve control system faults, minimizing downtime and production impact
• Create and maintain technical documentation including control narratives, cause-and-effect matrices, loop diagrams, and I/O lists
• Collaborate with process engineers to translate process requirements into control system specifications
• Ensure all systems comply with applicable safety standards (IEC 61511, IEC 62443, NFPA 79, etc.)
• Provide technical support and training to operations and maintenance staff
• Participate in hazard reviews (HAZOP, SIL assessments) and implement safety instrumented functions (SIF)

Qualifications:

• Bachelor's degree in Electrical Engineering, Controls Engineering, Mechanical Engineering, or a related field
• 3+ years of experience in controls systems design and implementation
• Proficiency in PLC programming (e.g., Rockwell/Allen-Bradley, Siemens, Schneider Electric) using IEC 61131-3 languages
• Experience with SCADA/HMI platforms (e.g., Ignition, FactoryTalk, WinCC)
• Solid understanding of industrial communication protocols (EtherNet/IP, Modbus, Profibus, OPC-UA)
• Familiarity with instrumentation, field devices, and process control fundamentals

Preferred Qualifications:

• Experience with distributed control systems (DCS) such as DeltaV, Honeywell Experion, or ABB 800xA
• Knowledge of functional safety standards and SIL verification
• Exposure to Industry 4.0 concepts, IIoT integration, or edge computing
• PE license or ISA Certified Control Systems Technician (CCST) certification
• Experience in Oil & Gas / Manufacturing / Maritime

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Additional Information:

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3)

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Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use.

The Fraud Product Sales team at Plaid is a specialist, solutions-focused sales organization responsible for driving adoption and growth of Plaid's emerging products across both new and existing customers. This team plays a critical role in scaling products, translating customer needs into commercial opportunities, and accelerating Plaid's next phase of growth through consultative, value-driven selling.

As Account Executive Leader - Fraud, you will be responsible for the performance and growth of Plaid's Fraud solutions, serving as a player-coach who both leads and directly closes strategic deals. You will bring deep expertise across fraud, risk, and identity verification to drive new business and expansion, partnering closely with Product and cross-functional Go-To-Market teams to shape sales strategy, develop specialist AEs, and translate complex customer fraud challenges into meaningful, revenue-generating outcomes.

Responsibilities

• Owns and drives company-wide revenue performance for Plaid's Fraud solutions, with clear accountability for revenue growth, pipeline generation, and deal execution.

• Maintains a rigorous revenue forecast for Fraud solutions

• Builds, hires, and leads a high-performing team aligned to revenue goals, ensuring coverage, productivity, and scalable sales execution.

• Acts as an executive seller and market expert, leading high-impact sales conversations, strategic customer engagements, and industry events to accelerate pipeline creation and close complex, enterprise deals.

• Develops top-tier sales talent by setting a high performance bar, coaching through real deals, and preparing team members for expanded scope and senior leadership roles.

• Coaches sellers with a challenger mindset, enabling teams to lead with insight, reframe customer risk and fraud strategies, and uncover net-new and expansion revenue opportunities.

• Maintains a real-time view of product-market fit across segments, verticals, and geographies, identifying growth levers and partnering cross-functionally to unlock new revenue opportunities.

• Serves as a strategic advisor to segment sales and product leadership, shaping and executing go-to-market strategies that maximize revenue impact for Fraud solutions.

• Identifies structural, systems, and process gaps that limit revenue scale, partnering with GTM and Product leadership to prioritize and drive improvements.

• Plays a key role in quarterly and annual planning by setting ambitious revenue targets for Fraud solutions and defining the strategy, resources, and execution plan required to exceed them.

Qualifications

• 7+ years of relevant market experience.

• 3+ years of managing a revenue-driving team.

• Deep experience and market knowledge within the Fraud space inclusive of Fraud, Risk, Identity Verification, KYC/AML and Identity space.

• Effective territory/account management: planning, opportunity qualification and creation, stakeholder and executive communication, needs analysis, value engineering, services/partner engagement, opportunity management, pipeline management, large dollar licensing and deal negotiation.

• Strong communication and presentation skills, and an ability to build relationships with prospects and customers, up to the C-suite.

• Strong collaboration skills and ability to work across a variety of internal stakeholders.

• Excitement to work in a high-growth environment and to help build processes and scale product growth across the revenue team.

Additional Information

Our mission at Plaid is to unlock financial freedom for everyone. To support that mission, we seek to build a diverse team of driven individuals who care deeply about making the financial ecosystem more equitable. We recognize that strong qualifications can come from both prior work experiences and lived experiences. We encourage you to apply to a role even if your experience doesn't fully match the job description. We are always looking for team members that will bring something unique to Plaid!

Plaid is proud to be an equal opportunity employer and values diversity at our company. We do not discriminate based on race, color, national origin, ethnicity, religion or religious belief, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, military or veteran status, disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state, and local laws. Plaid is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance with your application or interviews due to a disability, please let us know at accommodations@plaid.com.

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Responsibilities: Serve as the lead technical product lead for SMB accounts throughout the sales process Partner with Account Executives to demonstrate to prospects how Plaid can solve their problems, address their use cases and meet their technical requirements Work with our engineering, product and design teams to translate prospect feedback into meaningful product insights

Requirements: A strong sense of customer empathy A background that combines business experience, sales experience and technical acumen Strong communication skills Ability to quickly understand new technologies and complex concepts Knowledge of web services, APIs, and related standards such as HTTP and REST Knowledge of mobile and web application architecture specific to interfacing with API platforms Nice to have: Credit, Payments & Identity verification experience

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Our Sales Engineering team unlocks and empowers prospects' full potential on the Plaid Network. We bring product expertise and drive Revenue outcomes by being customer-obsessed technical advisors in the pre-sales process.

As a Sales Engineer, you'll work closely with our Enterprise Sales team as the technical lead during the pre-sales process. You will be responsible for partnering with Account Executives, proactively pushing deals forward by overcoming technical objections and building solutions around Plaid products.

Responsibilities:

• Serve as the technical lead for Enterprise accounts throughout the sales process
• Partner with Account Executives to demonstrate to prospects how Plaid can best address their use cases and technical requirements
• Engage deeply with technical stakeholders in the pre-sales process to drive alignment and buy-in
• Provide demonstrations, address technical questions, architect implementation solution(s) and handle RFP responses in a thorough and expedient manner
• Take a hands-on role in POCs, where inquisitive and critical thinking is needed to identify, diagnose, and rectify any performance shortfalls
• Constantly re-evaluate selling assets and process to enable more efficient/effective messaging to customers
• Work with our engineering and product teams to translate prospect feedback into meaningful product insights
• Collaborate with current SE team to up-level team knowledge and capabilities

Requirements:

• 5-7+ years of customer-facing experience selling to large enterprises
• Familiarity with Identity Verification, stolen, synthetic, and first-party fraud or Income Verification, Cash Flow Underwriting
• Fluency in insights products and underlying statistical/ML models, translating analytical outputs into clear, actionable customer recommendations
• A strong sense of customer empathy
• A background that combines business experience and technical acumen
• Strong communications skills with a confident and proactive approach to client management
• Consultative mindset with ability to translate technical choices into business value
• Ability to quickly understand new technologies and complex concepts quickly
• Knowledge of mobile and web application architecture specific to interfacing with API platforms
• Willing and able to travel up to 25% of the time

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Fraud remains one of the hardest problems in financial services,and one of the biggest opportunities for Plaid. Our Fraud team is building the trusted identity backbone for the financial ecosystem, helping customers onboard good users with confidence while keeping bad actors out.

As the Product Manager for Identity Verification (IDV) and Monitor (AML), you’ll own the foundation of Plaid’s fraud platform. IDV enables fast, accurate identity verification at onboarding, while Monitor provides continuous AML screening and transaction monitoring. Together, they power Protect and Layer–Plaid’s next-generation fraud products.

In this role, you will take end-to-end ownership of IDV and Monitor–setting direction, driving execution, and aligning teams around measurable outcomes. You’ll blend technical, data and design perspectives to move from concept to production quickly and deliver systems that are accurate, reliable and built for scale. You’ll partner directly with Plaid’s fraud founders and an experienced engineering team to raise the standard for fraud prevention.

Responsibilities

• Set the direction. Own the vision, strategy, and roadmap for IDV and Monitor end to end. Drive meaningful outcomes for fraud prevention, compliance, and customer experience.

• Build the backbone. Grow IDV and Monitor as the core of Protect and Layer by expanding data coverage, improving decision quality, and enhancing reliability, latency, and transparency across systems

• Execute with focus. Partner closely with engineering, design, and other Fraud teams to move from concept to production with clear launch criteria and consistent follow-through.

• Communicate with precision. Create clarity across teams by articulating decisions, tradeoffs and rationale crisply. translating complex systems into simple narratives and keeping partners aligned on what matters.

• Stay close to the field. Engage with customers and GTM teams to spot fraud and compliance patterns early, translate them into product improvements, and maintain momentum through demos, integrations, and launches.

Qualifications

• 6+ years of product management experience in fraud, risk, security, or identity

• Strong technical foundation with a degree in Computer Science or a related field preferred

• Experience building or integrating fraud detection, risk scoring, or IDV/AML systems

• Ability to write clear product requirements and communicate technical concepts to diverse audiences

• Comfortable working closely with engineering, data, and go-to-market teams to deliver measurable impact

Additional Information

Our mission at Plaid is to unlock financial freedom for everyone. To support that mission, we seek to build a diverse team of driven individuals who care deeply about making the financial ecosystem more equitable. We recognize that strong qualifications can come from both prior work experiences and lived experiences. We encourage you to apply to a role even if your experience doesn't fully match the job description.

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Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use.

Plaid's Fintech Sales team is responsible for our relationships with some of the most important and fastest-growing companies in financial services. Many of these companies have long-standing relationships with Plaid, and this team's mandate is to deepen those partnerships , expanding product adoption, enabling customer growth, and ensuring Plaid remains the infrastructure provider of choice as these customers scale.

You will lead an established, high-performing team of Named Account Executives who manage Plaid's largest fintech accounts. This is not a greenfield build , it's a team with real momentum, strong customer relationships, and meaningful revenue. The opportunity is to raise the bar further: strengthen Plaid's market-leading position in fintech by driving deeper product adoption across existing accounts, winning strategic new logos, and developing the AEs on your team into consistently elite performers.

The primary motion is expansion. The majority of your AEs' accounts already use Plaid , the job is to grow those relationships through new products, new use cases, and new business units, while also adding competitive new logos to the book. You'll be in deals with your team as a coach and escalation point, helping AEs navigate multi-stakeholder cycles from technical champion to economic buyer, without taking ownership away from them.

Responsibilities

• Manage a team of 6–8 Named Account Executives focused on Plaid's largest fintech accounts, driving growth through expansion of existing relationships and competitive new logo acquisition.

• Coach AEs to identify and drive expansion opportunities proactively , new products, new use cases, new business units , rather than waiting for inbound signals.

• Build and refine the account strategy for Plaid's top fintech customers alongside your AEs, including executive value messaging, pitch positioning, and coordinated go-to-market efforts with Marketing.

• Grow existing accounts by driving multi-product adoption and deepening executive-level relationships.

• Attain consumption-based revenue targets through a disciplined, data-driven pipeline operating rhythm.

• Develop your team through structured 1:1s, deal reviews, and skill-specific coaching that closes the gap between strong performers and elite ones.

• Maintain a high recruiting bar , assess and close exceptional AE talent as the team grows, selecting for people who thrive in an expansion-oriented selling motion.

• Manage performance with transparency , set clear expectations, act early when someone isn't tracking, and make tough calls when necessary.

• Collaborate closely with Marketing, Product, Account Management, Legal, and Commercial teams to maintain a consistently high win rate and remove friction from deal cycles.

• Engage directly in strategic deals as a coach and escalation point, while ensuring your AEs retain ownership and develop their own executive-level selling capabilities.

Qualifications

• 10+ years of sales experience in B2B SaaS or platform/infrastructure sales, with meaningful exposure to fintech, payments, or financial services.

• 5+ years of frontline sales management experience leading teams of quota-carrying AEs.

• Demonstrated track record of coaching account executives to close and grow accounts in the $100K–$1M+ ARR range, with specific experience in expansion and land-and-expand motions.

• Experience leading a team oriented around named accounts or industry verticals , not just geographic territories.

• Strong data discipline , you use pipeline and forecast data to change what your team does, not just report it upward.

• Proven ability to operate cross-functionally, influencing product, legal, and marketing without positional authority.

• Outstanding communication and executive presence, with experience managing the sales cycle from technical champion to C-suite economic buyer.

• A coaching-first leadership style , you develop your people through the deals, not by taking the deals away from them.

Nice to Have

• Experience selling API-first or developer-focused products.

• Familiarity with consumption-based or usage-based pricing models.

• Background in open banking, identity verification, payments, or adjacent fintech infrastructure.

• Experience managing hybrid or distributed teams across multiple offices.

Additional Information

Our mission at Plaid is to unlock financial freedom for everyone. To support that mission, we seek to build a diverse team of driven individuals who care deeply about making the financial ecosystem more equitable. We recognize that strong qualifications can come from both prior work experiences and lived experiences. We encourage you to apply to a role even if your experience doesn't fully match the job description. We are always looking for team members that will bring something unique to Plaid!

Plaid is proud to be an equal opportunity employer and values diversity at our company. We do not discriminate based on race, color, national origin, ethnicity, religion or religious belief, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, military or veteran status, disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state, and local laws. Plaid is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance with your application or interviews due to a disability, please let us know at accommodations@plaid.com. Please review our Candidate Privacy Notice here.

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You will partner cross-functionally with our engineering, product, regulatory, quality and sciences teams to lead the verification and validation of our software platform and contribute to the success of Engineering and Freenome as a whole.

The ideal candidate is comfortable working in a dynamic, flexible environment and adapting to rapid technological progress and change.

You are passionate about building and developing strong teams, have a high sense of ownership and take pride in being a servant leader while continuing to make an individual impact.

You will have a significant impact on the continued growth of a high-profile technology organization that is changing the landscape on early cancer detection.

The role reports to the Senior Director, Software Engineering. This role will be a remote role.

Responsibilities:

• Partner with Regulatory Affairs and Quality Assurance teams in creating robust and sustainable software validation processes to ensure Freenome's software meets regulatory standards and guidelines.

• Coordinate software testing efforts within and across teams and advocate for effective test strategies aligned with other efforts to ensure Freenome's software is of the highest quality.

• Partner with Product teams, Technical Project Managers, and Systems Integration teams to ensure features are production-ready and to guarantee the quality and success of Engineering software.

• Support recruitment, technical staffing, and organizational design to rapidly structure and grow the testing team as it scales.

• Supervise the training and development of test engineering staff, working with leadership to establish unified principles for software quality and development at Freenome.

• Evaluate and improve your team's performance by utilizing comprehensive review processes and charting out personal growth plans for direct reports.

• Review and improve test plans, transform gaps in software testing into actionable initiatives, and coordinate their completion.

• Design and develop resilient Test framework and tooling by delivering features and enhancements for test engineering to be deployed across the entire engineering organization.

• Drive the vision and strategy of an effective Software Testing Lifecycle, focusing on comprehensive test automation and setting technical direction for your engineers.

Must haves:

• BS, MS or Ph.D. in Computer Science, Engineering, a related technical field, or comparable experience.

• 8+ years of experience in software testing and quality, coupled with a proven track record of proposing and executing successful test automation initiatives.

• 3+ years of experience in software test management, preferably in highly regulated industries such as healthcare and medical devices, with demonstrated ability to structure, grow, and optimize a team for execution.

• Experience creating software quality processes, strategies, and metrics in an Agile sprint planning environment.

• Expertise in testing backend and frontend cloud software applications.

• Excellent verbal and written communication skills to effectively mentor engineers, build a sustainable testing culture, and partner with stakeholders.

• A mindful, transparent, and patient-centric approach driven by trust, integrity, and empathy.

Nice to haves:

• Experience working with Verification & Validation (V&V) for applications in high-governance industries subject to HIPAA, CAP, CLIA, SOC2, etc.

• Experience testing cloud-native distributed applications using container management tools like Docker, Kubernetes, Terraform, or Pulumi.

• Domain-specific experience in software as a medical device, healthcare, or a related field.

• Experience in risk management, project management, and resource planning, particularly in startup environments.

• Direct experience with clinical interoperability standards such as FHIR and HL7v2.

Benefits and additional information:

• The US target range of our base salary for new hires is $201,450 - $286,650. You will also be eligible to receive equity, cash bonuses, and a full range of medical, financial, and other benefits depending on the position offered.

• Please note that individual total compensation for this position will be determined at the Company's sole discretion and may vary based on several factors, including but not limited to, location, skill level, years and depth of relevant experience, and education.

• We invite you to check out our career page @ https://freenome.com/job-openings/ for additional company information.

Freenome is proud to be an equal-opportunity employer, and we value diversity. Freenome does not discriminate on the basis of race, color, religion, marital status, age, national origin, ancestry, physical or mental disability, medical condition, pregnancy, genetic information, gender, sexual orientation, gender identity or expression, veteran status, or any other status protected under federal, state, or local law.

Applicants have rights under Federal Employment Laws.

Family & Medical Leave Act (FMLA)

Equal Employment Opportunity (EEO)

Employee Polygraph Protection Act (EPPA)

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Responsibilities:

Lead security audits of (a subset of) the Espresso codebase As a project leader, you will have mobility in how you choose to organize security and audit efforts Dive into the code of a fairly complex distributed system, learning and developing an understanding of the system on the fly (with help from the engineering team that built it, of course) Coordinate with several engineering teams to aid in your audit, raise concerns and communicate results, and guide the effort to harden the system based on your findings Coordinate with, manage, and review the work of external security auditing teams, in certain cases Suggest improvements to testing and engineering practices to promote more secure and maintainable code

Requirements:

Solid grasp of software engineering principles, both low-level (e.g. language-specific best practices) and high-level (e.g. reliable software architecture, particularly in distributed systems) If focused on Rust: ≥ 1 year experience writing Rust, particularly with async Rust. If focused on Solidity: Multiple years experience writing smart contracts; experience with smart contract security audits or formal verification of smart contracts Experience as an engineer or software architect in a security-critical industry Be capable of describing the stakes, the challenges you've faced in building secure software, and the steps/processes you've taken to mitigate risk Experience as an auditor, pentester, QA tester, etc. Have a well thought-out approach to testing software and designing it to be testable/auditable Ability to think adversarially, and identify potential reliability or security vulnerabilities even in software that is correct in common or “happy path” scenarios Experience on the design and/or testing of distributed systems Comfort diving into unknowns and asking questions

Preferred:

Knowledge of relevant testing and static analysis tools (e.g. Foundry, Slither) is a plus Blockchain knowledge/experience is preferred, but could also be include IoT, automotive, finance, etc. Ideally, the candidate should have a general philosophy of software design that has been molded by experience working on security-critical systems

Benefits:

Fully remote with flexible hours Work alongside the brightest minds in the crypto space Competitive salary + equity package Regular team off-sites to international locations Unlimited vacation policy Top-tier health, dental, and vision coverage for US employees

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Key Responsibilities

• Design, develop, and optimize FPGA-based digital systems for real-time defense applications
• Implement RTL designs (VHDL, Verilog, SystemVerilog) for high-speed data processing
• Perform simulation, synthesis, timing analysis, and timing closure
• Develop and integrate DSP algorithms in hardware (e.g., FFTs, filters, modulation)
• Interface with high-speed ADCs/DACs, RF front ends, and embedded processors
• Support hardware bring-up, debugging, and validation in lab environments
• Collaborate with RF, systems, and software engineers to ensure system performance
• Document designs, requirements, and verification results

Required Qualifications

• Bachelor’s degree in Electrical or Computer Engineering (or related field)
• Minimum of 2 years' professional experience within the aerospace & defense industry
• Minimum 2 years' experience using FPGA toolchains (Xilinx Vivado, Intel Quartus)
• Proficiency in HDLs (VHDL, Verilog, or SystemVerilog)
• Strong understanding of digital design fundamentals (timing, clock domains, pipelining)
• Experience with simulation/verification tools (ModelSim, Questa, etc.)
• Ability to obtain and maintain a U.S. security clearance

ITAR Regulations

• To conform to U.S. Government technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicant must be a US Citizen, Green Card holder, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

Bonus Points

• Experience with defense systems (radar, EW, communications)
• Knowledge of digital signal processing (DSP) implementation and fixed-point math
• Proficient in scripting languages (Tcl, bash, Python)
• Familiarity with embedded software integration on SoCs
• Experience with high-speed interfaces (JESD204, PCIe, Ethernet, DDR)
• Familiarity with SoC platforms (e.g., Xilinx Zynq, RFSoC)
• Understanding of RF signal chains and systems

Additional Information

CX2 is a next-generation defense technology company securing spectrum dominance for the United States and its allies. We build AI-enabled hardware and software platforms to detect, disrupt, and defend the electromagnetic spectrum across land, air, sea, and space. Our systems are deployed in the most contested operational environments in the world. We’re backed by leading venture investors in the defense ecosystem and led by founders with track records at Meta, SpaceX, Epirus, and the U.S. Department of Defense.

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Summary: Performs patient check-in and check-out procedures, processes financial information, and provides patient billing information. Demonstrates effective customer service and computer skills. Physician Practice Experience required. Familiarity with EPIC and registration/insurance verification a MUST.

Responsibilities: Maintains compliance with organisational policies and procedures. Maintains compliance with revenue cycle and financial audit guidelines. Demonstrates effective computer skills, files, answers phones in a timely and professional manner providing complete and accurate information, and provides other administrative duties as required. Accurately performs patient check-in and check-out procedures. Processes privileged patient health information (obtains current insurance verification and authorisation, codes visits using accurate ICD and CPT codes), balances daily receipts, and responds to billing questions. Schedules patient appointments entering all required demographic and clinical information into the system and coordinating with other parties. Orders and maintains clinical supplies, office supplies, and equipment. Maintains compliance with established safety and regulatory guidelines, including HIPAA, OSHA, and infection prevention policies and procedures. Participates in unit performance improvement activities. Demonstrates good customer service skills when interacting with patients, families, and visitors. Exhibits effective communication skills and teamwork.

Other Information: Education Requirements: High school diploma or general education degree (GED) required. Licensure/Certification Requirements: No licensure or certification required. Professional Experience Requirements: Prefer completion of an accredited medical administrative assisting programme and previous experience in a medical office. Knowledge/Skills/and Abilities Requirements: Language Skills: Ability to read and interpret documents such as safety rules, operating and maintenance instructions, and procedure manuals. Ability to write routine reports and correspondence. Ability to speak effectively before groups of patients, or employees of organisation. Mathematical Skills: Ability to add, subtract, multiply, and divide in all units of measure, using whole numbers, common fractions, and decimals. Ability to compute rate, ratio, and percent. Computer Skills: Ability to enter and process data accurately. Reasoning Ability: Ability to apply common sense understanding to carry out detailed but uninvolved written or oral instructions. Ability to deal with problems involving a few concrete variables in standardised situations.

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We are seeking a proactive, customer-oriented engineer to join our Customer Application Services team. As a Senior Applications Engineer, you will be responsible for managing and providing ICV runset support for key foundry customers, ensuring optimal product performance and customer satisfaction.

Responsibilities:

• Manage and provide ICV runset support for key foundry customers, ensuring optimal product performance and customer satisfaction.
• Deliver post-sales technical expertise during the runset programming, implementation, and maintenance of Synopsys products.
• Implement detailed customer installation requirements and customize solutions to fit unique client environments.
• Ensure client needs are met and that Synopsys solutions function according to technical specifications and industry standards.
• Collaborate with sales teams to provide pre-sales technical support, contributing to successful business development and customer onboarding.
• Troubleshoot and resolve moderately complex technical issues.

Requirements:

• Basic understanding of the design process, with a preference for Design Rule Checking (DRC).
• Solid grasp of ASIC design flow, VLSI concepts, and/or CAD engineering principles.
• Familiarity with competitive EDA tool products and expertise in areas such as Verification, Place and Route, Design Reuse, and/or Physical Design.
• Ability to manage projects from initiation through completion, delivering high-quality technical solutions.
• Creative problem-solving skills and the ability to exercise judgment in selecting methods and techniques to obtain solutions.

The Team You'll Be A Part Of:

You will join the Customer Application Services team, a group of passionate engineers dedicated to delivering technical excellence and customer success. The team works closely with foundries, design teams, and sales professionals, providing deep expertise and support throughout the product lifecycle.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Your responsibilities will include:

• Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.
• Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.
• Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.
• Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.
• Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.
• Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.
• Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys' technical edge.

You will accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. You will ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market. You will drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps. You will enhance customer satisfaction by providing timely and expert solutions to complex verification challenges. You will contribute to the development of next-generation verification methodologies and best practices within Synopsys. You will strengthen Synopsys' reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

To be successful in this role, you will need:

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.
• 5-8 years of hands-on experience in the Physical Verification (PV) domain.
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.
• Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.
• Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.
• Exposure to competitive EDA tools and awareness of their strengths and limitations.

You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

Rewards and benefits include a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Director of Product Management

Sunnyvale, California, United States

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Category: Product ManagementHire Type: Employee

Job ID 15974Base Salary Range $200000-$300000Date posted 03/16/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a strategic, technically savvy leader who thrives at the intersection of product, marketing, and sales. With a deep-rooted engineering foundation and a passion for semiconductor and EDA solutions, you know how to convert complex technical capabilities into compelling market narratives. You are energized by the challenge of modernizing outbound marketing, leveraging AI-driven workflows, and building scalable systems that enable teams to deliver consistent, high-impact messaging and campaigns. Your experience spans hands-on engineering roles, technical product marketing, and sales enablement, making you a credible partner for both technical and business stakeholders.

You understand the nuances of hardware-assisted verification, emulation, and prototyping, and can translate intricate workflows into clear, customer-relevant value propositions. You possess the ability to engage deeply with engineering and field teams, bridging technical detail with executive-level messaging. You have a track record of mentoring marketing talent, driving cross-functional alignment, and elevating the quality and effectiveness of outbound efforts. You are comfortable working in a hybrid environment, collaborating with diverse teams, and leading through influence. Your commitment to continuous improvement and adoption of AI tools positions you as a role model for modern marketing excellence. Above all, you are motivated by the opportunity to scale impact, drive clarity, and help Synopsys’ most advanced solutions shine in the market.

What You’ll Be Doing:

• Design and execute end-to-end outbound marketing campaigns for key semiconductor and EDA solution areas, including product launches and major industry events.

• Craft clear messaging frameworks, value propositions, and narratives that translate technical differentiation and customer use cases into market-ready content.

• Develop and maintain practical sales enablement playbooks,including buyer personas, competitive positioning, objection handling, pitch decks, demo guidance, and talk tracks.

• Lead outbound positioning and enablement for hardware-assisted emulation, FPGA-based prototyping, hybrid verification flows, and software enablement solutions.

• Apply AI tools and workflows to accelerate content creation, synthesize market feedback, and establish scalable, repeatable marketing best practices.

• Collaborate closely with Product Management, Product Marketing, Sales, Field Engineering, PR, and Events to ensure consistent, credible, and high-impact market engagement.

• Mentor and elevate marketing talent, introducing frameworks, standards, and best practices to modernize execution and foster cross-functional alignment.

The Impact You Will Have:

• Transform bespoke outbound efforts into scalable, repeatable systems that amplify market reach and sales effectiveness.

• Increase clarity and credibility for Synopsys’ most advanced technical solutions, ensuring consistent messaging across channels.

• Empower sales teams with practical, field-ready enablement assets that resonate with highly technical buyers and senior executives.

• Drive adoption of AI-first marketing workflows, setting new standards for speed, quality, and insight generation.

• Bridge the gap between engineering teams and market-facing functions, ensuring alignment and real-world relevance in all outbound content.

• Elevate the quality and impact of outbound marketing programs tied to industry moments, launches, and customer engagements.

• Mentor and develop marketing talent, fostering a culture of excellence, innovation, and cross-functional collaboration.

What You’ll Need:

• 10+ years of experience in product marketing, outbound marketing, sales enablement, or technical marketing within semiconductors or EDA.

• Strong engineering foundation,experience as a design, verification, systems, applications, or field engineer, or as a technically deep product marketer.

• Demonstrated understanding of hardware-assisted verification, including emulation and prototyping workflows and use cases.

• Proven ability to translate complex technical concepts into compelling outbound messaging and sales enablement assets.

• Hands-on expertise with AI tools to enhance marketing productivity, content creation, and insight generation.

• Strong written and verbal communication skills, with the ability to influence both technical and non-technical audiences.

• Experience supporting high-value B2B technical sales cycles and product launches tied to major industry events.

Who You Are:

• Strategic thinker with a growth mindset and a passion for continuous improvement.

• Collaborative leader who thrives in cross-functional environments and leads through influence rather than authority.

• Technically credible and able to engage deeply with engineering, product, and field teams.

• Adaptable and comfortable navigating fast-paced, complex environments with evolving priorities.

• Empathetic mentor and coach, committed to elevating team capabilities and setting new standards for marketing excellence.

• Detail-oriented, yet able to distill complexity into clear, actionable messaging for diverse audiences.

• Innovator who embraces AI-driven workflows and modern marketing practices.

The Team You’ll Be A Part Of:

You will join a dynamic and collaborative Product Management and Product Marketing leadership team, working closely with Sales, Field Engineering, PR, and Events. This group is focused on scaling outbound marketing execution, driving clarity and credibility for Synopsys’ most advanced solutions, and embracing AI-first ways of working. Together, you will foster cross-functional alignment, elevate marketing talent, and deliver high-impact programs that shape the industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Senior Engineer in the R&D department, you will be responsible for developing and deploying emulation models for Zebu, focusing on bus protocols like PCIe, USB, CSI, and DSI. You will implement designs in C++, RTL, and SystemVerilog-DPIs, and collaborate with cross-functional teams to ensure seamless SoC bring-up and software development in pre-silicon environments. You will also create and optimize use models and applications for various emulation projects, conduct thorough verification and validation processes to ensure the highest quality of emulation models, and provide technical guidance and mentorship to junior team members when necessary.

Key responsibilities include:

• Developing and deploying emulation models for Zebu, focusing on bus protocols like PCIe, USB, CSI, and DSI.
• Implementing designs in C++, RTL, and SystemVerilog-DPIs.
• Collaborating with cross-functional teams to ensure seamless SoC bring-up and software development in pre-silicon environments.
• Creating and optimizing use models and applications for various emulation projects.
• Conducting thorough verification and validation processes to ensure the highest quality of emulation models.
• Providing technical guidance and mentorship to junior team members when necessary.

As a member of the Emulation Transactor Development Team, you will work closely with various teams across the organization to ensure the highest quality in our products. Our collaborative and inclusive environment encourages innovation, continuous learning, and personal growth.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are: You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in a fast-paced, dynamic environment and are excited by the opportunity to work on next-generation connectivity protocols that power commercial, enterprise, and automotive applications. With a solid foundation in Electrical/Electronics Engineering (BSEE with 5+ years or MSEE with 3+ years of relevant experience), you bring deep expertise in System Verilog and industry-standard verification methodologies such as UVM/OVM/VMM. Your hands-on experience developing HVL-based test environments and extracting meaningful verification metrics sets you apart as a technical leader.

You are a collaborative team player who values knowledge sharing and actively contributes to a culture of continuous improvement. Your familiarity with protocols like MIPI-I3C, UFS, AMBA, Ethernet, DDR, PCIe, and USB allows you to quickly ramp up on new projects and deliver results. You bring a strong analytical mindset, exceptional debugging skills, and a drive to meet and exceed quality metrics. Experienced with scripting languages like Perl, TCL, and Python, you automate processes for efficiency and scalability. Your strong communication skills, initiative, and global perspective enable you to work effectively with cross-functional and multi-site teams. Above all, you are a lifelong learner who embraces challenges, adapts to new technologies, and is committed to shaping the future of silicon design.

What You’ll Be Doing: Specify, architect, and implement advanced verification environments for DesignWare IP cores using System Verilog and state-of-the-art methodologies. Develop and execute comprehensive test plans, ensuring coverage of unit-level and system-level requirements. Design, code, and debug testbenches, test cases, and functional coverage models to validate complex IP functionalities. Perform functional coverage analysis and manage regression testing to achieve and maintain required quality metrics. Collaborate closely with RTL designers and global verification teams to resolve issues and drive verification closure. Leverage scripting (Perl, TCL, Python) to automate verification flows, streamline processes, and enhance productivity. Contribute to the development and refinement of verification methodologies, including VIP development and formal verification approaches.

The Impact You Will Have: Ensure the delivery of high-quality, robust IP cores that power critical applications in commercial, enterprise, and automotive markets. Drive innovation in verification methodologies, setting new standards for efficiency and coverage. Enhance time-to-market by identifying and resolving design and verification issues early in the development cycle. Strengthen Synopsys’ reputation as a leader in silicon IP and verification through technical excellence and customer focus. Mentor and support junior engineers, fostering a culture of learning and continuous improvement. Contribute to the success of global, multi-site R&D teams by providing expertise and driving cross-functional collaboration.

What You’ll Need: BSEE with 5+ years or MSEE with 3+ years of relevant experience in ASIC or IP verification. Expertise in developing HVL (System Verilog)-based verification environments and testbenches. Strong hands-on experience with industry-standard simulators (VCS, NC, MTI) and debugging tools. Proficiency in verification methodologies such as UVM, OVM, or VMM; exposure to formal verification is highly desirable. Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB. Familiarity with scripting languages (Perl, TCL, Python) and HDLs (Verilog); experience with VIP development is a plus. Demonstrated ability to work with functional coverage-driven methodologies and quality metric goals.

Who You Are: Analytical thinker with strong problem-solving and debugging skills. Excellent verbal and written communication abilities. Team player who thrives in collaborative, multi-site environments. Proactive, self-motivated, and able to take initiative on challenging projects. Detail-oriented, quality-focused, and driven by a desire to excel. Adaptable and eager to continuously learn and apply new technologies.

The Team You’ll Be A Part Of: You will join the Solutions Group’s DesignWare IP Verification R&D team, a highly skilled and diverse group of engineers dedicated to delivering world-class IP cores for next-generation connectivity. The team operates in a collaborative, multi-site environment, leveraging global expertise to solve complex verification challenges. Together, you will drive innovation, share knowledge, and uphold Synopsys’ reputation for technical leadership and excellence.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

A peek inside our office

Benefits: At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

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We currently have 614 open roles

You are a visionary leader and technical expert with a passion for driving customer success in advanced semiconductor design. You thrive in dynamic, collaborative environments and excel at building and leading high-performance teams. With extensive experience in 3DIC design and multiphysics analysis, you have a proven track record of delivering innovative solutions to complex technical challenges.

Responsibilities

• Lead and mentor a team of applications engineers and sales specialists focused on 3DIC technology, fostering technical excellence and professional growth.
• Drive customer engagements, ensuring successful adoption and deployment of Synopsys 3DIC solutions across key accounts.
• Collaborate with R&D, product management, and account teams to define product direction and influence the 3DIC roadmap based on customer feedback and market demands.
• Develop and implement strategies for solving complex technical challenges related to 3DIC design, integration, packaging, and verification.
• Represent Synopsys at industry events, conferences, and customer meetings, showcasing thought leadership and technical expertise.
• Oversee the creation and delivery of technical collateral, including application notes, best practices, and training materials.
• Ensure continuous improvement of customer support processes and technical engagement models to maximize customer success and satisfaction.

Impact

• Leverage Ansys market-leading multiphysics analysis to accelerate the adoption of Synopsys' 3DIC solutions, driving revenue growth and expanding our leadership in advanced semiconductor markets.
• Shape the future of 3DIC technology through strategic customer partnerships and by influencing product innovation.
• Empower customers to overcome technical barriers, enabling them to deliver next-generation, high-performance silicon solutions.
• Enhance Synopsys' reputation as a trusted technology partner and thought leader in the 3DIC space.
• Drive cross-functional collaboration to deliver seamless, integrated solutions that address critical industry challenges.
• Foster a high-performance team culture that attracts, develops, and retains top engineering talent.
• Ensure customer feedback and market insights are systematically integrated into product development cycles.

Requirements

• Deep technical expertise in 3DIC planning, design, multiphysics analysis, and verification methodologies (EDA tools, advanced packaging, TSV, HBM, etc.).
• Proven leadership experience managing large, geographically distributed applications engineering or technical sales teams.
• Strong background in semiconductor design flows, system integration, and silicon implementation.
• Excellent problem-solving skills, with the ability to diagnose and resolve complex technical issues in real-time customer environments.
• Familiarity with industry standards and trends in advanced node technologies, packaging, and chiplet architectures.
• Experience collaborating with product management, R&D, and sales to drive product direction and customer success.

Team

You will lead the 3DIC Technical Sales and Applications Engineering team, a group of industry experts dedicated to enabling customer success with Synopsys' most advanced semiconductor technologies. The team works at the intersection of engineering, customer engagement, and product innovation, playing a pivotal role in shaping the future of 3DIC design. Together, you will drive technical excellence, foster strong customer relationships, and collaborate across Synopsys to deliver transformative solutions that set new industry standards.

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Sr. Manager of R&D Engineering, you will lead a team of engineers in developing cutting-edge CMOS embedded memory technologies. You will be responsible for designing architecture and circuit implementation for ultra-high-speed, ultra-low-power, or high-density designs. You will also perform schematic entry, circuit simulation, layout planning, and supervision, as well as verify and validate designs to ensure high quality and performance.

The ideal candidate will have a strong background in memory compiler development, with a minimum of 8-10 years of experience in CMOS memory design, circuit simulation, and memory layout design. You will also have experience with layout parasitic extraction and verification tools, as well as programming skills in C-Shell, Perl, C++, or JavaScript.

As a leader, you will be responsible for mentoring and guiding a team of engineers, enhancing workflows and methodologies, and driving project success. You will also be expected to communicate effectively with cross-functional teams, including CAD and Frontend engineers, to automate memory compilers and generate EDA models.

At Synopsys, we offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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This role is for a Pre-Silicon Signoff Lead who will be responsible for leading simulation and sign-off activities that guarantee reliability and performance. The ideal candidate will have a rich background in high-speed serial communication and advanced transceiver design, with expertise in theoretical modeling and hands-on lab work.

Key responsibilities include collaborating closely with analog, digital, and hardware teams to ensure comprehensive design and verification coverage, developing and maintaining robust simulation and verification plans for IP, and reviewing progress against verification plans through regular meetings with multiple verification teams.

The successful candidate will have a strong command of simulation, verification, and hardware validation processes, with experience in high-speed protocols such as PCIe and Ethernet. They will also have a proven track record of leadership in testbench architecture, planning, cross-site collaboration, and mentoring.

As a member of our world-class engineering team, you will drive innovation, tackle complex challenges, and ensure our products empower customers to achieve their goals in enterprise, data center, and networking applications.

If you are an innovative and forward-thinking engineer with a passion for advancing connectivity technologies, we encourage you to apply for this exciting opportunity.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An experienced and passionate ASIC Digital Design Engineer who thrives in dynamic and collaborative environments. You have a proven track record in RTL design and verification, and you are excited about contributing to cutting-edge technology. With your extensive expertise, you can handle complex and unique issues, often requiring innovative solutions. You are adept at communicating with both internal and external stakeholders, ensuring that your designs meet the highest standards of quality and performance.

What You’ll Be Doing:

• Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.
• Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.
• Developing and executing comprehensive test plans to verify the functionality and performance of your designs.
• Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.
• Mentoring junior engineers, providing guidance and support to help them grow their skills and contribute effectively to the team.
• Staying up to date with the latest industry trends and technologies, continuously improving your skills and knowledge.

The Impact You Will Have:

• Driving innovation in ASIC design, contributing to the development of cutting-edge technology that shapes the future.
• Ensuring the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.
• Enhancing the overall quality and performance of Synopsys' products through meticulous design and verification processes.
• Collaborating with cross-functional teams to solve complex design challenges, ensuring seamless integration and functionality.
• Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement within the team.
• Contributing to Synopsys' reputation as a leader in the semiconductor industry through your expertise and innovative solutions.

What You’ll Need:

• Extensive experience in ASIC digital design and verification, with a strong background in RTL design, using industry standard HDLs; Verilog, SystemVerilog.
• Proficiency in using industry-standard EDA tools and methodologies for design and verification.
• Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC design, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).
• Broad knowledge of the full digital ASIC and IP development flow, including RTL design, lint, CDC, RDC, synthesis and STA.
• Experience with power analysis and RTL level power optimization techniques.
• Familiarity with verification languages and methodologies; SystemVerilog, SVA, UVM.
• Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
• Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.

Who You Are:

• A proactive and self-motivated individual who takes initiative and acts independently with minimal oversight.
• A strategic thinker with the ability to implement goals that have a direct impact on department results.
• A detail-oriented engineer who works meticulously to ensure the highest standards of quality and performance.
• A collaborative team player who thrives in dynamic and fast-paced environments.
• A lifelong learner who stays up to date with the latest industry trends and continuously seeks to improve their skills and knowledge.

The Team You’ll Be A Part Of:

You will be part of a highly skilled and dynamic ASIC Digital Design team focused on delivering high-performance and reliable ASIC solutions. Our team collaborates closely with various departments, including analog design, physical design, and applications engineering, to ensure the seamless integration of all design components. We are committed to continuous learning and improvement, fostering a culture of innovation and excellence.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Sr. Staff Engineer, you will be a key member of our Emulation/Validation team, responsible for bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.

Key responsibilities include:

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.
• Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.
• Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.

The impact you will have includes enhancing cross-functional collaboration to elevate product quality and end-customer satisfaction, transforming the approach to Emulation IP usage in validating cutting-edge digital designs and system architectures, and driving innovation by defining and refining requirements for IP product development, particularly in emulation contexts.

To succeed in this role, you will need 8+ years of relevant experience in emulation, verification, or IP product development, expert-level knowledge of PCIe/ DDR/ Ethernet interfaces, including protocol and verification strategies, extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification, and a demonstrated track record in leading IP product development initiatives with a focus on emulation.

If you are a proactive and collaborative problem-solver with a passion for excellence, innovative thinker who embraces change and seeks out opportunities for continuous improvement, strong communicator able to articulate complex technical concepts to diverse audiences, resilient and adaptable, thriving in dynamic environments and embracing new challenges, and committed to mentoring others and fostering an inclusive, team-oriented culture, then we encourage you to apply for this exciting opportunity.

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We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a passionate and driven Physical Design Engineer with a strong foundation in RTL2GDSII flows and a proven ability to independently own and deliver complex designs. With at least 5 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges. Your expertise spans the entire physical design spectrum,from synthesis, place & route, and clock tree synthesis (CTS) to timing optimization, static timing analysis (STA), timing closure, EMIR, and physical verification. You have experience in both block-level and full-chip floor-planning, and you’re adept at navigating timing constraints and closing timing on aggressive schedules. Your toolset includes industry-leading Synopsys solutions like Design Compiler, IC Compiler II, and PrimeTime, allowing you to deliver optimal results for high-frequency, low-power designs.

Beyond your technical skills, you are a collaborative team player who communicates effectively across global teams, valuing diversity of thought and experience. You are motivated by problem-solving, have a keen analytical mindset, and are always seeking opportunities to automate and optimize workflows using Python, PERL, TCL, or other scripting languages. You take ownership of your work and pride yourself on delivering high-quality, robust solutions that drive organisational success. If you are excited about contributing to leading-edge silicon design and want to make a tangible impact, Synopsys is the place for you.

What You’ll Be Doing:

• Independently own and drive full RTL2GDSII physical design implementation for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.
• Execute synthesis, place & route, clock tree synthesis (CTS), timing optimisation, and static timing analysis (STA) to meet stringent performance and power targets.
• Perform block-level and full-chip floor-planning, physical verification, EMIR analysis, and timing closure activities.
• Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.
• Utilise and optimise Synopsys EDA tools, including Design Compiler, IC Compiler II, and PrimeTime, to deliver state-of-the-art silicon solutions.
• Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.
• Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.

The Impact You Will Have:

• Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.
• Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.
• Drive technical excellence and best practices within the team, influencing the future direction of physical design methodologies at Synopsys.
• Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.
• Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.
• Support strategic customer engagements and help expand Synopsys' presence in the semiconductor ecosystem through successful project outcomes.

What You’ll Need:

• Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.
• 5+ years of relevant experience in physical design, particularly in advanced technology nodes (7nm/5nm/3nm).
• Comprehensive hands-on experience with RTL2GDSII flows, including synthesis, place & route, CTS, timing optimisation, STA, EMIR, and physical verification.
• Proficiency with Synopsys EDA tools such as Design Compiler, IC Compiler II, and PrimeTime.
• Strong scripting and automation skills using Python, PERL, TCL, or similar languages.
• Solid understanding of timing constraints, timing closure, and floor-planning techniques for both block-level and full-chip designs.
• Exposure to high-frequency design and low-power design methodologies.

Who You Are:

• Proactive, self-motivated, and driven to achieve technical excellence.
• Exceptional problem-solving and analytical skills with a keen attention to detail.
• Excellent communication and interpersonal abilities, comfortable working in diverse and global teams.
• Collaborative team player who values knowledge sharing and mentoring others.
• Adaptable and open to learning new technologies and methodologies in a rapidly evolving field.

The Team You’ll Be A Part Of:

You’ll join a world-class team of physical design engineers at Synopsys, dedicated to delivering innovative system design solutions for our global customers. Our team thrives on collaboration, technical excellence, and a shared passion for pushing the boundaries of semiconductor design. Working closely with experts across multiple domains, you will play a key role in empowering customers to achieve their silicon goals while contributing to Synopsys’ leadership in the industry.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits:

At Synopsys, innovation is driven by our incredible team around the world. We feel honoured to work alongside such talented and passionate individuals who choose to make a difference here every day. We’re proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• Time Away

In addition to company holidays, we have ETO and FTO Programs.

• Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ESPP

Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.

• Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• Compensation

Competitive salaries.

** Benefits vary by country and region - check with your recruiter to confirm

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Key responsibilities include:

• Drive HAV and use case product planning activities, including feature definition, roadmap development, and SW planning activities.
• Collaborate closely with customers and internal stakeholders to understand customer requirements, translate customer challenges and pain points into clear actionable product requirements through creating MRDs and PRDs.
• Drive strong technical program management for key projects, programs, and initiatives. Creating and managing tracking and execution dashboards for planning and program management.
• Drive cross-functional product core teams to define product requirements, project milestones, and drive program execution.
• Generate product collateral, including SW and product roadmaps, product overviews, white papers, and blogs.

As a HAV Product Management Director, you will have a significant impact on the success of our HAV product line. You will be responsible for driving revenue growth through strategic product management and effective program management. You will also have the opportunity to transform product strategies into actionable plans that drive business growth and innovation.

To be successful in this role, you will need to have a deep understanding of System SW or Semiconductor development methodologies or Electronic Systems. You will also need to have strong knowledge of Hardware Assisted Verification (HAV) flows and use cases. Additionally, you will need to have proven experience in product planning, requirements gathering, and definition. Strong expertise in technical program management and driving cross-functional teams to deliver on time and with quality is also required.

If you are a strategic thinker with a passion for innovation and technology, and you have a proven track record of driving high-impact projects on time and within budget, then we encourage you to apply for this exciting opportunity.

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As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.

You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.

You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.

You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.

You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.

To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.

You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.

You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.

Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.

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Applications Engineering, Staff Engineer_ICV

Hsinchu, Taiwan

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Category: EngineeringHire Type: Employee

Job ID 16575Date posted 03/23/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and passionate engineer, eager to make a tangible impact on the semiconductor industry by leveraging your expertise in design flows and customer applications. You thrive in collaborative and fast-paced environments, bringing both technical depth and adaptability to every challenge. Your ability to communicate complex ideas clearly to both technical and non-technical stakeholders makes you a trusted advisor and partner. You are committed to delivering exceptional customer experiences, always seeking innovative solutions that address client needs and drive success.

With a solid foundation in ASIC design, VLSI, and CAD engineering, you continuously expand your knowledge to stay ahead of industry trends. You possess a keen analytical mind, capable of troubleshooting and resolving intricate issues efficiently. Your creative problem-solving skills and meticulous attention to detail ensure that projects are executed flawlessly from conception through completion. You enjoy mentoring others and contributing to moderately complex aspects of projects, enhancing team performance.

You embrace diversity, respect different perspectives, and believe in the power of inclusion to foster innovation. Your dedication, resilience, and positive attitude enable you to thrive in dynamic environments, and you’re motivated by the opportunity to support key foundry customers and help shape the future of electronic design automation. If you’re ready to elevate your career and make a difference, Synopsys is the place for you.

What You’ll Be Doing:

• Managing and providing ICV runset support for key foundry partners, ensuring seamless integration and optimal performance of Synopsys products.

• Delivering post-sales technical expertise throughout the runset programming, implementation, and ongoing maintenance cycles.

• Translating detailed customer installation requirements into actionable solutions, customizing product configurations as needed.

• Collaborating with clients to ensure their needs are fully met and Synopsys solutions function according to specifications.

• Offering pre-sales technical support, contributing to sales efforts by addressing technical queries and demonstrating product capabilities.

• Serving as a subject matter expert in EDA tool products, guiding customers through verification, place and route, design reuse, and physical design challenges.

The Impact You Will Have:

• Enhancing customer satisfaction by delivering tailored, high-quality technical solutions and ongoing support.

• Driving successful adoption of Synopsys products within key foundries, solidifying long-term partnerships and business growth.

• Contributing to the continuous improvement of runset programming and installation processes, raising industry standards.

• Supporting the sales team with technical insights, helping to win new business and expand Synopsys’s market reach.

• Identifying opportunities for innovation and improvement in EDA tools, directly influencing product development and competitiveness.

• Mentoring junior team members and sharing best practices, fostering a collaborative and high-performing work environment.

What You’ll Need:

• Basic understanding of the design process; familiarity with Design Rule Manuals (DRM) is preferred.

• Strong communication skills, capable of conveying technical concepts clearly to diverse audiences.

• Solid grasp of ASIC design flows, VLSI, and/or CAD engineering principles.

• Experience or knowledge of competitive EDA tool products, with expertise in verification, place and route, design reuse, and/or physical design.

• Demonstrated ability to manage projects from start to completion, contributing to moderately complex aspects of technical initiatives.

Who You Are:

• Creative and resourceful problem solver, able to think outside the box and address challenges proactively.

• Judicious decision-maker, skilled in selecting effective methods and techniques for optimal solutions.

• Collaborative team player with a strong sense of ownership and accountability.

• Adaptable and resilient, comfortable navigating evolving priorities and customer requirements.

• Inclusive and respectful, valuing diverse perspectives and fostering a positive team culture.

The Team You’ll Be A Part Of:

You’ll join a dynamic Customer Application Services team based in Taiwan, dedicated to supporting key foundry partners and advancing Synopsys’s leadership in EDA solutions. The team is composed of experienced engineers and technical experts who collaborate closely with customers, sales, and product development groups. Together, you’ll tackle complex challenges, drive innovation, and ensure the successful implementation of industry-leading design automation tools.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are a passionate and detail-oriented engineering professional who thrives in collaborative environments and enjoys working at the intersection of technology and customer engagement. You possess a deep understanding of VLSI and Design for Testability (DFT) methodologies, and you are eager to use your expertise to drive innovation in semiconductor design.

Collaborating with leading semiconductor design companies to understand their engineering methodologies and unique challenges. Partnering with Account and R&D teams to develop, implement, and optimize stable and scalable tool solutions tailored to customer needs. Gathering and refining technical requirements, providing regular updates, and ensuring alignment across cross-functional teams. Applying advanced Design for Testability (DFT) concepts, including scan insertion, to enhance the reliability and manufacturability of customer designs. Delivering impactful presentations and hands-on demonstrations to customers, highlighting the value and capabilities of Synopsys solutions. Monitoring industry developments and integrating the latest advancements into customer engagements and tool methodologies. Automating workflows and customizing solutions using scripting languages such as TCL, Python, or Perl.

Empowering semiconductor companies to streamline their design processes and achieve higher quality outcomes. Driving customer satisfaction by delivering robust, scalable, and innovative solutions that address real-world engineering challenges. Enhancing the adoption and effectiveness of Synopsys toolsets through expert guidance and technical support. Contributing to the evolution of industry best practices in Design for Testability and automation. Facilitating strong partnerships between Synopsys and its customers, fostering long-term collaboration and success. Enabling faster time-to-market and improved product reliability for customer designs. Helping Synopsys maintain its leadership position in semiconductor innovation and technology advancement.

Master’s degree (M.Tech or equivalent) in Electrical Engineering, Computer Engineering, or related field. 3+ years of relevant experience in semiconductor design, DFT, or related domains. Strong understanding of VLSI design principles and DFT methodologies. Expertise in DFT scan insertion and related verification techniques. Proficiency with scripting languages such as TCL, Python, or Perl for automation and tool customization. Experience with semiconductor design tools and tool flows is highly desirable.

Excellent communicator, able to present complex technical concepts clearly to diverse audiences. Collaborative team player who thrives in cross-functional environments. Analytical thinker with strong problem-solving skills and a proactive approach. Adaptable and resilient, comfortable working in a fast-paced and dynamic industry. Customer-focused, always seeking to deliver value and build positive relationships. Continuous learner, passionate about staying at the forefront of industry trends and technologies.

You’ll join a dynamic, highly skilled team of Application Engineers and Product Specialists dedicated to advancing semiconductor design methodologies and delivering value to customers. The team collaborates closely with Account Managers and R&D experts, ensuring that customer requirements are met with innovative, reliable, and scalable solutions. Together, you will contribute to Synopsys’ reputation for excellence, support each other’s growth, and drive the future of technological innovation in the semiconductor industry.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your key responsibilities will include working in a Digital and Verification Development team during the development and validation of complex digital mixed signals for high-speed interface IP. You will plan tests, checklists, coverage, and assertion planning. You will create detailed verification environments from functional specifications. You will apply advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification. You will write test cases, checkers, and coverage that implement the verification test plan. You will debug simulations, including those of real signals modeled using SystemVerilog for analog. You will perform RTL, GLS, and co-simulations and ensure coverage closure. You will participate in technical reviews and contribute actively. You will provide customer support with the bring-up of IP in customer simulation environments. You will follow and improve development processes to ensure high-quality output.

To be successful in this role, you will need a BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications. You will require 2+ years of experience in design verification. You will need strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal). Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus. You will require proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.

As a highly responsible and result-oriented individual, you will excel in this role if you have excellent English communication skills, both verbal and written. You will be a great team player, willing to support others. You will be self-motivated and highly enthusiastic about technology and solving problems.

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At Synopsys, we value diversity and inclusion. We are committed to creating a workplace where everyone feels valued and supported to do their best work.

Responsibilities: Assist SiCADA instructor in developing VDM (Verilog Design Methodology) & ADV (Advanced Design Verification) homework specifications. Assist in reviewing ADV course materials, including SVTB (SystemVerilog Testbench) and UVM (Universal Verification Methodology), and update the course content. Serve as a teaching assistant for the VDM and ADV courses, helping to answer student questions and grade assignments. Support SoC implementation course especially STA and UPF teaching assistance if possible.

Benefits: Professional development opportunities Collaborative and dynamic work environment Flexible work arrangements

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Applications Engineering, Sr Engineer

Hsinchu, Taiwan

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Category: EngineeringHire Type: Employee

Job ID 15949Date posted 03/08/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a proactive, customer-oriented engineer passionate about advancing semiconductor technologies. You thrive in fast-paced environments and are eager to solve complex technical challenges, collaborating with leading foundries and design teams. You possess a strong foundation in ASIC design flow, VLSI, and CAD engineering, and are comfortable navigating the intricacies of EDA tools and physical design. Your communication skills enable you to build trust with customers, translating their needs into actionable solutions and ensuring seamless product implementation. You are resourceful, adaptable, and able to exercise sound judgment while tackling technical issues. Your creative approach to problem-solving and drive for excellence enable you to contribute meaningfully to both individual projects and broader team initiatives. You value diversity and inclusivity, and you are committed to continuous learning, staying current with industry trends and emerging technologies. By joining Synopsys, you seek to make a tangible impact on the future of high-performance silicon, and you are motivated by opportunities to grow, innovate, and collaborate in a global, supportive environment.

What You’ll Be Doing:

• Managing and providing ICV runset support for key foundry customers, ensuring optimal product performance and customer satisfaction.

• Delivering post-sales technical expertise during the runset programming, implementation, and maintenance of Synopsys products.

• Implementing detailed customer installation requirements and customizing solutions to fit unique client environments.

• Ensuring client needs are met and that Synopsys solutions function according to technical specifications and industry standards.

• Collaborating with sales teams to provide pre-sales technical support, contributing to successful business development and customer onboarding.

• Troubleshooting and resolving moderately complex technical issues

• Empowering customers to efficiently deploy and maximize the value of Synopsys EDA solutions in their design workflows.

• Enhancing customer satisfaction and strengthening long-term partnerships with key foundry clients.

• Driving successful product adoptions and implementations, contributing directly to Synopsys’ market leadership.

• Supporting the technical excellence of customer projects, enabling innovative chip design and verification outcomes.

• Facilitating knowledge transfer, helping customers understand and leverage advanced product features.

• Identifying opportunities for product improvements and feeding insights back to development teams for continuous innovation.

What You’ll Need:

• Basic understanding of the design process, with a preference for Design Rule Checking (DRC).

• Solid grasp of ASIC design flow, VLSI concepts, and/or CAD engineering principles.

• Familiarity with competitive EDA tool products and expertise in areas such as Verification, Place and Route, Design Reuse, and/or Physical Design.

• Ability to manage projects from initiation through completion, delivering high-quality technical solutions.

• Creative problem-solving skills and the ability to exercise judgment in selecting methods and techniques to obtain solutions.

Who You Are:

• Collaborative and effective communicator, able to build strong relationships with customers and internal teams.

• Resourceful and adaptable, thriving in dynamic, fast-paced environments.

• Detail-oriented with strong analytical skills and a commitment to delivering exceptional results.

• Open-minded and inclusive, embracing diverse perspectives and fostering an environment of belonging.

• Self-motivated and eager to learn, continuously seeking opportunities for growth and innovation.

The Team You’ll Be A Part Of:

You will join the Customer Application Services team, a group of passionate engineers dedicated to delivering technical excellence and customer success. The team works closely with foundries, design teams, and sales professionals, providing deep expertise and support throughout the product lifecycle. You’ll collaborate in a culture of innovation, knowledge sharing, and mutual respect, where every member’s contribution is valued and celebrated.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Sales Account Management, Sr Staff - HiTech

Shanghai, Shanghai Municipality, China

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Category: SalesHire Type: Employee

Job ID 16465Date posted 03/22/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned sales professional with a passion for connecting technology solutions to customer needs. You thrive in dynamic environments, leveraging your deep understanding of the semiconductor industry to build meaningful relationships and drive business growth. You possess a strategic mindset, consistently identifying opportunities to expand market share and deliver value to clients. Your high energy and collaborative spirit make you a trusted partner both internally and externally. You are adept at navigating complex sales cycles, communicating technical concepts to varied audiences, and negotiating win-win outcomes. Comfortable with ambiguity, you proactively seek solutions, adapt to evolving priorities, and inspire your team to achieve ambitious goals. You value diversity and inclusion, recognizing the power of varied perspectives in delivering exceptional results. Your commitment to excellence is evident in your meticulous attention to detail, relentless pursuit of targets, and dedication to continuous learning. You are motivated not only by individual success but by contributing to the broader mission of Synopsys, helping to shape the future of technology in Shanghai and beyond.

What You’ll Be Doing:

• Developing and executing strategic account plans for key customers in the semiconductor, electronics, and software sectors.

• Building and maintaining long-term relationships with clients, ensuring high levels of satisfaction and retention.

• Identifying new business opportunities, driving revenue growth through solution-based selling.

• Collaborating closely with technical teams to align Synopsys’ offerings with customer requirements and market trends.

• Managing complex sales cycles, including contract negotiations, pricing discussions, and closing deals.

• Providing market insights and feedback to internal stakeholders to inform product development and business strategy.

• Representing Synopsys at industry events, conferences, and customer meetings to showcase our innovative solutions.

The Impact You Will Have:

• Drive significant revenue growth across the Greater China region, contributing to Synopsys’ global expansion.

• Strengthen Synopsys’ market position by developing deep customer relationships and identifying strategic opportunities.

• Influence product direction by bringing customer feedback and market intelligence to internal teams.

• Enhance customer satisfaction by delivering tailored solutions and exceptional service.

• Foster cross-functional collaboration between sales, engineering, and marketing teams.

• Champion Synopsys’ brand and technology leadership within the industry.

What You’ll Need:

• Bachelor’s degree in Engineering, Business, or related field; Master’s preferred.

• 8+ years of sales experience, preferably within semiconductor, EDA, or high-tech industries.

• Proven track record of exceeding sales targets and managing enterprise-level accounts.

• Strong understanding of chip design, verification, and IP integration technologies.

• Exceptional negotiation, communication, and presentation skills.

• Familiarity with CRM tools and sales analytics platforms.

Who You Are:

• Strategic thinker with a results-driven mindset.

• Excellent problem-solving and analytical abilities.

• Collaborative team player who values diverse perspectives.

• Adaptable, resilient, and proactive in facing challenges.

• Customer-centric with strong relationship-building skills.

• Ethical, trustworthy, and committed to delivering value.

The Team You’ll Be A Part Of:

You’ll join a dynamic and highly skilled sales team focused on driving growth in Shanghai and the broader Greater China region. Our team collaborates closely with technical experts, marketing professionals, and global leadership to deliver innovative solutions tailored to customer needs. We foster a culture of support, knowledge sharing, and continuous improvement, empowering each member to achieve their full potential.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Job Summary

You are a passionate and driven professional with a profound mastery of hardware-assisted verification (HAV), using emulation and FPGA prototyping methodologies, with a sharp focus on performance optimization. Your expertise covers the entire lifecycle of HW/SW product development, from early RTL verification to software bring up and platform delivery.

Responsibilities

• Drive advanced product capabilities and innovations in emulation runtime performance for industry-leading platforms.
• Engage in the full product lifecycle, from feature definition and implementation to rigorous testing, quality measurement, and customer deployment.
• Collaborate closely with internal stakeholders, including Application Engineering peers and R&D teams, to deliver superior outcomes for customers.
• Provide technical leadership and product evaluation support to key emulation customers across the globe.
• Lead comprehensive root cause analyses to resolve and prevent emulation performance bottlenecks.
• Ensure the highest standards of verification for SoC designs, contributing to the creation of robust and reliable products.

What You’ll Need

• Minimum 12+ years of experience in emulation methodology, spanning early RTL verification to software bring up.
• Proven expertise in verification, with a focus on System on Chip (SoC) design bring-up and validation.
• Comprehensive knowledge of the architecture of emulation / FPGA prototyping platforms and their eco-systems.
• A good understanding of the compilation and runtime flows on these emulation platforms.
• Demonstrated experience in using debug features of these emulation platforms, and in conducting root cause analysis for emulation runtime performance issues.

Benefits

• Competitive salary and benefits package
• Opportunities for career growth and professional development
• Collaborative and dynamic work environment
• Recognition and rewards for outstanding performance

Who You Are

• A collaborative team player who thrives in dynamic, fast-paced environments.
• Detail-oriented and analytical, with exceptional problem-solving skills.
• Curious, adaptable, and eager to embrace new challenges and responsibilities.
• An effective communicator, skilled at conveying complex technical information to diverse audiences.
• An innovative thinker with a passion for continuous improvement and learning.

The Team You’ll Be A Part Of

You’ll join the Product Engineering (PE) team within the TPG division at Synopsys Bangalore office. This team is at the forefront of delivering and deploying next-generation performance technologies in ZeBu platforms to customers worldwide. As a pivotal member, you will engage in technically challenging projects with significant responsibilities and visibility, all while enjoying a supportive environment that fosters career growth, innovation, and professional development.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a global leader in semiconductor design and verification solutions, we enable the world's most advanced technology companies to deliver cutting-edge SoCs and systems. Our mission is to accelerate innovation through state-of-the-art verification IP, methodologies, and strategic consulting.

You are a passionate and analytical engineer with a proven track record in digital design and verification, ready to embrace the challenge of developing advanced embedded memory test and SLM architectures. You thrive in dynamic, collaborative environments where your technical expertise and innovative mindset can drive significant impact.

You are detail-oriented, always seeking to ensure design integrity and optimal performance through rigorous validation, debugging, and synthesis. Your hands-on approach extends to scripting and automation, enhancing productivity and accelerating development cycles. You communicate effectively with cross-functional teams, translating complex technical concepts for diverse stakeholders, and you enjoy mentoring and guiding others to achieve shared goals.

Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks. Performing digital design validation and functional verification at both block and SoC levels. Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs. Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing. Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance. Utilizing and scripting in languages such as Tcl to automate design and verification workflows. Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides.

Accelerate the delivery of reliable, high-performance SoCs for industry-leading technology companies. Shape the evolution of embedded memory test and SLM architectures that power next-generation devices. Drive innovation in simulation, emulation, and verification methodologies for advanced semiconductor products. Enhance customer satisfaction by delivering robust, easy-to-use IP and responsive technical support. Contribute to the continuous improvement of Synopsys' design and verification solutions, setting new industry benchmarks. Mentor and elevate team capabilities, fostering a culture of excellence, knowledge sharing, and mutual growth. Influence the adoption of best practices in DFT, protocol compliance, and subsystem integration across the organization. Support strategic decision-making by providing technical insights and market-driven recommendations.

2-4 years of relevant experience in ASIC digital design and verification. Proficiency in RTL simulation, logic synthesis, and timing verification tools. Strong understanding of DFT architectures. Familiarity with debug tools such as Verdi and workflows for performance analysis. Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl. Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking.

Analytical thinker with exceptional problem-solving skills. Effective communicator, able to collaborate across disciplines and with external partners. Proactive, self-motivated, and adaptable in fast-paced environments. Committed to quality, detail, and continuous learning. Team player who values diversity, inclusion, and mentorship. Customer-focused, dedicated to delivering timely and effective solutions.

You'll join a highly collaborative and innovative team of digital design and verification experts, working at the forefront of embedded memory test and SLM architecture development. The team bridges R&D, marketing, and customer engagement, driving the roadmap for advanced SoC solutions. With a culture of knowledge sharing, technical excellence, and mutual support, you'll thrive in an environment that values creativity, initiative, and a shared commitment to shaping the future of semiconductor technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Senior Product Sales Manager (Embedded Systems), you will be responsible for driving product sales activities for new and renewal business across assigned product lines to achieve or exceed revenue objectives.

Key responsibilities include:

• Selling products and services through both telephone and face-to-face interactions, adapting your approach to suit customer preferences.
• Collaborating with field sales, enterprise sales, and channel partners to develop and execute strategies that maximize product and service revenue.
• Identifying and uncovering opportunities in current and new accounts, seamlessly transitioning leads to direct sales teams for follow-up.
• Facilitating communication between sales and technical teams to share updates on product capabilities, success stories, and winning strategies.

In this role, you will have the opportunity to:

• Accelerate revenue growth and market share for assigned product lines through proactive sales and strategic partnerships.
• Enhance the visibility and reputation of Synopsys solutions within the industry by delivering impactful presentations and participating in conventions.
• Strengthen relationships with customers and partners, fostering loyalty and long-term engagement.

To succeed in this role, you will need:

• A bachelor's degree in technical, engineering, business, or related field; or equivalent sales/consulting experience.
• Minimum 4+ years of sales or consulting experience in engineering/technology applications with proven success, or 6+ years without a degree.
• Strong understanding of product market position and sales fundamentals.
• Ability to work cross-functionally with teams such as ACE, DEV, Marketing, PM, and across various hierarchies.
• Proven ability to foster collaboration and coordinate with globally distributed personnel.
• Aptitude for problem-solving and delivering tailored solutions for customers.
• Fluency in English and the local language of the territory.
• Willingness and ability to travel up to 50% as required.

If you are a driven and results-oriented sales professional with a passion for technology and engineering solutions, we encourage you to apply for this exciting opportunity.

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Responsibilities:

• Collaborate with R&D architects and customers on hardware-assisted verification products.

• Drive all aspects of the technology life cycle, from development to product sign-off and customer deployment.

• Define test strategies and methodologies to improve ease-of-use, quality of results, and interoperability with other Synopsys tools.

• Become an expert in emulation and prototyping methodologies and flows, including design, partitioning, testing, synthesis, and simulation-based verification.

• Leverage your close interaction with customers, R&D, Marketing, and Sales teams to demonstrate the differentiated emulation/verification environment.

• Adapt to recognised best practices and policies in Synopsys to become proficient in various processes involved in the Product Release Cycle.

• Work with designs from varied verticals to enable and support key ZeBu products in early-stage development.

The Impact You Will Have:

• Enhance Synopsys' emulation and prototyping solutions by driving technology development and customer deployment.

• Improve the ease-of-use, quality of results, and interoperability of Synopsys tools, contributing to overall product excellence.

• Provide expert consultation for solving complex problems, thereby increasing customer satisfaction and product adoption.

• Ensure successful execution of projects from start to completion, contributing to the timely delivery of high-quality products.

• Support the advancement of cutting-edge designs in various verticals such as HPC, AI, storage, networking, and automotive.

• Facilitate the proliferation of Synopsys' differentiated emulation/verification environment through close collaboration with multiple teams.

What You’ll Need:

• BSEE/MS with 7+ years of related experience.

• Expertise in Emulation and/or Prototyping flows, systems, and methodologies.

• Strong proficiency in Verilog, System Verilog, and VHDL.

• Understanding of verification concepts and experience with functional simulators.

• Experience with scripting languages.

• Knowledge in Simulation flows, Assertion, DPI, and Transactors.

• Complex problem-solving and debugging skills.

• Strong communication skills and the ability to interact with customers and peers.

• Knowledge in synthesis and timing analysis concepts (preferred).

• Familiarity with Synopsys solutions and tools like ZeBu, HAPS, VCS, Verdi, Proto Compiler, Synplify, DC, and Formality (preferred).

• Experience with Xilinx & Altera architecture and toolchains (preferred).

• Understanding of SW/HW debug methodologies and experience with standard SW/HW debug tools (preferred).

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a High-Speed Interface Digital Design Manager, you will be responsible for managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement. You will drive architecture specification, digital design, and verification activities for current and next-generation products, engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met.

Key responsibilities include:

• Leading a high-performing digital and verification engineering team focused on the design and delivery of advanced SerDes IP
• Managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement
• Driving architecture specification, digital design, and verification activities for current and next-generation products
• Engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met

Requirements include:

• Bachelor's or Master's degree in Electrical Engineering or related field
• 10+ years of hands-on digital design and verification experience in the semiconductor industry
• 5+ years of proven leadership and people management experience, preferably in ASIC or IP development environments
• Deep knowledge of the ASIC development flow, including architecture specification, digital design, and verification methodologies
• Experience with high-speed interface protocols (e.g., PCIe, Ethernet, USB) and digital signal processing techniques
• Expertise in managing customer escalations and facilitating technical discussions during pre- and post-sales phases
• Proficiency with industry-standard EDA tools, scripting, and project management platforms

Benefits include:

• Comprehensive medical and healthcare plans
• Time away programs
• Family support
• ESPP
• Retirement plans
• Competitive salaries

If you are a strong leader with excellent team-building and mentoring skills, a customer-focused and results-oriented individual with sound decision-making abilities, a collaborative communicator able to build strong cross-functional alliances, organized, detail-oriented, and adept at managing multiple priorities efficiently, adaptable, proactive, and committed to continuous improvement, we encourage you to apply.

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You are an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology. With 5-8 years of industry experience,primarily in Physical Verification (PV),you thrive on solving complex layout and verification challenges for advanced process nodes. You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

You are committed to continuous learning and improvement, keeping pace with evolving foundry processes and design for manufacturability (DFM) requirements. As a natural collaborator and mentor, you enjoy guiding junior team members and fostering a supportive team environment. Your excellent communication skills empower you to engage confidently with customers and field application engineers (FAEs), translating complex requirements into innovative solutions. You are detail-oriented, resourceful, and dedicated to exceeding customer expectations, making you a valuable asset to any high-performing engineering team.

Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies. Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions. Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team. Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys’ technical edge.

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You are a dynamic engineer with working experience in RTL implementation, DFT, verification, flow automation and understanding of 3DIC solutions and UCIe protocols. You should have a passion for working with the best of the brains in the industry in developing end-to-end solutions and deploying them at our premier customer base. Your technical excellence and analytical skills, coupled with strong communication and interpersonal skills, make you an asset to any team.

Key responsibilities include:

• Working closely with a world-class R&D team, you’ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM) and 3DIC technologies.

• Working closely with customers, you will bring detailed requirements into the factory to enable R&D for strong, robust, and successful product development.

• Working closely with product development team, you will validate an end-to-end solution both internally (before shipment) as well as in customer environment.

• Driving the deployment and smooth execution of SLM solutions into customers’ projects.

• Enabling customers to realize the value of silicon health monitoring in the context of 3DIC systems throughout the lifecycle of silicon bring-up, validation, through in-field operations.

The impact you will have includes enhancing Synopsys’ Silicon Lifecycle Management (SLM) and 3DIC solutions’ IP portfolio and end-to-end solution especially in the growing field of multi-die (3DIC) domain, driving the adoption of Synopsys’ SLM and 3DIC solutions at premier customer base worldwide, and influencing the development of next-generation SLM IPs and solutions.

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We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned analog design engineer with deep expertise in high-speed SERDES IP. You thrive on solving complex circuit challenges, leading technical initiatives, and collaborating across multidisciplinary teams. Your track record in advanced CMOS design, effective communication skills, and passion for innovation make you a trusted mentor and a key contributor to project and team success.

What You’ll Be Doing:

• Develop and specify SERDES transceiver architectures and sub-blocks based on standards.
• Design, simulate, and verify high-speed analog circuits for optimal power and performance.
• Collaborate with analog, digital, and CAD teams to ensure design quality and efficiency.
• Present technical results internally and externally to customers and industry groups.
• Oversee physical layout to address parasitics and reliability concerns.
• Document features and test plans, and support post-silicon analysis and updates.

The Impact You Will Have:

• Advance industry-leading SERDES IP for next-generation SoCs.
• Enhance product differentiation and customer value.
• Streamline design processes for quality and time-to-market.
• Mentor junior team members and share best practices.
• Influence technical direction and innovation at Synopsys.
• Support customer success and product reliability.

What You’ll Need:

• Ph.D. with 6+ years or M.Sc. with 8+ years of analog IC design experience.
• Expertise in transistor-level CMOS design and SERDES sub-circuits.
• Proficiency with schematic, layout, and verification tools; SPICE simulators.
• Experience with scripting languages (Verilog-A, TCL, Python, etc.).
• Strong communication and documentation skills.

Who You Are:

• Technical leader and mentor
• Collaborative and proactive
• Analytical and detail-oriented
• Adaptable and innovative

The Team You’ll Be A Part Of:

A collaborative, high-performing analog and mixed-signal design group focused on developing advanced SERDES IP for leading-edge applications. The core purpose of the team is the development of 224-Gb/s Ethernet SerDes Transceivers for network infrastructure ICs, driving the future of high-speed connectivity in data centers and communications networks for the world.

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They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.

Job Description

Date posted: 03/29/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a forward-thinking engineer with a passion for leveraging cutting-edge AI technologies to revolutionize electronic design automation and verification. You thrive in dynamic environments where innovation, collaboration, and continuous learning are valued. Your experience in verification frontend flows and AI/ML frameworks enables you to bridge the gap between traditional engineering practices and intelligent automation. You are comfortable working across diverse teams, collaborating with design, verification, CAD, and methodology experts to identify impactful automation opportunities. You possess strong analytical skills, enabling you to dissect complex verification challenges and develop scalable GenAI solutions. Your commitment to professional growth is evident in your eagerness to stay current with the latest advancements in LLMs, GenAI, and verification technology. With a keen eye for detail and a drive to deliver high-quality results, you are adept at integrating AI-driven capabilities into established workflows, elevating productivity and efficiency. You value inclusivity and diverse perspectives, and you are motivated by the opportunity to shape the future of engineering through innovative, intelligent solutions.

What You’ll Be Doing:

• Develop and deploy LLM/GenAI-based solutions to enhance verification productivity across static, formal, and simulation-based flows in EDA tools.

• Collaborate cross-functionally with design, verification, CAD, and methodology teams to identify high-impact areas for AI-assisted automation.

• Build tools and frameworks to generate or refine assertions, constraints, checkers, and test intent, summarize design/spec content, and analyze logs, failures, and coverage gaps.

• Integrate LLM-driven capabilities into existing verification flows, tools, and automation infrastructure, ensuring seamless adoption.

• Develop and maintain scripts, data pipelines, and evaluation frameworks for AI-assisted verification use cases.

• Stay current with advances in LLMs, GenAI, verification technology, and digital design methodologies to inform best practices.

• Participate in technical reviews and help define scalable AI adoption strategies within verification environments.

The Impact You Will Have:

• Accelerate verification planning, setup, and closure, enabling faster time-to-market for complex digital designs.

• Enhance productivity and efficiency for engineering teams through intelligent automation and AI-driven solutions.

• Reduce manual effort and potential errors in verification by automating routine and complex tasks.

• Improve coverage analysis, debug processes, and testbench/content generation, resulting in higher quality silicon chips.

• Drive innovation in verification methodologies by integrating state-of-the-art GenAI capabilities.

• Foster cross-functional collaboration, contributing to robust and scalable verification strategies.

• Support Synopsys’ leadership in EDA technology and AI-driven engineering solutions.

What You’ll Need:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

• 5–8 years of experience in EDA software development with prior experience in developing GenAI-based tools.

• Hands-on experience with LLM/GenAI or AI/ML frameworks/tools such as PyTorch, TensorFlow, Hugging Face, LangChain, or equivalent.

• Proficiency in C++ and familiarity with Verilog, VHDL, or SystemVerilog.

• Strong understanding of verification frontend methodologies, including static analysis (CDC/RDC/Lint), formal/property-based verification, and simulation bring-up/debug.

• Experience with cloud or scalable compute platforms (AWS, GCP, Azure) is a plus.

• Familiarity with Agile development methodologies is desirable.

Who You Are:

• Innovative thinker with a passion for applying AI to real-world engineering challenges.

• Effective communicator, able to convey complex technical concepts to diverse audiences.

• Collaborative team player who thrives in cross-functional environments.

• Strong problem-solving abilities and analytical mindset.

• Adaptable, eager to learn, and comfortable with ambiguity in fast-evolving technology landscapes.

• Self-driven and proactive, with a commitment to delivering impactful solutions.

The Team You’ll Be A Part Of:

You will join a collaborative and innovative engineering team focused on advancing verification productivity through AI-driven solutions. The team works closely with design, verification, CAD, and methodology groups to identify and implement high-impact automation strategies. Together, you will drive the adoption of GenAI technologies within Synopsys’ EDA ecosystem, fostering a culture of continuous improvement and technological excellence.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key Responsibilities:

• Develop emulation solutions for PCIe, CXL, and UCIe protocols for semiconductor customers.
• Engage in software development using C/C++ and synthesizable RTL development with Verilog.
• Verify solutions to ensure high performance and reliability.
• Interact with customers during the deployment and debug phases to ensure smooth implementation.
• Collaborate with cross-functional teams to integrate emulation solutions.
• Maintain and enhance existing emulation solutions to meet evolving industry standards.

Impact:

• Drive the development of advanced emulation solutions that meet industry standards.
• Enhance the performance and reliability of semiconductor products through innovative solutions.
• Ensure customer satisfaction by providing robust and efficient deployment support.
• Contribute to the continuous improvement of Synopsys' emulation technologies.
• Support the adoption of new protocols and standards in the semiconductor industry.

Requirements:

• 5+ years of relevant experience
• In-depth knowledge of PCIe, CXL, and UCIe protocols.
• Proficiency in C/C++ programming and object-oriented programming concepts.
• Strong understanding of digital design principles and HDL languages such as System Verilog and Verilog.
• Experience with scripting languages like Python, Perl, or TCL.
• Familiarity with ARM architecture and UVM/functional verification is a plus.

Who You Are:

• A collaborative team player with excellent communication skills.
• A problem-solver with a keen eye for detail and a passion for innovation.
• Adaptable and able to work effectively in a fast-paced, dynamic environment.
• Customer-focused, with the ability to handle deployment and debugging challenges efficiently.
• Committed to continuous learning and staying updated with industry advancements.

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As a Digital Verification Sr Engineer, you will be responsible for working in a collaborative environment to develop and validate complex digital mixed signals for high-speed interface IP.

Key responsibilities include: Planning tests, checklists, coverage, and assertion planning. Creating detailed verification environments from functional specifications. Applying advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification. Writing test cases, checkers, and coverage that implement the verification test plan. Debugging simulations, including those of real signals modeled using SystemVerilog for analog. Performing RTL, GLS, and co-simulations and ensuring coverage closure. Participating in technical reviews and contributing actively. Providing customer support with the bring-up of IP in customer simulation environments. Following and improving development processes to ensure high-quality output.

Requirements include: BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications. 2+ years of experience in design verification. Strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal). Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus. Proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.

Ideal candidate will be highly responsible and result-oriented, with excellent English communication skills, both verbal and written. A great team player, willing to support others. Self-motivated and highly enthusiastic about technology and solving problems.

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Your focus will be in the areas of design planning, floorplanning, place and route, parasitic extraction, signal integrity analysis and prevention, IR drop/EM analysis and physical verification (DRC/LVS).

A secondary focus will be in static timing analysis, Low Power Static check and formal verification. You will work as a member of the customer's IC design team, leveraging their experience and Synopsys' best practices to have immediate impact on their current project while transferring valuable knowledge for future projects.

You will interact regularly with customers to identify and eliminate barriers to project success. You will plan and manage delivery of own project-related tasks. You will leverage entire Synopsys team to ensure project success. You will provide feedback to R&D/AE on suggested tool enhancements or issues.

You will work with or as Project Leader to develop technical proposals, working through project life cycle and produce consistently high-quality technical solutions.

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We are looking for a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will thrive in collaborative environments, bringing together diverse perspectives to solve complex challenges. With a strong foundation in RTL design and verification, you will approach every project with a sense of ownership and a commitment to excellence.

As an effective communicator, you will clearly articulate technical concepts to both internal teams and external customers, fostering strong partnerships and driving innovation. You will be adaptable, self-motivated, and resilient in the face of challenges, always seeking opportunities to learn and grow.

Your responsibilities will include designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance. You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.

You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies. You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

The impact you will have includes accelerating the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions. You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy.

You will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will have 5+ years of hands-on experience in RTL design and verification. You will be proficient in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.

You will be an analytical and critical thinker with a detail-oriented approach. You will be an effective communicator, comfortable collaborating across teams and with customers. You will be self-motivated and proactive in seeking solutions and driving projects forward.

You will join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions.

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big_They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Staff Engineer in our Analog Design team, you will be responsible for designing and developing full custom analog circuit macros for high-speed SERDES PHY IP.

Your responsibilities will include designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits.

You will also collaborate with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.

In addition, you will ensure analog sub-block performance adheres to SerDes standards and architecture specification documents.

You will lead verification strategies using advanced simulator features to guarantee the highest quality design outcomes.

You will oversee physical layout processes to minimize parasitic effects, device stress, and process variations.

You will present simulation data for peer and customer reviews, and document design features and test plans.

You will consult on electrical characterization and support the integration of your circuit within the SerDes IP product.

You will handcraft high-performance clock and data paths using digital/CMOS logic cells and verify timing margins with SPICE and STA tools.

You will address ESD and latch-up design verification, crosstalk coupling impacts, and ensure robust mixed-signal analog design.

The impact you will have includes accelerating development of high-performance silicon chips critical to emerging technologies like AI, IoT, and 5G.

You will optimize chip designs for power, cost, and performance, helping customers reduce project schedules by months.

You will advance Synopsys' leadership in high-speed interface IP and mixed-signal design innovation.

You will contribute to the creation of next-generation processes and models for manufacturing advanced chips.

You will support global collaboration, knowledge sharing, and technical excellence across teams and sites.

You will enhance customer satisfaction by delivering reliable, scalable, and high-quality analog IP solutions.

You will drive technical best practices and mentor junior engineers, strengthening the team's capabilities.

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As a Staff ASIC Digital Design Engineer, you will be part of our R&D Professional team, specializing in mixed-signal ASIC development and supporting HBM/DDR PHY IP customers. You will work with experts in design, implementation, and verification.

Key responsibilities include:

Creating and debugging test benches and test cases Running RTL and gate-level simulations Supporting application engineers and customers on HBM/DDR PHY topics Contributing to technical documentation Driving product improvements based on customer feedback

The ideal candidate will specialize in one of the following, experience in multiple areas would be a bonus:

ASIC RTL design and verification experience Verilog, PERL, TCL, Python skills Static timing analysis and synthesis knowledge Simulation and debugging abilities HBM/DDR protocol experience is an asset

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more details about salary and perks during the hiring process.

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You are a dynamic engineer with working experience in RTL implementation, DFT/BIST, verification, flow automation, and understanding of hierarchical SoC architectures and IEEE1149/1500 and 1687 standards and pattern porting. You should have a passion for working with the best of the brains in the industry in developing end-to-end solutions and deploying them in our premier customer base.

What You'll Be Doing:

• Working closely with a world-class R&D team, you'll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM) built over a robust DFT framework.
• Working closely with customers, you will bring detailed requirements into the factory to enable R&D for strong, robust, and successful product development.
• Working closely with product development team, you will validate an end-to-end solution both internally (before shipment) as well as in customer environment.
• Driving the deployment and smooth execution of SLM and Test solutions into customers' projects.
• Enabling customers to realize the value of silicon health monitoring using a robusta DFT framework throughout the lifecycle of silicon bring-up, validation, through in-field operations.

The Impact You Will Have:

• Enhancing Synopsys' Silicon Lifecycle Management (SLM) and DFT IP portfolio and end-to-end solution.
• Driving the adoption of Synopsys' SLM and DFT solutions at premier customer base worldwide.
• Influencing the development of next-generation SLM IPs and solutions.

What You'll Need:

• BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field.

• 8 years of hands-on experience with DFT/BIST insertion, RTL design, and functional verification.

• Good exposure to JTAGIEEE 1149.1, IEEE 1687/1500, Testdata access mechanism.

• Knowledge on memory defectivities soft errors and reliability.

• Familiarity with error correcting codes such as Hamming and Hsiao.

• Hands-on experience in dealing with hierarchical SoCs, 1149.1/1500/1687 standards and pattern porting.

• Familiarity with either Synopsys TestMAX Tool chain or competitive offerings.

• Debugging abilities to identify and resolve issues in functional verification in UVM environment.

• Hands on experience in flow automation.

• Knowledge of Synthesis is a must with understanding of timing constraints (SDC).

• Knowledge of Lint, CDC, RDC is a plus.

• Knowledge of physical implementation is not a must, but good to have.

• Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions.

• Customer facing experience is a plus – educating/guiding customer on technical details of a solution.

• Good to have:

• Hands-on bring-up and debug experience of silicon is a plus.

• Architecture/micro-architecture experience.

• Understanding of GenAI and Agentic AI workflows.

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As an experienced and visionary ASIC digital design architect, you will thrive in a fast-paced, collaborative environment. You will bring a passion for solving complex system-level challenges and a track record of delivering innovative, high-quality silicon solutions.

Your deep understanding of IP and SoC architectures enables you to see the big picture while meticulously refining subsystem details. You are comfortable navigating ambiguity, building consensus across diverse teams, and translating product requirements into robust, scalable architectures.

Your leadership inspires those around you, and you excel at mentoring and empowering engineers to reach their full potential. You are adept at balancing trade-offs across performance, power, area, and security, always striving for the optimal solution.

Communication is your strength,you articulate technical concepts clearly to both technical and non-technical stakeholders, ensuring alignment and shared understanding.

With a growth mindset, you embrace new challenges, technologies, and methodologies, continuously seeking opportunities to innovate and improve.

You value inclusion and diversity, recognizing that the best ideas emerge from a culture where everyone feels empowered to contribute.

As an IP Subsystems Architect, you will define architectural specifications for complex subsystems, translate system-level requirements into detailed subsystem architectures, and integrate multiple IP blocks into cohesive subsystems.

You will lead cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.

Establishing and guiding verification and validation strategies, including defining coverage requirements and participating in silicon bring-up and debug sessions.

Producing comprehensive architecture documents, specifications, and guidelines, and clearly communicating architectural intent to a wide range of stakeholders.

Mentoring and coaching engineers, driving best practices, and fostering a culture of technical excellence.

Shape the architecture of industry-leading silicon IP and subsystem solutions that power millions of devices worldwide.

Accelerate time-to-market for differentiated products by ensuring robust and efficient subsystem design and integration.

Reduce risk through rigorous requirements management, architectural clarity, and cross-functional alignment.

Enhance product performance, power efficiency, and reliability, directly impacting customer satisfaction and competitive advantage.

Foster innovation by mentoring teams, introducing new methodologies, and championing best practices.

Strengthen Synopsys’ position as a trusted technology leader in the semiconductor ecosystem.

Bachelor’s or Master’s degree in Electronics or a related field, with 15+ years of industry experience.

At least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture roles.

Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (e.g., SV UVM, BFM development).

Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.).

Experience with synthesis, lint, CDC, low-power flows, and achieving verification closure.

Strong documentation and communication skills for effective cross-team alignment and requirements management.

A strategic thinker with exceptional leadership and mentoring capabilities.

A collaborative partner who thrives in diverse, cross-functional teams.

An excellent communicator, able to tailor messaging for both technical and non-technical audiences.

Innovative and proactive, always seeking opportunities to improve processes and outcomes.

Resilient and adaptable, comfortable with change and ambiguity.

Committed to fostering an inclusive and empowering team culture.

Join the Digital IP Subsystems Team at Synopsys,a high-performing group of architects, designers, and engineers focused on delivering world-class silicon IP and subsystem solutions.

The team collaborates closely with hardware, software, verification, and product teams across the globe, driving innovation in next-generation SoCs for AI, automotive, 5G, IoT, and more.

Together, we value creativity, technical excellence, and inclusion, empowering each team member to make a significant impact.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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As a Sr Staff Application Engineer - VCS Simulation, you will be responsible for leading customer deployments of VCS simulation technology, working closely with field teams and R&D to ensure successful adoption and integration.

Responsibilities

• Lead customer deployments of VCS simulation technology, working closely with field teams and R&D to ensure successful adoption and integration.
• Diagnose and troubleshoot complex technical issues in verification flows, utilizing deep product knowledge and analytical skills.
• Collaborate with global domain experts to gather requirements and contribute to the development of a robust product roadmap.
• Drive competitive engagements by demonstrating Synopsys VCS advantages and supporting customers in benchmarking scenarios.
• Provide technical expertise in HDL/HVL methodologies, including UVM, SVA, and simulation debugging.
• Interface directly with customers, product validation, and R&D teams to propose solutions and suggest improvements in implementation and validation processes.
• Develop and optimize scripts (Perl, TCL, Shell, Make) to enhance productivity and workflow automation.

The Impact You Will Have

• Enable customers to accelerate their verification cycles and achieve first-pass silicon success through expert support and deployment of VCS simulation technology.
• Drive innovation in verification methodologies by integrating advanced features and AI-driven productivity tools.
• Enhance Synopsys' product offerings by providing actionable feedback from customer engagements and competitive benchmarking.
• Facilitate seamless collaboration across global teams, ensuring consistent delivery of high-quality solutions.
• Support the continuous improvement of VCS and related technologies through proactive problem-solving and technical leadership.
• Contribute to the growth of Synopsys' leadership in EDA by empowering customers to leverage the full capabilities of verification platforms.

What You’ll Need

• Bachelor’s degree in Electronics with 7+ years or Master’s degree in Electronics with 5+ years of experience.
• Proficiency in verification technologies, including simulation, UVM, SVA, and LRM.
• Strong expertise in HDL languages (Verilog, VHDL, SystemVerilog) and digital design fundamentals.
• Proven experience in debugging simulation mismatches and verification flows.
• Advanced scripting skills (Perl, TCL, Make, Shell) and working knowledge of UNIX environments.
• Exposure to Synopsys EDA tools such as SpyGlass, VC SpyGlass, Verdi is a plus.

Who You Are

• Excellent written and oral communication skills, comfortable interfacing with global teams and customers.
• Collaborative team player with a proactive and innovative mindset.
• Detail-oriented and organized, able to manage multiple tasks and priorities.
• Motivated self-starter with strong problem-solving abilities.
• Adaptable and open to travel, eager to learn and grow in a fast-paced environment.

The Team You’ll Be A Part Of

You will join a dynamic and diverse team of applications engineers dedicated to solving the most challenging problems in the verification domain. Our team works at the intersection of technology development, customer engagement, and product innovation, collaborating with experts across field, R&D, and product validation globally. We foster a culture of continuous learning, open communication, and mutual support, ensuring every member can make a meaningful impact and grow professionally.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key Responsibilities:

• Collaborate closely with cross-functional teams (R&D, Product Management, Sales, and Pre-Sales) to ensure end-to-end product success
• Define, develop, and execute product engineering strategies aligned with business and customer objectives
• Act as the primary technical interface between internal engineering teams and external stakeholders
• Partner with Sales and Pre-Sales teams to provide technical inputs, customer insights, and execution support
• Build, manage, and track detailed project time plans and schedules across multiple initiatives
• Drive execution rigor, issue prioritization, and risk mitigation across concurrent projects

Requirements:

• Minimum 8 years of experience in VLSI product engineering
• Strong exposure to analog and digital SoC design flows and methodologies
• Prior hands-on experience in one or more of the following is preferred:
  • RTL Development
  • RTL Verification
  • RTL-to-GDS flow
• Proven track record of working across multiple technology nodes and driving product innovation
• Strong customer-centric mindset with the ability to multitask, prioritize effectively, and manage multiple complex projects
• Demonstrated experience communicating and influencing across multiple levels of the organization, including senior leadership
• Good understanding of database management, data quality, and data cleanliness across the product portfolio
• Excellent written and verbal communication skills

Nice to Have:

• Experience with VLSI design automation tools and methodologies
• Awareness of industry trends and emerging technologies in VLSI
• Certification in Product Management, Project Management, or a related discipline

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You have a proven track record in digital design and verification, and you are comfortable working across ASIC, FPGA, and firmware domains. Your experience enables you to interpret and review digital and analog specifications, create robust analog models, and write modular, constrained-random testbenches in Verilog and SystemVerilog.

You are adept at performing functional, assertion, and code coverage, and you have a keen eye for failure analysis and testplan management. Your organisational skills ensure that projects move forward efficiently, and your communication abilities allow you to interface effectively with multidisciplinary teams and customer support groups.

You value diversity, inclusivity, and continuous learning, seeking out opportunities to grow and mentor others. As someone who is motivated by innovation, you are excited to work with an expert team and help deliver high-end mixed-signal designs that power the next generation of smart technology.

Responsibilities:

• Designing and verifying ASIC, FPGA, and firmware for high-speed mixed-signal circuits.

• Reviewing digital and analog specifications to ensure alignment with project goals.

• Creating analog models based on schematics and functional requirements.

• Developing modular, constrained-random testbenches in Verilog and SystemVerilog for robust verification.

• Performing functional, assertion, and code coverage, analysing results to identify areas for improvement.

• Developing, managing, and tracking comprehensive testplans to ensure thorough verification.

• Reviewing and analysing failure cases to drive corrective actions and enhance product reliability.

• Running gate-level simulations to validate design integrity and performance.

• Collaborating with cross-functional design groups and customer support teams to resolve technical challenges.

Impact:

• Advancing the development of high-performance mixed-signal designs that enable next-generation applications.

• Ensuring functional and performance integrity of silicon IP products through rigorous verification.

• Accelerating time-to-market for differentiated products by reducing risk and increasing design confidence.

• Contributing to the world's broadest portfolio of silicon IP, supporting innovation in AI, IoT, 5G, and more.

• Enhancing reliability and quality of products that power smart devices and autonomous systems.

• Supporting Synopsys' reputation as a leader in chip design and software security by delivering excellence.

Requirements:

• BSEE with 2 years of digital design and verification experience, or MSEE with 0 years of digital design and verification industry experience.

• Expertise in ASIC design, synthesis, and clock domain crossing (CDC).

• Hands-on experience writing complex testcases in Verilog and SystemVerilog.

• Familiarity with code quality metrics and best practices in verification methodologies.

• Ability to create system-level specifications for digital and analog domains.

• Strong knowledge of high-speed digital and mixed-signal design principles.

• Experience with asynchronous clock crossings and DFT (Design For Test) methodologies.

Team:

Join a highly experienced mixed-signal design team, dedicated to delivering high-end mixed-signal designs from specification development through functional and performance testing. You'll be working alongside expert digital and mixed-signal engineers, collaborating across design, verification, and customer support to push the boundaries of innovation in silicon IP and SoC integration.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Digital Design Intern, you will collaborate within a Digital and Verification Development team to design and validate complex digital mixed-signal high-speed interface IP. You will engage in hands-on verification tasks, leveraging guidance from senior engineers, and apply best-in-class methodologies. You will also build and nurture productive working relationships across analog and digital design teams, participate in product and project reviews, and prepare and present comprehensive reports that summarize technical project outcomes, milestones, and challenges.

Key Responsibilities:

• Collaborate within a Digital and Verification Development team to design and validate complex digital mixed-signal high-speed interface IP.
• Engage in hands-on verification tasks, leveraging guidance from senior engineers, and apply best-in-class methodologies.
• Build and nurture productive working relationships across analog and digital design teams.
• Participate in product and project reviews, providing technical input and feedback to drive project success.
• Prepare and present comprehensive reports that summarize technical project outcomes, milestones, and challenges.

Requirements:

• Currently pursuing a master's degree in Electrical Engineering or similar field.
• Basic knowledge in Digital Design.
• Demonstrated ability to prepare and present technical reports and project documentation.
• Curious and eager to learn new technologies and methodologies.
• Strong team player who values collaboration and open communication.
• Highly organized, able to manage time and priorities effectively.
• Analytical problem solver with a proactive and adaptable mindset.
• Good communicator in English, both written and verbal.

Program Facts:

• Program Length: 6 months
• Location: TecMaia, Maia or Lagoas Park, Oeiras. Portugal.
• Working Model: In-office
• Part-time or Full-time (preferable)
• Start Date: May 2026

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We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You Are:

An experienced and visionary ASIC Digital Verification Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of HBM or PCIe/CXL and its applications. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience.

What You'll Be Doing:

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing verification plans for complex digital designs, particularly focusing on HBM or PCIe/CXL.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced verification methodologies and tools to achieve high-quality verification results.
• Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

The Impact You Will Have:

• Enhancing the reliability and performance of Synopsys' digital verification processes.
• Driving innovations in HBM or PCIe/CXL technology, contributing to the development of cutting-edge semiconductor solutions.
• Improving time-to-market for high-performance silicon chips through efficient verification methodologies.
• Building and nurturing a highly skilled verification team, elevating overall project quality.
• Influencing strategic decisions that shape the future of Synopsys' verification capabilities.
• Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.

What You'll Need:

• Extensive experience in ASIC RTL design and verification.
• In-depth knowledge of HBM or PCIe protocols and their applications.
• Proficiency in advanced verification tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Who You Are:

• A team member who encourages innovation.
• A proactive problem solver who thrives in complex environments.
• An effective communicator with the ability to convey technical concepts to a broad audience.
• A team player who values collaboration and diversity.

The Team You'll Be A Part Of:

You will join a dynamic and innovative team focused on advancing Synopsys' verification technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits:

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

• Health & Wellness: Comprehensive medical and healthcare plans that work for you and your family.
• Time Away: In addition to company holidays, we have ETO and FTO Programs.
• Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• ESPP: Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
• Retirement Plans: Save for your future with our retirement plans that vary by region and country.
• Compensation: Competitive salaries.

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You will define, evolve, and implement SystemC modeling standards and virtual platform architectures for complex embedded and SoC-based systems. You will also architect and develop SystemC/TLM2.0 models, integrating C++ models for CPUs, interconnects, memories, and peripherals within the Virtualizer environment.

Your responsibilities will include customizing and configuring Virtualizer platforms to support early firmware, bootloader development, and Linux/RTOS bring-up and debugging. You will optimize virtual platforms for performance, scalability, and usability, integrating with debuggers, build systems, and CI pipelines.

You will drive advanced software debugging, conducting deep root-cause analysis across hardware models and software stacks, and implementing long-term fixes and improvements. You will utilize Python for Virtualizer automation, simulation orchestration, and test/regression frameworks.

You will conduct design and code reviews, mentor engineers, and foster technical excellence across teams. You will accelerate early software development and system validation for Synopsys' customers, enabling faster time-to-market for innovative products.

Our team is composed of experts in SystemC, C++, embedded software, and hardware architecture, working collaboratively to deliver high-impact solutions for global customers. Together, you will pioneer new technologies, set industry standards, and drive the future of system-level design and verification.

As a staff engineer, you will have the opportunity to shape the architectural direction of virtual platform solutions, ensuring their scalability, accuracy, and usability for complex SoC designs. You will mentor and uplift engineering teams, fostering a culture of technical excellence, collaboration, and continuous learning.

You will drive improvements in simulation workflows, debugging tools, and automation frameworks, enhancing productivity and reliability. You will contribute to Synopsys' leadership in semiconductor and embedded software innovation, impacting global industries from automotive to IoT.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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As a Senior Manager of SOC Engineering, you will oversee and drive end-to-end RTL design, verification, architecture, and integration of advanced subsystems. You will lead teams in Bangalore/Hyderabad, manage customer communications, and ensure timely, high-quality delivery. You will guide your team through the full lifecycle: from requirements to release, ensuring excellence at every stage. Foster innovation and continuous improvement, motivating engineers to reach their full potential.

Key Qualifications:

• Bachelor's or Master's in Electronics or related field, with 15+ years of overall experience
• 8+ years of hands-on techno-managerial experience managing remote and local teams
• Strong track record in Subsystem/SoC design, architecture, and implementation
• Deep expertise in Verilog/System Verilog and simulation tools
• Proficiency with interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.)
• Experience with synthesis, lint, CDC, low power flows, and verification closure (SV UVM, BFM development, test environment creation)
• Outstanding communication skills and a passion for team development

What Sets You Apart:

• You have strong, hands-on technical experience and thrive on rolling up your sleeves to solve complex challenges
• You excel at turning high-level requirements into innovative solutions and see projects through to successful, timely completion
• You build strong, trust-based relationships with customers and stakeholders, always putting their needs at the centre
• You bring a creative mindset and lead proactively, inspiring your team to think big, embrace change, and drive continuous improvement

Hands-on experience is an absolute must for success in this role.

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Accelerate the adoption of industry-leading formal verification solutions, enabling customers to achieve robust, high-quality silicon designs. Strengthen Synopsys' reputation as a trusted partner for verification innovation and excellence. Drive customer success by delivering tailored consulting services and assertion IPs that address complex verification challenges. Enhance productivity and efficiency for customers through advanced formal methodologies and flows. Influence the direction of formal verification technology by collaborating with R&D and Product Management teams. Foster a culture of technical excellence and inclusion within your team, empowering members to grow and contribute meaningfully. Enable strategic customers to meet critical industry requirements such as design security, automotive safety, and verification signoff.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An enthusiastic and detail-oriented ASIC Digital Design Verification Engineer with a passion for cutting-edge technology and a penchant for solving complex problems. You thrive in a collaborative environment and are adept at translating high-level requirements into robust and efficient designs. Your expertise, coupled with your strong understanding of digital design and verification methodologies, makes you an invaluable asset to any project. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges, and delivering innovative solutions. You are proactive, with excellent communication skills that enable you to work effectively with cross-functional teams. Your ability to adapt quickly to new challenges and technologies ensures that you remain at the forefront of industry advancements.

What You’ll Be Doing:

• Designing and implementing verification environments to ensure the correctness of Interface IP protocols.
• Collaborating with design and architecture teams to identify and fix bugs.
• Performing all task related to verifying a complex digital IP including detailed test plans, functional coverage analysis and driving coverage closure.
• Mentoring and guiding junior verification engineers in best practices and methodologies.
• Conducting design and verification reviews and providing constructive feedback to improve overall quality and functionality.
• Documenting design specifications, test plans, and verification reports.
• Proficiency in System Verilog, UVM, SVA, and other verification techniques.
• Strong understanding of digital design and verification concepts.
• Excellent problem-solving skills and attention to detail.

The Impact You Will Have:

• Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.
• Enhancing the robustness and efficiency of our verification processes and methodologies.
• Contributing to the successful launch of Interface IP products, impacting various industries.
• Driving innovation and excellence within the verification team.
• Improving the overall performance and functionality of Synopsys' IP offerings.
• Fostering a culture of continuous improvement and technical excellence.

What You’ll Need:

• Proficiency in digital design and verification methodologies.
• Experience with developing testbenches using System Verilog and UVM.
• Expertise in using advanced verification techniques.
• Familiarity with scripting languages such as Python or Perl for automation.

Who You Are:

• Detail-oriented with a strong analytical mindset.
• Excellent communicator, able to convey complex technical concepts clearly.
• Collaborative team player who thrives in a dynamic environment.
• Proactive and self-motivated, with a commitment to continuous learning.
• A results-driven professional committed to delivering high-quality work.
• Mentor and leader, capable of guiding and developing junior engineers.

The Team You’ll Be A Part Of:

You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.

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Key responsibilities include:

• Defining, validating, and enabling complex multi-rack FPGA-based systems to support cutting-edge hardware development.
• Developing and optimizing RTL code for Xilinx UltraScale, UltraScale+, and Versal FPGAs to ensure maximum performance and reliability.
• Driving the development and integration of hardware emulation strategies on leading FPGA platforms such as Zebu and HAPS.
• Mapping RTL designs into FPGA environments, utilizing deep verification and implementation knowledge to facilitate smooth prototyping and validation.
• Generating and packaging diagnostic tests for both production and field use, ensuring robust system performance and rapid troubleshooting.

As a Staff Hardware Engineer, you will work closely with cross-functional teams to accelerate the development of next-generation technologies through advanced FPGA design and integration. You will strengthen team productivity and knowledge by actively collaborating, mentoring, and sharing expertise with colleagues.

Requirements include:

• BS/MS in Computer Science, Electrical Engineering, or a related field.
• 5+ years of hands-on experience in RTL design and verification, preferably with complex FPGA systems.
• Proficiency in Hardware Description Languages such as VERILOG, VHDL, or SystemVerilog.
• Expertise in using industry-standard EDA tools and methodologies for design and verification.
• Hands-on experience with FPGA flows and tools like Vivado, and familiarity with Unix/Linux environments.
• Experience with scripting languages (Shell, Perl, Python, TCL) for automation and productivity enhancement.
• Background in HDL simulation, emulation, and prototyping platforms (e.g., Zebu, HAPS).
• Strong logical thinking and problem-solving abilities, with a keen attention to detail.

Benefits include:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Responsibilities:

Define and develop ASIC RTL design and verification at both chip level and block level. Collaborate with cross-functional teams to design, implement, and verify PCIe interfaces. Perform RTL coding, synthesis, and simulation to ensure design functionality and performance. Conduct design reviews and provide technical guidance to junior engineers. Work closely with physical design teams to ensure seamless integration and optimization. Debug and resolve design issues to ensure timely delivery of high-quality products.

Impact:

Contribute to the development of high-performance silicon chips that power next-generation technologies. Enhance the functionality and performance of Synopsys' PCIe solutions. Drive innovation and improve design methodologies within the team. Ensure the successful delivery of complex ASIC projects on time and within budget. Mentor and guide junior engineers, fostering a culture of continuous learning and development. Collaborate with cross-functional teams to deliver integrated and optimized solutions for our customers.

Requirements:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in ASIC digital design and verification. Strong knowledge of PCIe protocols and interfaces. Proficiency in RTL coding (Verilog/SystemVerilog) and simulation tools. Experience with synthesis, timing analysis, and formal verification.

Team:

Join a dynamic and collaborative team of engineers dedicated to designing and delivering high-performance silicon solutions. Our team focuses on innovation, quality, and continuous improvement, working together to solve complex technical challenges and deliver industry-leading products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Driving RTL-to-GDSII implementation for complex digital IP, ensuring signoff timing and PV closure.
• Leading backend flow development, including PnR, STA, DRC, LVS, and EMIR analysis.
• Collaborating with design, CAD, and cross-functional teams to optimize backend methodologies and resolve technical issues.
• Supporting project execution by troubleshooting timing, congestion, and physical verification challenges.

You will be part of the dynamic Design Support Group (DSG) at Synopsys, a passionate collective of engineers dedicated to delivering world-class backend solutions. Our team thrives on innovation, collaboration, and a shared commitment to technical excellence. We work closely with customers and internal teams, supporting them through every stage of their design journey and continually pushing the boundaries of what's possible in digital backend technology.

As a Staff Engineer, you will have the opportunity to work on cutting-edge projects, develop your technical skills, and contribute to the growth and success of the company. You will be part of a dynamic and supportive team that values innovation, collaboration, and technical excellence.

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Key responsibilities include:

• Designing and analysing algorithms for end-to-end timing constraint management across the Synopsys flow.
• Driving the success and evolution of Synopsys' constraint flow and tools, enhancing product performance and integration.
• Collaborating within a highly skilled engineering team to deliver innovative solutions for static timing analysis (STA) during design and optimisation.
• Designing, developing, troubleshooting, and debugging advanced software programs for constraint generation and verification.
• Architecting, developing, and testing constraint management solutions, contributing to the advancement of R&D software development.

As a member of our team, you will have the opportunity to work on cutting-edge projects, collaborate with talented engineers, and contribute to the development of innovative solutions. You will also have access to professional development opportunities, competitive compensation, and a comprehensive benefits package.

To be successful in this role, you will need to have a strong foundation in programming fundamentals, including data structures, sorting, searching algorithms, and numerical methods. You should also have experience with C/C++, scripting languages, and a keen eye for detail. Additionally, you should be able to communicate effectively with cross-functional teams and have a strong understanding of software development principles and practices.

If you are a motivated and experienced engineer looking for a challenging and rewarding opportunity, please apply today!

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

As a Senior Software Engineer - Device Driver and Firmware, you will be responsible for designing, developing, and owning Linux device drivers (kernel/user-space interfaces) for platform hardware bring-up and runtime operation. You will also develop and maintain firmware components supporting board/module initialization, configuration, and operational readiness.

Key Responsibilities:

• Design, develop, and own Linux device drivers (kernel/user-space interfaces) for platform hardware bring-up and runtime operation
• Develop and maintain firmware components supporting board/module initialization, configuration, and operational readiness
• Build and maintain bring-up, validation, and regression workflows to ensure correctness, stability, and performance across releases
• Debug complex issues across hardware/software boundaries using Linux diagnostics (kernel logs) and systematic failure isolation approaches
• Collaborate with cross-functional teams to align driver/firmware behavior with platform requirements and integration constraints
• Drive automation using scripting/tooling to improve developer productivity, install/upgrade flows, and release robustness (packaging and deployment scripts)

Impact:

• Enable robust operation and integration of HAV platform hardware and software stacks
• Accelerate hardware bring-up and software validation for advanced semiconductor designs
• Increase platform reliability, stability, and performance through systematic debugging and validation
• Drive automation and efficiency in development, deployment, and release cycles
• Ensure seamless collaboration and integration across global engineering teams
• Contribute to industry-leading solutions that empower customers to innovate faster and smarter

Requirements:

• Bachelor's or Master's degree in Computer Science, Electronics Engineering, or equivalent practical experience
• 2–5 years of hands-on software development experience in device driver/firmware or Linux platform software
• Strong proficiency in C/C++/Embedded C/SystemC
• Experience with Linux-based driver development and debugging (kernel logs, device enumeration issues, driver initialization failures)
• Working knowledge of Python (or shell scripting) for automation, tooling, and workflow orchestration
• Familiarity with device tree concepts and hardware description for driver binding and initialization
• Exposure to firmware/bring-up flows, update/verification processes, and version alignment practices
• Experience with hardware interfaces such as PCIe and debugging enumeration/initialization issues
• Understanding of build systems, CI/regression infrastructure, and release packaging

Who You Are:

• Analytical thinker with a systematic approach to debugging and problem-solving
• Collaborative team player who communicates effectively across functions and cultures
• Detail-oriented and quality-focused, committed to robust, reliable solutions
• Adaptable and proactive, eager to learn and improve development practices
• Self-motivated, with a passion for technology and innovation

The Team You'll Be A Part Of:

You'll join a dynamic, global engineering team at Synopsys HAV, dedicated to advancing hardware/software co-verification platforms. The team focuses on delivering robust driver and firmware solutions, collaborating across functions to ensure seamless integration and exceptional customer outcomes. You'll work alongside experts in device drivers, firmware, validation, and automation, contributing to best-in-class technology that empowers the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking a Senior High-Speed IO Architect to join our team. As a Senior High-Speed IO Architect, you will be responsible for driving integration and delivery of high-speed I/O designs from concept to production.

Responsibilities

• Drive integration and delivery of high-speed I/O designs from concept to production.
• Collaborate with architecture and design teams for optimal circuit performance.
• Lead cross-functional teams, aligning IP and SoC design groups.
• Recruit, train, and mentor engineering talent.
• Ensure designs meet performance, power, area, and reliability goals.
• Manage post-silicon verification and advanced interface development.

The Impact You Will Have

• Drive innovation in high-speed I/O solutions.
• Elevate Synopsys' leadership in silicon IP.
• Build and sustain a world-class engineering team.
• Ensure product quality and customer satisfaction.
• Enable seamless integration of advanced interfaces.
• Deliver scalable solutions for industry leaders.

What You’ll Need

• 15+ years engineering experience in high-speed mixed-signal IC design.
• Expertise across full product lifecycle.
• Leadership in managing engineering teams.
• Strong understanding of advanced technology nodes.
• Experience recruiting and mentoring staff.
• Excellent communication and project management skills.
• UCIe Die-to-Die PHY experience required.

Who You Are

• Strategic thinker and collaborative leader.
• Clear communicator and mentor.
• Adaptable, detail-oriented, and quality-driven.

The Team You’ll Be A Part Of

Join a world-class engineering team pioneering high-speed I/O and interface technologies, committed to innovation, collaboration, and technical excellence.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your primary responsibilities will include building and running CoSim simulations using established environments, integrating schematics and RTL, and adhering to procedures for reproducibility and traceability. You will also be responsible for debugging mixed-signal failures by collecting logs, waveforms, and reproducible steps, performing first-pass triage, and escalating issues with clear evidence to design and verification teams.

In this role, you will collaborate with analog and digital designers to confirm expected behaviors, review corner cases, and align verification needs for day-to-day activities. You will maintain and improve test content, scripts, and documentation to enhance verification quality and speed.

As a Mixed-Signal Verification Engineer, you will contribute to the overall reliability and performance of SERDES deliverables by surfacing system-level issues and supporting their resolution.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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You are an accomplished engineering leader with more than a decade of hands-on experience in SoC verification, emulation, and system-level validation. You thrive at the intersection of advanced hardware-assisted verification (HAV) and simulation acceleration (SimXL), bringing a deep understanding of complex SoC architectures, memory subsystems, and high-speed interconnects.

Architecting and leading Hardware-Assisted Verification and Simulation Acceleration solutions for large-scale SoCs and multi-die systems.

Driving end-to-end SimXL deployments, including use-case definition, performance optimization, and methodology standardization.

Defining and owning system-level verification and acceleration strategies spanning simulation, emulation, and prototyping.

Bridging gaps between RTL simulation, emulation, and software bring-up to enable early and scalable system validation.

Leading complex customer engagements involving HAV platforms, simulation acceleration, and hybrid verification flows.

Translating customer verification challenges into scalable, reusable solution architectures and acting as a technical authority in escalations.

Driving innovation in HAV and SimXL methodologies, including automation, reuse, and productivity frameworks leveraging AI/GenAI-assisted approaches.

Collaborating with R&D, Product Management, and Applications teams to influence product roadmaps and feature requirements.

Accelerate customer verification cycles, enabling earlier software and system bring-up for complex SoC designs.

Define and scale best-in-class HAV and SimXL solutions across strategic accounts, enhancing customer outcomes.

Drive measurable improvements in performance, capacity, and debug productivity for verification workflows.

Shape the future of AI-assisted verification and solution deployment within Synopsys and across the industry.

Act as a key technical leader in advancing the organization’s verification acceleration strategy.

Mentor and empower senior engineers, fostering a culture of innovation and technical excellence.

Influence product direction and solution roadmaps through deep technical insights and customer engagement.

10+ years of experience in SoC verification, emulation, or system-level validation.

Deep hands-on expertise in Hardware-Assisted Verification, simulation acceleration, and hybrid verification flows.

Strong experience with emulation platforms and accelerated simulation environments.

Solid understanding of SoC architectures, interconnects, memory subsystems, and software bring-up challenges.

Proven ability to design and deploy scalable verification solutions for complex designs.

Experience with system-level testbenches, transactors, and acceleration frameworks.

Exposure to GenAI or AI-assisted techniques applied to verification, debug, or solution automation.

Background in high-speed interfaces, memory subsystems, or multi-die architectures.

Track record of creating reusable assets, methodologies, or automation frameworks.

Experience influencing product direction or defining solution roadmaps.

Innovative thinker with a passion for driving technological advancement and automation.

Collaborative leader who mentors and inspires teams across geographies.

Strong communicator adept at translating complex technical concepts for diverse audiences.

Customer-focused problem solver with a commitment to delivering impactful solutions.

Adaptable and resilient in fast-paced, matrixed environments.

Detail-oriented, analytical, and proactive in identifying and addressing challenges.

You will join a dynamic, cross-functional team dedicated to advancing verification acceleration solutions for Synopsys’ strategic customers. The team comprises experts in HAV, simulation acceleration, R&D, product management, and applications engineering, all working collaboratively to define and deploy innovative methodologies.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You will report key metrics and drive continuous improvement initiatives in Emulation IP quality and performance.

You will provide technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.

You will stay ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.

You will review and validate test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

You will collaborate cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.

You will mentor and guide junior engineers, fostering a culture of innovation and continuous improvement.

This role requires 10-20 years of relevant experience in emulation, verification, or IP product development.

You should have expert-level knowledge of PCIe and DDR interfaces, including protocol and verification strategies.

You should have extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

You should have demonstrated track record in leading IP product development initiatives with a focus on emulation.

You should have strong background in cross-functional collaboration, with an ability to drive consensus and deliver results.

You should have outstanding communication skills, with the ability to influence and inspire change across diverse teams.

You should be adaptable and comfortable working in a fast-paced, matrixed, and international environment.

As a proactive and collaborative problem-solver with a passion for excellence, you will be a strong fit for this role.

You will join a dynamic, high-performing engineering team focused on IP development, emulation, and verification at the forefront of semiconductor innovation.

Our team is collaborative, cross-functional, and globally distributed, working together to solve complex challenges and deliver industry-leading solutions.

You will have the opportunity to collaborate with experts across multiple domains, drive impactful initiatives, and shape the future of digital design and verification at Synopsys.

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Collaborating with local and international teams to develop layouts for complex analog and mixed-signal designs in advanced technology nodes (3nm, 2nm, and beyond).

Utilizing Synopsys suite of tools and full custom analog layout design tools (e.g., Custom Compiler) to create and optimize circuit layouts.

Implementing and verifying designs using industry-leading verification tools such as ICV, Calibre and Star-RCXT...

Developing SERDES sub-circuit layouts (RX, TX, PLL, etc.) and optimizing for signal integrity, including clock/data routes, differential routing, and shielding.

Applying scripting techniques (TCL, Python, etc.) to automate layout processes and improve workflow efficiency.

Ensuring designs meet ESD constraints, mitigate latch-up risks, and optimize for reliability issues such as EM and IR drop.

Designing custom digital logic cell layouts and associated logic path routing for mixed-signal integration.

Refining layouts to minimize parasitic effects and enhance matching, reliability, and performance.

Delivering high-quality IP that powers next-generation semiconductor products for global customers.

Enabling Synopsys to maintain leadership in advanced technology node design and IP development.

Contributing to the creation of reliable, high-performance silicon chips used in communications.

Driving innovation in analog and mixed-signal layout methodologies and tools.

Enhancing cross-team collaboration and knowledge sharing to accelerate project timelines and improve outcomes.

Ensuring robust design practices that minimize risk and maximize reliability, meeting stringent industry standards.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An experienced and highly skilled ASIC Digital Verification Engineer with a passion for ensuring the highest quality in digital design. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges and delivering innovative solutions. You are detail-oriented, with a strong analytical mindset, and can communicate effectively with various stakeholders. Your ability to mentor and lead junior engineers is a testament to your extensive experience in the field. You thrive in a collaborative environment and are committed to continuous learning and improvement.

What You'll Be Doing:

• Designing and implementing verification environments to ensure the correctness of Interface IP protocols.
• Creating and executing detailed test plans to verify complex ASIC designs.
• Developing and maintaining verification IP and testbenches using SystemVerilog and UVM.
• Collaborating with design and architecture teams to identify and fix bugs.
• Performing functional coverage analysis and driving coverage closure.
• Mentoring and guiding junior verification engineers in best practices and methodologies.

The Impact You Will Have:

• Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.
• Enhancing the robustness and efficiency of our verification processes and methodologies.
• Contributing to the successful launch of Interface IP products, impacting various industries.
• Driving innovation and excellence within the verification team.
• Improving the overall performance and functionality of Synopsys' IP offerings.
• Fostering a culture of continuous improvement and technical excellence.

What You'll Need:

• Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet.
• Proficiency in SystemVerilog and UVM methodologies.
• Strong understanding of digital design and verification concepts.
• Experience with simulation tools such as VCS, ModelSim, or similar.
• Excellent problem-solving skills and attention to detail.

Who You Are:

• Detail-oriented with a strong analytical mindset.
• Excellent communicator, able to convey complex technical concepts clearly.
• Collaborative team player who thrives in a dynamic environment.
• Proactive and self-motivated, with a commitment to continuous learning.
• Mentor and leader, capable of guiding and developing junior engineers.

The Team You'll Be A Part Of:

You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking a highly skilled engineer with a strong background in system-on-chip (SOC) architecture and development.

With significant experience in advanced nodes and complex SOC projects, you excel at translating technical requirements into innovative, robust solutions.

You are comfortable navigating all stages of SOC design—from architecture and RTL development through to tapeout and post-silicon validation.

Your technical expertise is matched by your collaborative spirit, allowing you to work effectively within cross-functional teams and mentor junior engineers.

You’re adept at engaging directly with customers, understanding their needs, and delivering tailored solutions that drive their success.

Responsibilities

• Lead SOC development projects from architectural definition through post-silicon validation and customer delivery.

• Provide technical guidance and mentorship to engineering teams, supporting micro-architecture and RTL development.

• Collaborate directly with customers to address their specific requirements and deliver tailored solutions.

• Manage key stages of SOC development, including design verification, DFT, physical design, and tapeout management.

• Work closely with partners on software, firmware, and packaging to ensure seamless integration of solutions.

• Participate in occasional travel and on-site engagements at customer premises to support project execution.

Impact

• Drive the successful delivery of advanced SOC projects across automotive, aerospace, and high-performance computing sectors.

• Enhance Synopsys’ reputation as an industry leader in SOC design and innovation.

• Mentor and support engineering talent, fostering a culture of continuous improvement and technical excellence.

• Increase customer satisfaction by providing high-quality, high-performance SOC solutions.

• Contribute to successful tapeouts and product launches, expanding Synopsys’ impact in the semiconductor industry.

• Shape the development of smart, connected devices through your technical expertise and collaborative approach.

Requirements

• BSEE, MSEE, or Ph.D. in Electrical and/or Computer Engineering.

• At least 8 years of experience in SOC-level architecture and RTL development.

• Strong proficiency in SOC system architecture, micro-architecture, RTL development, design verification, DFT, and tapeout management.

• Solid understanding of high-performance computing architectures for mobile, data center, automotive, and edge computing SOCs.

• Experience with interconnect options (Arteris NOC, AMBA AXI, CXL, etc.) and SOC standard interfaces (PCIe, DDR, HBM, MIPI CSI/DSI, SPI, I2C).

• Implementation knowledge of CPU architectures (RISCV, ARC, X86, ARM).

• Hands-on experience with workflow tools (git, gitlab, github)

• Ability to travel and work on-site as needed; eligibility for government security clearances is a plus.

Team

You will join the System Solutions team, a group of passionate engineers dedicated to enabling customers with end-to-end SOC designs in advanced technologies.

The team delivers comprehensive tool flows, develops innovative design methodologies, and provides customer-specific assistance.

Our collaborative environment encourages continuous learning, knowledge sharing, and technical excellence, supporting customers from start-ups to industry leaders across a wide range of applications.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Managing the full SOC development lifecycle, including micro-architecture, RTL design, verification, DFT, physical design, and tapeout management.
• Collaborating with partners on software, firmware, and packaged part solutions, ensuring seamless integration and delivery.
• Occasionally traveling and working on-site at customer premises to support project execution and strengthen customer relationships.

As a Principal Engineer, you will shape Synopsys' role as a trusted partner for advanced SOC design across multiple industries, including automotive, aerospace, and high-performance computing. You will advance the adoption of cutting-edge technologies and design methodologies in customer projects. You will mentor and develop engineering talent, fostering technical excellence and innovation within the team.

To succeed in this role, you will need:

• BSEE, MSEE, or Ph.D. in Electrical and/or Computer Engineering.
• Minimum 10 years of experience in SOC-level architecture and RTL development.
• Proficiency in SOC system architecture, micro-architecture, RTL development, design verification, DFT, and tapeout management.
• Expertise in high-performance computing architectures for mobile, data center, automotive, and edge computing SOCs.
• In-depth knowledge of interconnect options (Arteris NOC, AMBA AXI, CXL, etc.) and SOC standard interfaces (PCIe, DDR, HBM, MIPI CSI/DSI, SPI, I2C).
• Implementation experience with CPU architectures (RISCV, ARC, X86, ARM).
• Hands-on experience with workflow tools (git, gitlab, github).
• Ability to travel and work on-site as needed; eligibility for government security clearances is a plus.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology.

With 5-8 years of industry experience—primarily in Physical Verification (PV)—you thrive on solving complex layout and verification challenges for advanced process nodes.

You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus.

Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

You are committed to continuous learning and improvement, keeping pace with evolving foundry processes and design for manufacturability (DFM) requirements.

As a natural collaborator and mentor, you enjoy guiding junior team members and fostering a supportive team environment.

Your excellent communication skills empower you to engage confidently with customers and field application engineers (FAEs), translating complex requirements into innovative solutions.

You are detail-oriented, resourceful, and dedicated to exceeding customer expectations, making you a valuable asset to any high-performing engineering team.

Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.

Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.

Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.

Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.

Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.

Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.

Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys’ technical edge.

Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses.

Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market.

Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps.

Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges.

Contribute to the development of next-generation verification methodologies and best practices within Synopsys.

Strengthen Synopsys’ reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.

5-8 years of hands-on experience in the Physical Verification (PV) domain.

Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.

Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.

Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.

Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.

Exposure to competitive EDA tools and awareness of their strengths and limitations.

An analytical thinker with strong problem-solving abilities and meticulous attention to detail.

A collaborative team player who fosters knowledge sharing and mentorship.

Effective communicator, capable of translating technical concepts to diverse audiences.

Adaptable and proactive, with a passion for continuous learning and innovation.

Customer-focused, with a commitment to delivering high-quality solutions on time.

Self-driven, organized, and able to manage multiple priorities in a fast-paced environment.

Join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design.

Work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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Key Responsibilities:

• Collaborate with digital design teams to develop high-speed mixed-signal PHY IPs.
• Participate in RTL and Gate-Level Simulation (GLS) verification for mixed-signal designs.
• Define, develop, and execute functional verification plans and test strategies.
• Conduct RTL and SDF-annotated gate-level simulations using UVM-based methodologies.
• Generate VCD files and perform power analysis/reporting using PrimeTime PX.

Requirements:

• Minimum of 2 years of experience in ASIC RTL design flow.
• Proficiency in RTL and GLS verification, with strong debugging capabilities.
• Excellent teamwork and communication skills, with professional proficiency in English.
• Strong knowledge of high-speed interface protocols (e.g., DDR, HBM, or PCIe PHYs) is a distinct advantage.

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

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At Synopsys, we're seeking a Staff Engineer (Machine Learning) to join our Machine Learning Center of Excellence (ML CoE) within our Silicon Design & Verification business. As a key member of this highly innovative team, you'll be responsible for designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.

Key Responsibilities:

• Designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.
• Integrating ML-driven solutions into a variety of EDA tools, building on the success of DSO.ai and expanding beyond physical implementation.
• Automating chip design flows with scripting languages (Perl, Python, Tcl, shell scripts) to increase efficiency and reproducibility.
• Collaborating with cross-functional teams to identify design bottlenecks and propose innovative solutions for enhancing power, performance, and area (PPA).
• Conducting research and prototyping novel chip design methodologies, demonstrating new concepts, and driving them to productization.
• Staying current with industry trends in silicon design, machine learning, and EDA, and championing their adoption within Synopsys' product lines.

Impact:

• Accelerate the development of next-generation silicon chips by enabling smarter, faster design optimization through AI and machine learning.
• Reduce time-to-market for customers by eliminating months off project schedules, directly impacting their competitiveness.
• Enhance the performance, power efficiency, and cost-effectiveness of chips designed with Synopsys' tools, driving industry-leading outcomes.
• Shape the evolution of EDA software by pioneering ML-driven methodologies adopted by semiconductor leaders worldwide.
• Enable customers to autonomously explore vast design spaces, achieving optimal results with reduced manual intervention.
• Strengthen Synopsys' position as the global leader in silicon design and verification by delivering innovative, high-impact solutions.

Requirements:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related discipline.
• 5+ years of experience in chip design, EDA, or related fields.
• Expertise in at least one domain of chip design (architectural, micro-architectural, RTL, circuit, or physical design).
• Strong programming and automation skills using Perl, Python, Tcl, or shell scripting.
• Solid understanding of Unix/Linux environments and design flow automation.
• Knowledge of industry-standard RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, and signoff flows.
• Familiarity with low power design techniques, computer architecture, and machine learning principles.

Who We're Looking For:

• A creative problem solver who approaches challenges with curiosity and resilience.
• An effective communicator who collaborates well with multidisciplinary teams.
• Detail-oriented with a passion for quality and continuous improvement.
• Self-driven, adaptable, and comfortable with ambiguity in fast-paced environments.
• Committed to learning, growth, and sharing knowledge with others.

The Team You'll Be A Part Of:

You'll join the Machine Learning Center of Excellence (ML CoE) within Synopsys' Silicon Design & Verification business. This highly innovative team is at the forefront of integrating AI and ML into chip design, collaborating with experts across architecture, implementation, and verification. Together, you'll drive the development of ML-based design optimization solutions and set new standards for the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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