We currently have 614 open roles

You are a visionary leader and technical expert with a passion for driving customer success in advanced semiconductor design. You thrive in dynamic, collaborative environments and excel at building and leading high-performance teams. With extensive experience in 3DIC design and multiphysics analysis, you have a proven track record of delivering innovative solutions to complex technical challenges.

Responsibilities

• Lead and mentor a team of applications engineers and sales specialists focused on 3DIC technology, fostering technical excellence and professional growth.
• Drive customer engagements, ensuring successful adoption and deployment of Synopsys 3DIC solutions across key accounts.
• Collaborate with R&D, product management, and account teams to define product direction and influence the 3DIC roadmap based on customer feedback and market demands.
• Develop and implement strategies for solving complex technical challenges related to 3DIC design, integration, packaging, and verification.
• Represent Synopsys at industry events, conferences, and customer meetings, showcasing thought leadership and technical expertise.
• Oversee the creation and delivery of technical collateral, including application notes, best practices, and training materials.
• Ensure continuous improvement of customer support processes and technical engagement models to maximize customer success and satisfaction.

Impact

• Leverage Ansys market-leading multiphysics analysis to accelerate the adoption of Synopsys' 3DIC solutions, driving revenue growth and expanding our leadership in advanced semiconductor markets.
• Shape the future of 3DIC technology through strategic customer partnerships and by influencing product innovation.
• Empower customers to overcome technical barriers, enabling them to deliver next-generation, high-performance silicon solutions.
• Enhance Synopsys' reputation as a trusted technology partner and thought leader in the 3DIC space.
• Drive cross-functional collaboration to deliver seamless, integrated solutions that address critical industry challenges.
• Foster a high-performance team culture that attracts, develops, and retains top engineering talent.
• Ensure customer feedback and market insights are systematically integrated into product development cycles.

Requirements

• Deep technical expertise in 3DIC planning, design, multiphysics analysis, and verification methodologies (EDA tools, advanced packaging, TSV, HBM, etc.).
• Proven leadership experience managing large, geographically distributed applications engineering or technical sales teams.
• Strong background in semiconductor design flows, system integration, and silicon implementation.
• Excellent problem-solving skills, with the ability to diagnose and resolve complex technical issues in real-time customer environments.
• Familiarity with industry standards and trends in advanced node technologies, packaging, and chiplet architectures.
• Experience collaborating with product management, R&D, and sales to drive product direction and customer success.

Team

You will lead the 3DIC Technical Sales and Applications Engineering team, a group of industry experts dedicated to enabling customer success with Synopsys' most advanced semiconductor technologies. The team works at the intersection of engineering, customer engagement, and product innovation, playing a pivotal role in shaping the future of 3DIC design. Together, you will drive technical excellence, foster strong customer relationships, and collaborate across Synopsys to deliver transformative solutions that set new industry standards.

We Are

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.

You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.

You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.

You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.

You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.

To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.

You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.

You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.

Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.

XML job scraping automation by YubHub

We are looking for a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will thrive in collaborative environments, bringing together diverse perspectives to solve complex challenges. With a strong foundation in RTL design and verification, you will approach every project with a sense of ownership and a commitment to excellence.

As an effective communicator, you will clearly articulate technical concepts to both internal teams and external customers, fostering strong partnerships and driving innovation. You will be adaptable, self-motivated, and resilient in the face of challenges, always seeking opportunities to learn and grow.

Your responsibilities will include designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance. You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.

You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies. You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

The impact you will have includes accelerating the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions. You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy.

You will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will have 5+ years of hands-on experience in RTL design and verification. You will be proficient in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.

You will be an analytical and critical thinker with a detail-oriented approach. You will be an effective communicator, comfortable collaborating across teams and with customers. You will be self-motivated and proactive in seeking solutions and driving projects forward.

You will join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions.

XML job scraping automation by YubHub

As an experienced and visionary ASIC digital design architect, you will thrive in a fast-paced, collaborative environment. You will bring a passion for solving complex system-level challenges and a track record of delivering innovative, high-quality silicon solutions.

Your deep understanding of IP and SoC architectures enables you to see the big picture while meticulously refining subsystem details. You are comfortable navigating ambiguity, building consensus across diverse teams, and translating product requirements into robust, scalable architectures.

Your leadership inspires those around you, and you excel at mentoring and empowering engineers to reach their full potential. You are adept at balancing trade-offs across performance, power, area, and security, always striving for the optimal solution.

Communication is your strength,you articulate technical concepts clearly to both technical and non-technical stakeholders, ensuring alignment and shared understanding.

With a growth mindset, you embrace new challenges, technologies, and methodologies, continuously seeking opportunities to innovate and improve.

You value inclusion and diversity, recognizing that the best ideas emerge from a culture where everyone feels empowered to contribute.

As an IP Subsystems Architect, you will define architectural specifications for complex subsystems, translate system-level requirements into detailed subsystem architectures, and integrate multiple IP blocks into cohesive subsystems.

You will lead cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.

Establishing and guiding verification and validation strategies, including defining coverage requirements and participating in silicon bring-up and debug sessions.

Producing comprehensive architecture documents, specifications, and guidelines, and clearly communicating architectural intent to a wide range of stakeholders.

Mentoring and coaching engineers, driving best practices, and fostering a culture of technical excellence.

Shape the architecture of industry-leading silicon IP and subsystem solutions that power millions of devices worldwide.

Accelerate time-to-market for differentiated products by ensuring robust and efficient subsystem design and integration.

Reduce risk through rigorous requirements management, architectural clarity, and cross-functional alignment.

Enhance product performance, power efficiency, and reliability, directly impacting customer satisfaction and competitive advantage.

Foster innovation by mentoring teams, introducing new methodologies, and championing best practices.

Strengthen Synopsys’ position as a trusted technology leader in the semiconductor ecosystem.

Bachelor’s or Master’s degree in Electronics or a related field, with 15+ years of industry experience.

At least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture roles.

Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (e.g., SV UVM, BFM development).

Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.).

Experience with synthesis, lint, CDC, low-power flows, and achieving verification closure.

Strong documentation and communication skills for effective cross-team alignment and requirements management.

A strategic thinker with exceptional leadership and mentoring capabilities.

A collaborative partner who thrives in diverse, cross-functional teams.

An excellent communicator, able to tailor messaging for both technical and non-technical audiences.

Innovative and proactive, always seeking opportunities to improve processes and outcomes.

Resilient and adaptable, comfortable with change and ambiguity.

Committed to fostering an inclusive and empowering team culture.

Join the Digital IP Subsystems Team at Synopsys,a high-performing group of architects, designers, and engineers focused on delivering world-class silicon IP and subsystem solutions.

The team collaborates closely with hardware, software, verification, and product teams across the globe, driving innovation in next-generation SoCs for AI, automotive, 5G, IoT, and more.

Together, we value creativity, technical excellence, and inclusion, empowering each team member to make a significant impact.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

XML job scraping automation by YubHub

Accelerate the adoption of industry-leading formal verification solutions, enabling customers to achieve robust, high-quality silicon designs. Strengthen Synopsys' reputation as a trusted partner for verification innovation and excellence. Drive customer success by delivering tailored consulting services and assertion IPs that address complex verification challenges. Enhance productivity and efficiency for customers through advanced formal methodologies and flows. Influence the direction of formal verification technology by collaborating with R&D and Product Management teams. Foster a culture of technical excellence and inclusion within your team, empowering members to grow and contribute meaningfully. Enable strategic customers to meet critical industry requirements such as design security, automotive safety, and verification signoff.

XML job scraping automation by YubHub

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An enthusiastic and detail-oriented ASIC Digital Design Verification Engineer with a passion for cutting-edge technology and a penchant for solving complex problems. You thrive in a collaborative environment and are adept at translating high-level requirements into robust and efficient designs. Your expertise, coupled with your strong understanding of digital design and verification methodologies, makes you an invaluable asset to any project. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges, and delivering innovative solutions. You are proactive, with excellent communication skills that enable you to work effectively with cross-functional teams. Your ability to adapt quickly to new challenges and technologies ensures that you remain at the forefront of industry advancements.

What You’ll Be Doing:

• Designing and implementing verification environments to ensure the correctness of Interface IP protocols.
• Collaborating with design and architecture teams to identify and fix bugs.
• Performing all task related to verifying a complex digital IP including detailed test plans, functional coverage analysis and driving coverage closure.
• Mentoring and guiding junior verification engineers in best practices and methodologies.
• Conducting design and verification reviews and providing constructive feedback to improve overall quality and functionality.
• Documenting design specifications, test plans, and verification reports.
• Proficiency in System Verilog, UVM, SVA, and other verification techniques.
• Strong understanding of digital design and verification concepts.
• Excellent problem-solving skills and attention to detail.

The Impact You Will Have:

• Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.
• Enhancing the robustness and efficiency of our verification processes and methodologies.
• Contributing to the successful launch of Interface IP products, impacting various industries.
• Driving innovation and excellence within the verification team.
• Improving the overall performance and functionality of Synopsys' IP offerings.
• Fostering a culture of continuous improvement and technical excellence.

What You’ll Need:

• Proficiency in digital design and verification methodologies.
• Experience with developing testbenches using System Verilog and UVM.
• Expertise in using advanced verification techniques.
• Familiarity with scripting languages such as Python or Perl for automation.

Who You Are:

• Detail-oriented with a strong analytical mindset.
• Excellent communicator, able to convey complex technical concepts clearly.
• Collaborative team player who thrives in a dynamic environment.
• Proactive and self-motivated, with a commitment to continuous learning.
• A results-driven professional committed to delivering high-quality work.
• Mentor and leader, capable of guiding and developing junior engineers.

The Team You’ll Be A Part Of:

You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.

XML job scraping automation by YubHub

Your primary responsibilities will include building and running CoSim simulations using established environments, integrating schematics and RTL, and adhering to procedures for reproducibility and traceability. You will also be responsible for debugging mixed-signal failures by collecting logs, waveforms, and reproducible steps, performing first-pass triage, and escalating issues with clear evidence to design and verification teams.

In this role, you will collaborate with analog and digital designers to confirm expected behaviors, review corner cases, and align verification needs for day-to-day activities. You will maintain and improve test content, scripts, and documentation to enhance verification quality and speed.

As a Mixed-Signal Verification Engineer, you will contribute to the overall reliability and performance of SERDES deliverables by surfacing system-level issues and supporting their resolution.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

XML job scraping automation by YubHub

They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking a highly skilled and experienced ASIC verification professional to lead technical teams and drive excellence in digital design.

As a Sr Staff Engineer - DDR, you will be responsible for technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.

You will specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores.

You will perform verification tasks for IP cores, working closely with RTL designers and architects to ensure functional correctness.

You will develop and implement advanced test plans and test environments at both unit and system levels.

You will code and debug test cases, including the creation of complex checkers and assertions using System Verilog/UVM.

You will extract and review functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.

You will manage regressions and contribute to the continuous improvement of verification strategies and test environments.

This role requires a deep understanding of verification methodologies, serial interface protocols, and the intricacies of IP core development.

You should have demonstrated experience in technically leading a team for DDR IP projects, with a track record of successful collaboration and stakeholder management.

You should have proven expertise in developing HVL (System Verilog/UVM) based test environments for complex ASIC designs.

You should have advanced skills in developing and implementing rigorous test plans, checkers, and assertions.

You should have strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.

You should have experience with serial interface protocols and IP design/verification processes; knowledge of DDR/LPDDR is highly desirable.

You should have hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.

You will join the DesignWare IP Verification R&D team, a group of talented and passionate engineers committed to advancing Synopsys' leadership in semiconductor IP.

The team focuses on delivering world-class verification solutions for a broad portfolio of synthesizable IP cores, leveraging the latest methodologies and technologies to ensure our products meet the most rigorous quality and performance standards.

Collaboration, innovation, and a drive for excellence define our culture.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU deep learning. This new model - where deep neural networks are trained to recognize patterns from meaningful amounts of data - has shown to be deeply effective at solving the most sophisticated problems in everyday life.

As a Senior ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Responsibilities:

• In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models.
• You will be responsible for micro-architecture using sophisticated verification methodologies.
• As a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This role will collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks.

Requirements:

• Bachelors or Master’s Degree (or equivalent experience)
• 3+ years of relevant verification experience
• Experience in architecting test bench environments for unit level verification
• Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies
• Prior Design or Verification experience of Coherent high-speed interconnects
• Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful
• Strong background developing TB's from scratch using SV and UVM methodology is desired
• C++ programming language experience, scripting ability and an expertise in System Verilog
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong debugging and analytical skills
• Experienced communication and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.

NVIDIA is widely considered to be one of the technology world’s most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until March 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

XML job scraping automation by YubHub

You are a driven and curious engineering professional, passionate about tackling complex technical challenges and eager to make a real difference in the semiconductor industry. You thrive in collaborative, diverse environments and are energized by working alongside global experts to solve high-value problems. You are committed to continuous learning and growth, staying ahead of the curve in verification methodologies, HDL/HVL technologies, and dynamic simulation.

Collaborate with customers to understand their verification challenges and provide tailored technical solutions using Synopsys Verification Platform. Support customer projects throughout their tapeout schedules, ensuring timely resolution of technical issues and successful project outcomes. Deliver technical presentations, workshops, and training sessions on Synopsys EDA tools, methodologies, and best practices.

Enable customers to optimize and verify chips for power, cost, and performance—accelerating their time-to-market. Build strong, collaborative relationships with customers, fostering trust and loyalty through expert support and innovation. Drive adoption of Synopsys Verification Platform, contributing to company growth and industry leadership.

Master’s degree in Electronics, or Bachelor’s degree in Electronics with 1-2 years of relevant experience. Solid understanding of digital design, HDLs (Verilog, VHDL), and System Verilog. Experience with dynamic simulation verification, including methodologies, debug, low power, and coverage. Familiarity with Synopsys EDA tools (VCS, Verdi) is a plus. Proficiency in UNIX environments and scripting languages such as Tcl, with the ability to automate and optimize workflows.

Collaborative team player who values diversity and inclusion. Detail-oriented, organized, and able to manage multiple priorities effectively. Innovative thinker with a proactive, results-driven mindset. Motivated, self-organized, and open to travel as required. Strong interpersonal and social communication skills, fostering positive relationships with colleagues and clients. Adaptable and eager to learn, embracing new technologies and methodologies.

You’ll be part of the Customer Success Group, a collaborative and diverse team dedicated to building strong partnerships with market leaders and innovators. The team’s core mission is to enable customers to solve high-value problems through advanced verification solutions and continuous technical support. Working closely with domain experts across global locations, you’ll develop deep expertise in Synopsys Verification Platform and play a key role in helping customers achieve their design goals efficiently and effectively.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

You are a passionate and versatile engineering professional who thrives in a dynamic, fast-paced environment. With a deep technical acumen and a knack for creative problem-solving, you are driven to deliver innovative solutions that address complex challenges. You have a proven track record in application engineering, accompanied by a strong understanding of EDA tools, chip design flows, and customer-centric solution delivery.

Responsibilities

• Collaborating with customers to understand their technical challenges and providing comprehensive solutions using Synopsys tools and platforms.
• Driving the adoption and integration of EDA tools in customer design flows, ensuring optimal utilization and performance.
• Developing and delivering technical workshops, training sessions, and product demonstrations tailored to customer needs.
• Partnering with R&D and product management teams to influence product direction and resolve complex technical issues.
• Authoring and maintaining technical documentation, application notes, and best practice guides.
• Providing pre- and post-sales technical support, including troubleshooting, bug tracking, and solution development.
• Mentoring and guiding junior engineers, fostering a culture of technical excellence and innovation.

Impact

• Accelerating customer success by ensuring seamless deployment and integration of Synopsys solutions.
• Enhancing product quality and usability through direct feedback and collaboration with R&D teams.
• Expanding Synopsys' footprint in key accounts by demonstrating technical excellence and building strong customer relationships.
• Reducing design cycle times and improving overall productivity for our customers.
• Contributing to the growth of Synopsys' technical community through knowledge sharing and mentoring.
• Influencing future product innovations by identifying emerging customer needs and market trends.

Requirements

• Strong expertise in ASIC/FPGA design and verification methodologies.
• Hands-on experience with industry-leading EDA tools such as synthesis, simulation, and formal verification platforms.
• Proficiency in scripting languages (e.g., Python, Perl, TCL) and automation frameworks.
• Solid understanding of digital design, SoC architectures, and semiconductor manufacturing processes.
• Ability to analyze and resolve complex technical issues quickly and effectively.

Team

You'll join an accomplished team of application engineering experts at the forefront of EDA and semiconductor innovation. Our team partners closely with customers, R&D, and product management to deliver world-class solutions and technical support. We foster a collaborative, inclusive culture that encourages continuous learning, knowledge sharing, and professional growth.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

We are looking for a hardware verification engineer who will perform verification of complex leading-edge security systems IP components. Be a part of a world-class team, building advanced security solutions that meet the Synopsys high quality standard for best-in-class products. These products are found in some of the most advanced, high-tech devices today in areas like automotive, networking, mobile, and IoT applications.

Responsibilities

• Performing design verification of cutting-edge IP components and subsystems used in high-profile security applications.
• Developing comprehensive product verification strategies, including test specifications, detailed test plans, and thorough test reports.
• Implementing, developing, and automating test environments for regression testing to ensure robust product quality.
• Collaborating closely with design engineers and architects to debug products and resolve defects efficiently.
• Staying current with the latest verification methodologies and tools, integrating state-of-the-art practices into your workflow.
• Hardware verification of IP cores and subsystems with techniques such as SystemVerilog /UVM and Formal Verification
• Proactively researching and integrating new developments in the domain of embedded security

Requirements

• Proven expertise in verification of digital hardware IP components
• Deep technical knowledge of and experience with modern verification methodologies including UVM, assertion-based verification, coverage driven methodology and formal verification
• Good knowledge about IC Design flows and excellent problem solving and debugging skills
• Experience with verification flow automation and scripting.
• Strong communication (written and verbal) and interpersonal skills
• Bachelor’s or Master’s degree in Electrical Engineering or Computer Science, with 8+ years of relevant experience.
• Familiarity with security and cryptographic protocols is desirable.

What You’ll Be A Part Of

You’ll join the Security IP group in Ottawa, world-class, security-focused team of hardware and software engineers dedicated to advancing the best in security technologies. The team works collaboratively to design, verify, and deliver leading-edge security solutions found in the world’s most advanced devices, from automotive to IoT. Together, you’ll challenge the status quo and set new benchmarks in embedded systems security.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

What you'll do

• Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
• Developing comprehensive test cases to ensure robust product functionality and performance.

What you need

• BS/MS in Computer Science, Electrical Engineering, or related field.
• 5 years of hands-on experience in RTL design and verification.

XML job scraping automation by YubHub

What you'll do

• Designing and implementing RTL-based HBM controller IP cores for cutting-edge SoC applications.
• Interpreting and translating standard and product functional specifications into detailed micro-architectures.

What you need

• Extensive hands-on experience with RTL design and micro-architecture development from functional specifications.
• Proficiency in verification methodologies (UVM/VMM/OVM), SystemVerilog, and object-oriented verification techniques.

XML job scraping automation by YubHub

XML job scraping automation by YubHub

What you'll do

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

• Leading digital design and verification activities for advanced SERDES products, including Backplane Ethernet, PCIe, SATA, and USB 2/3.
• Analyzing and interpreting digital and analog specifications, ensuring seamless integration in mixed-signal environments.

What you need

• MSEE (preferred) or equivalent with a minimum of 5 years' experience in digital design and verification.
• Proven proficiency in Verilog or VHDL for ASIC development.
• Experience with code quality metrics and coverage-driven verification methodologies.
• In-depth knowledge of high-speed digital and mixed-signal design, asynchronous clock crossings, and DFT methodologies.
• Strong understanding of CDC, synthesis, and power optimization techniques.
• Hands-on experience with simulation tools and collaborative debugging in verification environments.
• Ability to develop system-level specifications for complex digital and analog systems.

What you'll be doing:

• Leading digital design and verification activities for advanced SERDES products, including Backplane Ethernet, PCIe, SATA, and USB 2/3.
• Analyzing and interpreting digital and analog specifications, ensuring seamless integration in mixed-signal environments.
• Driving the creation, execution, and tracking of comprehensive test plans, including functional, assertion, and code coverage metrics.
• Overseeing design flows for clock domain crossing (CDC), synthesis, design-for-test (DFT), and low-power methodologies.
• Collaborating closely with verification teams to debug issues, analyze failure cases, and run gate-level simulations.
• Coordinating with cross-functional teams and providing technical leadership throughout the product lifecycle, from specification development to performance testing of test chips.
• Mentoring and developing junior engineers, fostering a culture of continuous learning and innovation.

The Impact You Will Have:

• Accelerate the delivery of industry-leading mixed-signal ASIC solutions, enabling next-generation connectivity standards.
• Enhance the quality and reliability of high-speed SERDES products through rigorous design and verification practices.
• Drive process improvements that elevate team productivity and product performance.
• Champion best practices in digital and mixed-signal design, setting new benchmarks for quality and efficiency.
• Foster a collaborative and innovative team environment, empowering engineers to reach their full potential.
• Strengthen Synopsys' reputation as a global leader in semiconductor technology through successful project execution and customer satisfaction.

XML job scraping automation by YubHub

What you'll do

You will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.

• Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
• Developing comprehensive test cases to ensure robust product functionality and performance.
• Collaborating with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.
• Staying current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.
• Contributing to the improvement of verification methodologies and automation flows.
• Documenting design specifications, verification plans, and results to ensure transparency and repeatability.
• Participating in code reviews and technical discussions to drive innovation and continuous improvement.

What you need

• BS/MS in Computer Science, Electrical Engineering, or related field.
• 8+ years of hands-on experience in RTL design and verification.
• Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.
• Experience working in Unix/Linux environments.
• Strong debugging and problem-solving skills, especially in complex chip design environments.
• Excellent written and verbal communication skills in English.
• Knowledge of digital, analog, and mixed-signal IP/circuit design (a plus).
• Familiarity with 3D-IC standards and semiconductor verification best practices (desirable).

XML job scraping automation by YubHub

What you'll do

Specifying, designing, and implementing state-of-the-art verification environments for the DesignWare family of synthesizable cores.

Performing verification tasks for IP cores, including test planning and environment coding at both unit and system levels.

Developing and implementing test cases, debugging, functional coverage coding, and testing to meet quality metric goals.

Managing regression and ensuring adherence to verification methodologies.

Collaborating closely with RTL designers and a global team of verification engineers.

Working on next-generation connectivity protocols for commercial, enterprise, and automotive applications.

What you need

BSEE in Electrical Engineering with 12+ years of relevant experience or MSEE with 10+ years of relevant experience.

Experience in architecting verification environments for complex serial protocols.

Proficiency in HVL (System Verilog) and industry-standard simulators such as VCS, NC, and MTI.

Expertise in verification methodologies such as VMM, OVM, and UVM.

Knowledge of protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB.

Familiarity with Verilog and scripting languages such as Perl, TCL, and Python.

Experience with IP design and verification processes, including VIP development.

XML job scraping automation by YubHub