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<source>
  <jobs>
    <job>
      <externalid>f1ae257a-341</externalid>
      <Title>ASIC digital Design, Architect</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>As an experienced and visionary ASIC digital design architect, you will thrive in a fast-paced, collaborative environment. You will bring a passion for solving complex system-level challenges and a track record of delivering innovative, high-quality silicon solutions.</p>
<p>Your deep understanding of IP and SoC architectures enables you to see the big picture while meticulously refining subsystem details. You are comfortable navigating ambiguity, building consensus across diverse teams, and translating product requirements into robust, scalable architectures.</p>
<p>Your leadership inspires those around you, and you excel at mentoring and empowering engineers to reach their full potential. You are adept at balancing trade-offs across performance, power, area, and security, always striving for the optimal solution.</p>
<p>Communication is your strength,you articulate technical concepts clearly to both technical and non-technical stakeholders, ensuring alignment and shared understanding.</p>
<p>With a growth mindset, you embrace new challenges, technologies, and methodologies, continuously seeking opportunities to innovate and improve.</p>
<p>You value inclusion and diversity, recognizing that the best ideas emerge from a culture where everyone feels empowered to contribute.</p>
<p>As an IP Subsystems Architect, you will define architectural specifications for complex subsystems, translate system-level requirements into detailed subsystem architectures, and integrate multiple IP blocks into cohesive subsystems.</p>
<p>You will lead cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.</p>
<p>Establishing and guiding verification and validation strategies, including defining coverage requirements and participating in silicon bring-up and debug sessions.</p>
<p>Producing comprehensive architecture documents, specifications, and guidelines, and clearly communicating architectural intent to a wide range of stakeholders.</p>
<p>Mentoring and coaching engineers, driving best practices, and fostering a culture of technical excellence.</p>
<p>Shape the architecture of industry-leading silicon IP and subsystem solutions that power millions of devices worldwide.</p>
<p>Accelerate time-to-market for differentiated products by ensuring robust and efficient subsystem design and integration.</p>
<p>Reduce risk through rigorous requirements management, architectural clarity, and cross-functional alignment.</p>
<p>Enhance product performance, power efficiency, and reliability, directly impacting customer satisfaction and competitive advantage.</p>
<p>Foster innovation by mentoring teams, introducing new methodologies, and championing best practices.</p>
<p>Strengthen Synopsys’ position as a trusted technology leader in the semiconductor ecosystem.</p>
<p>Bachelor’s or Master’s degree in Electronics or a related field, with 15+ years of industry experience.</p>
<p>At least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture roles.</p>
<p>Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (e.g., SV UVM, BFM development).</p>
<p>Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.).</p>
<p>Experience with synthesis, lint, CDC, low-power flows, and achieving verification closure.</p>
<p>Strong documentation and communication skills for effective cross-team alignment and requirements management.</p>
<p>A strategic thinker with exceptional leadership and mentoring capabilities.</p>
<p>A collaborative partner who thrives in diverse, cross-functional teams.</p>
<p>An excellent communicator, able to tailor messaging for both technical and non-technical audiences.</p>
<p>Innovative and proactive, always seeking opportunities to improve processes and outcomes.</p>
<p>Resilient and adaptable, comfortable with change and ambiguity.</p>
<p>Committed to fostering an inclusive and empowering team culture.</p>
<p>Join the Digital IP Subsystems Team at Synopsys,a high-performing group of architects, designers, and engineers focused on delivering world-class silicon IP and subsystem solutions.</p>
<p>The team collaborates closely with hardware, software, verification, and product teams across the globe, driving innovation in next-generation SoCs for AI, automotive, 5G, IoT, and more.</p>
<p>Together, we value creativity, technical excellence, and inclusion, empowering each team member to make a significant impact.</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</p>
<p>Our total rewards include both monetary and non-monetary offerings.</p>
<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work.</p>
<p>Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>Verilog, SystemVerilog, Simulation tools, Advanced verification methodologies, Industry-standard interface protocols, Synthesis, Lint, CDC, Low-power flows, Verification closure</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) used in the design, verification, and manufacturing of semiconductors.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/asic-digital-design-architect/44408/93465071520</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>0aa4c097-293</externalid>
      <Title>SOC Engineering, Sr Manager</Title>
      <Description><![CDATA[<p>Are you ready to shape the future of smart technology? At Synopsys, you&#39;ll be part of a global team driving the breakthroughs that power self-driving cars, AI, 5G, IoT, and more. We&#39;re looking for a collaborative, innovative leader to join our Digital IP Subsystems Team and help accelerate the Era of Smart Everything.</p>
<p>As a Senior Manager of SOC Engineering, you will oversee and drive end-to-end RTL design, verification, architecture, and integration of advanced subsystems. You will lead teams in Bangalore/Hyderabad, manage customer communications, and ensure timely, high-quality delivery. You will guide your team through the full lifecycle: from requirements to release, ensuring excellence at every stage. Foster innovation and continuous improvement, motivating engineers to reach their full potential.</p>
<p>Key Qualifications:</p>
<ul>
<li>Bachelor&#39;s or Master&#39;s in Electronics or related field, with 15+ years of overall experience</li>
<li>8+ years of hands-on techno-managerial experience managing remote and local teams</li>
<li>Strong track record in Subsystem/SoC design, architecture, and implementation</li>
<li>Deep expertise in Verilog/System Verilog and simulation tools</li>
<li>Proficiency with interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.)</li>
<li>Experience with synthesis, lint, CDC, low power flows, and verification closure (SV UVM, BFM development, test environment creation)</li>
<li>Outstanding communication skills and a passion for team development</li>
</ul>
<p>What Sets You Apart:</p>
<ul>
<li>You have strong, hands-on technical experience and thrive on rolling up your sleeves to solve complex challenges</li>
<li>You excel at turning high-level requirements into innovative solutions and see projects through to successful, timely completion</li>
<li>You build strong, trust-based relationships with customers and stakeholders, always putting their needs at the centre</li>
<li>You bring a creative mindset and lead proactively, inspiring your team to think big, embrace change, and drive continuous improvement</li>
</ul>
<p>Hands-on experience is an absolute must for success in this role.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>Verilog, System Verilog, Simulation tools, Interface protocols, Synthesis, Lint, CDC, Low power flows, Verification closure</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) used in the design and manufacturing of semiconductors.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/soc-engineering-sr-manager/44408/93465071488</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
  </jobs>
</source>