You will work directly with the CFO and founders to shape Holidu's financial architecture and capital allocation, ensuring the company is optimally structured to support growth, operational efficiency, and future financing initiatives.

Responsibilities:

• Capital structure and treasury: Optimize capital structure, cash planning and debt financing (including working capital facilities) to drive long-term financial sustainability
• M&A: Lead financial and tax due diligence and support post-acquisition financial integrations
• Corporate tax strategy: Oversee corporate tax planning together with external advisors; oversee transfer pricing policies and intercompany structures (including VAT treatment)
• Investor and board reporting: Support investor/board materials preparation and fundraising
• Drive strategic initiatives: Partner with management on high-impact strategic projects including M&A (post-merger financial integration, tax structuring), strategic partnerships, business model innovation, and international expansion (legal entity setup, local compliance, and contracting)

Qualifications:

• 8+ years of experience in corporate finance, investment banking, or VC/PE, and ideally within high-growth companies
• Strong commercial acumen applied to financial decision-making
• Exceptional financial modeling, valuation, and scenario analysis skills, with the ability to influence management and cross-functional stakeholders through clear, data-driven insights
• Experience coordinating cross-functional projects including significant external advisor involvement
• Business proficiency in English (written and spoken)
• Experience supporting or leading fundraising and/or M&A transactions is valued
• Experience in procurement is valued
• Experience in a tech scale-up or SaaS business model is valued

Our adventure includes:

• Impact: Shape the future of travel with products used by millions of guests and thousands of hosts. At Holidu ideas become products, data drives decisions, and iteration fuels fast learning. Your work matters - and you’ll see the impact.
• Learning: Grow professionally in a culture that thrives on curiosity and feedback. You’ll learn from outstanding colleagues, collaborate across disciplines, and benefit from mentorship, and personal learning budgets - with a strong focus on AI.
• Great People: Join a team of smart, motivated and international colleagues who challenge and support each other. We celebrate wins and keep our culture fun, ambitious and human. Our customers are guests and hosts - people we can all relate to - making work meaningful and energizing.
• Technology: Work in a modern tech environment. You’ll experience the pace of a scale-up combined with the stability of a proven business model, enabling you to build, test, and improve continuously.
• Flexibility: Work a hybrid setup with 50% in-office time for collaboration, and spend up to 8 weeks a year from other inspiring locations. You’ll stay connected through regular events and meet-ups across our almost 30 offices.
• Perks on Top: Of course, we also offer travel benefits, gym discounts, and other perks to keep you energized - but what truly sets us apart is the chance to grow in a dynamic industry, alongside amazing people, while having fun along the way.

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The ideal candidate should have a proven track record in developing and maintaining Java-based front-end applications in the finance sector. Exceptional team collaboration skills and the ability to work effectively with colleagues across global time zones are crucial.

Millennium strongly prioritizes our synergistic culture, which revolves around teamwork and low egos. You should possess the ability to work in a fast-paced environment both collaboratively and individually while managing multiple projects simultaneously.

The successful individual will have a strong sense of urgency, emotional intelligence, and prioritize a high-caliber end-user experience.

Qualifications:

• Bachelor’s degree in computer science or comparable
• 7+ years of professional experience with Core Java and Java Swing, electronic trading systems and/or trader workstations environment strongly preferred.
• 5+ years of experience working with HTML, JavaScript, CSS, and JQuery
• Deep understanding of multithreading and distributed systems within a high performance, latency-sensitive environment
• Strong knowledge of unit testing frameworks and continuous test-driven development practices
• Enterprise level experience with design patterns such as MVC, MV, MVP
• Enterprise level experience with RESTful web services
• Previous experience liaising with non-technology stakeholders, polished and proactive communication skills

Beneficial/Ideal Technology Experience:

• EXT-JS, AngularJS, AJAX, JSON experience is very beneficial
• Knowledge of equities, futures, options and other asset classes is preferred
• Enterprise level experience with OMS architecture and design is preferred
• Experience with messaging middleware, Solace preferred
• Experience with relational and NoSQL databases. MongoDB preferred
• Experience working with financial data, including reference data, market data, order/execution and positions data.
• Experience working with Cloud: AWS (preferred), GCP or Azure

Millennium pays a total compensation package which includes a base salary, discretionary performance bonus, and a comprehensive benefits package. The estimated base salary range for this position is $175,000 to $250,000, which is specific to New York and may change in the future.

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Carta connects founders, investors, and limited partners through world-class software, purpose-built for everyone in venture capital, private equity and private credit. Trusted by 65,000+ companies in 160+ countries, Carta’s platform of software and services lays the groundwork so you can build, invest, and scale with confidence.

The Team You’ll Work With

Carta is looking for an Integrated Marketing Manager to join our Asia-Pacific, Middle East & Africa (APAC & MEA) marketing team, based in Hong Kong. Carta expanded into Asia Pacific in 2021, with Singapore as our regional hub. We are now opening our office in Hong Kong and building a local, on-the-ground team to support founders, fund managers and investors across Hong Kong and the Greater Bay Area.

The Problems You’ll Solve

• Build Carta’s Brand from the Ground Up in Hong Kong: Establish Carta’s local marketing presence in a new market, ensuring strong brand awareness, credibility, and trust within the startup, VC, PE and private markets ecosystem. Act as the in-market marketing owner, translating global narratives into messaging that resonates with Hong Kong audiences and market dynamics.
• Drive Deep Localization Across Channels: Localize integrated campaigns across content, digital, event, PR and community - ensuring language, tone, formats and channels reflect local norms and expectations. Work closely with the team in Singapore to adapt campaigns, while also identifying when the market requires bespoke, locally-led initiatives.
• Plan and Execute Integrated Campaigns (Brand → Demand): Own end-to-end integrated marketing programs that balance brand-building, education and pipeline creation, including events, thought leadership, digital campaigns and more. Partner closely with Sales and Partnerships to align campaigns with local go-to-market priorities.
• Be the Connector Between Global Strategy and Local Reality: Serve as the voice of the market within the regional marketing team - feeding back insights on audience behavior, competitor activity, cultural nuance, and emerging opportunities.
• Own Local Measurement and Budgeting: Manage the regional budget and track/report on performance across awareness, engagement, and pipeline metrics, helping shape success is measured in an early-stage market.

The Impact You’ll Have

You will define what “good” looks for Carta marketing in Hong Kong. Your work will directly shape our brand perception, ecosystem relationships, and early commercial momentum in the market. This is a rare opportunity to build a market almost from scratch.

About You

• 5+ years of experience in B2B marketing, preferably in SaaS, fintech, or the startup/VC/PE ecosystem
• Proven experience as a full-stack marketer
• comfortable working across brand, content, digital, events, and demand generation
• Experience launching or building a brand in a new or early-stage market (0→1 experience strongly preferred)
• Strong instincts for localization and cultural nuance, particularly within Hong Kong
• Experience collaborating cross-functionally with sales, marketing, and partnerships
• Able to balance strategic thinking with hands-on execution
• you can set direction and do the work
• Strong organizational skills to manage multiple projects and budgets concurrently
• Excellent written and verbal communication skills in English and Cantonese
• Comfortable with analytics and tools like Salesforce, Marketo, Google Analytics, or equivalents
• Deep interest in the private markets in the region

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Your mission will be to embody our vision of an antedisciplinary environment and embrace learning about areas outside of your traditional area of expertise. You will identify and source new business opportunities with biotech and pharma through market research, networking, and by building business relationships to expand Inceptive’s network.

Key responsibilities include leading outbound BD efforts, including prospecting, relationship building, and pipeline management, as well as supporting deal execution (term sheets, negotiations, diligence, closing) and collaborating with scientific and technical teams to translate platform capabilities into partner value.

To succeed in this role, you will need a Master's in science (PhD preferred), ideally with a background in biologics, genetic medicines, or deep learning methods applied to drug development, and 3 years of experience in business development in pharma, biotech or VC.

The salary range for this position is $135K – $240K + Bonus + Equity.

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As an Integrated Marketing Manager at Carta, you will be responsible for developing and executing full-funnel regional campaigns to drive awareness, engagement, and pipeline growth. You will work closely with cross-functional teams to create integrated marketing campaigns that span owned and paid channels, including social media, paid digital, email marketing, virtual events, physical events, and gifting programs.

Key Responsibilities

• Run full-funnel regional campaigns to drive awareness, engagement, and pipeline growth
• Collaborate with content, brand, events, digital, and product teams to bring campaigns to life
• Own end-to-end execution of campaigns, from planning to launch to post-mortem
• Measure and analyze campaign performance, including engagement metrics, attribution, and pipeline impact

The Impact

You will be a key player in elevating Carta's European presence, accelerating customer acquisition through integrated marketing efforts, and shaping the way Carta engages with key audiences and stakeholders in the investor ecosystem.

The Team

You will join a dynamic and diverse group of people who are responsible for Carta's growth across the region. As part of a rapidly growing team, you will have the opportunity to fuel the growth of the company.

About You

• 5+ years of experience in B2B marketing, preferably in SaaS, fintech, or VC/PE ecosystem
• Proven track record of running integrated campaigns and/or demand generation programs with measurable business impact
• Demonstrated ability to own a specific audience segment, managing their end-to-end brand experience across all channels based on a deep understanding of their unique needs
• Comfortable working cross-functionally with multiple teams and stakeholders
• Ability to manage timelines, budgets, and resources effectively
• Strategic thinker who can also execute with attention to detail and creativity
• Strong written and verbal communication skills, with experience localising messaging to regional audiences
• Comfortable with analytics and tools like Salesforce, Marketo, Google Analytics, Luma, or equivalents
• Deep interest in the private markets industry in Europe
• Forward-thinking approach to technology, using AI as a force multiplier to automate routine tasks and focus on high-impact strategy

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Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era.

We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work.

In this role, you will be tasked with providing hands-on implementation and deployment services to our customers. We are looking for an experienced, enthusiastic and hands-on leader who can rapidly learn the Okta platform, our technology and the value proposition that we bring to customers of all sizes.

Duties and responsibilities:

• Work hands on with Okta customers, primarily in a post-sales role, to provide innovative consulting services.
• Gather, analyse, and document post-sales requirements.
• Communicate to customers and partners at the technical and/or functional level appropriate for the situation.
• Be dedicated to providing excellent design and deployment solutions resulting in extraordinary customer satisfaction.
• Be prompt and deliver high quality service and leadership to align with customer goals and requests.
• Manage project scope, schedule, status, and documentation.
• Mentor and train customers on the service.
• Act as a liaison between Customers and Product Management to drive product development.
• Lead interaction and collaboration with other Okta teams such as Engineering and Support as needed to address escalated issues.
• Interact with management and other roles within the customer organisation and Okta.
• Collaborate with the sales team on existing customers up-sell and cross-sell opportunities.
• Perform hands on technical design, configuration, and troubleshooting of the Okta service.
• Shape and Influence Okta’s growth and scalability, by designing new offerings, and finding new ways to deliver amazing customer satisfaction.
• Manage multiple concurrent deployment projects.
• Apply knowledge of technologies and protocols to support identity federation and robust access control models, such as SAML 2.0, WS-Federation, OAuth, and OpenID Connect.
• While providing customer service, apply knowledge of cloud architectures as well as complex enterprise on-premise IT landscapes.
• Apply software development experience (Java, Ruby, .Net, PHP, REST/JSON, etc) when working with customers.
• Utilise knowledge of typical enterprise identity life cycle management processes and standards.
• Apply experience with JavaScript and one of the major JavaScript MVC frameworks (Backbone, Angular, Ember, React, etc.) when working on customer integrations.
• May provide mentoring, guidance, and expertise to less experienced team members.
• Ensure quality and time management processes are followed by team (e.g., change controls, time tracking).
• Commit to and use a knowledge repository for deployment standard methodologies and other customer ideas as continuous improvement.

Minimum REQUIRED Knowledge, Skills, and Abilities:

• 5-7 years experience as a technical consultant delivering solutions to external customers.
• Experience with technologies and protocols to support identity federation and robust access control models (e.g., OAuth, OpenID Connect, SAML 2.0, WS-Federation).
• Software development experience (Java, Ruby, .Net, PHP, REST/JSON, etc).
• Some knowledge of enterprise web technologies, security and cutting-edge infrastructures.
• Experience with JavaScript and one of the major JavaScript MVC frameworks (Backbone, Angular, Ember, React, etc.)
• Ability to work independently and multi-functionally supporting the development of client work you're doing.
• Knowledge of typical enterprise identity life cycle management processes and standards.
• Ability to Multi-task and manage multiple customer engagements is a requirement.
• Able and willing to be a hands-on contributor.
• Superb communication skills, including issue tracking, triaging and crisis management.
• Experience in Process Improvement, Decision-making, Managing Processes, Planning, Analyzing Information and Developing Standards.

Additional requirements:

• This position requires the ability to access federal environments and/or have access to protected federal data. As a condition of employment for this position, the successful candidate must be able to submit documentation establishing U.S. Person status (e.g. a U.S. Citizen, National, Lawful Permanent Resident, Refugee, or Asylee. 22 CFR 120.15) upon hire.
• Must be available to work onsite at Fort Meade.
• Must have active Secret Clearance.

Nice to have:

• Experience in designing and implementing security and identity management solutions to support critical systems and business programs.
• Experience in delivering Okta implementations for organisations.
• Mobile development experience preferred (iOS and Android).

Problem Solving:

• Exhibits confidence and an extensive knowledge of emerging industry practices when solving business problems.
• Asks probing questions to elicit facts and clarify a situation.
• Identifies critical issues with ease.
• Engages appropriate resources to obtain information, seek suggestions and acquire assistance.
• Pushes creative thinking beyond the boundaries of existing industry practices and customer mindsets.

Communication:

• Communicates with internal and external customers and all levels of management.
• Effectively communicate technical information to non-technical audiences.
• Delivers informative, well-organised presentations.
• Understands how to communicate difficult/sensitive information thoughtfully.
• Uses active listening skills to figure out and understand the customer's business goals, objectives and priorities.

Team and Customer Interaction:

• Facilitates effective team interaction.
• Communicates effectively with customers to identify needs and evaluate alternative technical solutions with customers.
• Continually seeks opportunities to increase customer satisfaction and deepen client relationships.
• Manages client expectations effectively.

Education:

A Bachelor's degree (or equivalent) in Computer Science, Information Technology or related discipline required.

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This role demands deep technical expertise in backend architecture and the ability to influence decisions across the team and adjacent engineering groups. You will thrive in a fast-paced, zero-to-one environment, cutting through ambiguity to drive product-market fit.

In practice, that means using AI tools for architectural reasoning and design review, generating and validating test coverage, accelerating code review cycles, and helping engineers build judgment about when AI output is trustworthy and when it isn't.

You'll define what 'good' looks like here and bring the team along. You'll also be a force multiplier - mentoring senior engineers, raising the technical bar through architecture.

Proactively shape the technical strategy and architecture of a greenfield VDC identity ecosystem, partnering with principal engineers to ensure decisions prioritize open standards and interoperability.

Own architectural decisions in a fast-moving environment - balancing rapid delivery with long-term scalability, security, and platform integrity.

Identify and mitigate technical risks before they become blockers; escalate dependencies early and widely.

Own production health for your systems - incident response, root cause identification, and driving operational improvement projects (monitoring coverage, alert reduction, runbook quality).

Champion high engineering standards across the team, including rigorous code reviews, comprehensive unit/functional testing, and architectural review processes to ensure the platform is tamper-proof.

Drive continual evolution in the adoption of AI-native development practices, helping the team rethink how we design, review, and ship software with AI as a core part of the workflow.

Proactively identify and prioritize tech debt; drive improvements in areas beyond feature work - CI/CD, observability, documentation, reliability, and support processes.

Partner with Product and Design to understand and own the desired customer outcome, not just the technical deliverable.

Actively invest in the growth of peer engineers, taking responsibility for raising the technical bar of the team as a whole.

Operates well beyond basic AI tool usage - understands how to apply AI meaningfully across the full software development lifecycle, can evaluate and adopt new AI tooling with good judgment, and is able to establish practices and bring a team along.

Proven experience defining scalable backend architectures and integrating complex APIs with modern web technologies - including the ability to make and defend architectural decisions with lasting org-wide impact.

Solid understanding of web authentication and authorization fundamentals - how auth flows work, token-based access (JWT, OAuth), and best practices for securing sensitive user data.

Deep expertise in building highly reliable, secure, enterprise-grade software using Java or Node.js.

Proficiency in JavaScript or TypeScript, with the ability to navigate and contribute to the frontend to unblock feature development.

Strong understanding of cloud architecture principles, with experience designing and operating large-scale services on AWS.

Hands-on experience with identity protocols such as OIDC4VP, OIDC4VCI, OAuth, and the W3C Verifiable Credentials data model.

Prior experience leading a team of engineers through a meaningful shift in ways of working - whether around AI adoption, developer tooling, or engineering culture change.

Practical knowledge of cryptography: public/private key infrastructure (PKI), digital signatures, and hashing, particularly in the context of Verifiable Credentials or DIDs.

Experience building or maintaining publicly released SDKs used by external developers.

Experience in one of the following areas is preferred: developing Identity and Access Management (IAM) tooling, working with blockchain technology, or contributing to a 'zero-to-one' startup-like team.

The annual base salary range for this position for candidates located in Canada is between $160,000-$220,000 CAD.

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The ideal candidate brings deep experience in B2B customer marketing within EMEA, with a strong affinity for the startup ecosystem and a proven track record of building customer advocacy programs from the ground up. You'll execute engagement strategies that resonate with technical founders, developers, and engineering leaders while navigating the diverse cultural nuances and market dynamics across European tech hubs.

Responsibilities:

• Develop compelling customer narratives,case studies, technical deep-dives, founder testimonials, thought leadership, video content,that resonate with EMEA startup audiences and showcase how AI-native companies are building with Claude
• Define the EMEA startup customer segmentation and tiering framework, mapping accounts from early-stage through growth-stage across European markets to guide advocacy prioritization and resource allocation
• Balance high-touch programming for marquee EMEA startup customers with scalable customer marketing initiatives that reach the broader developer and founder community across the region
• Design and execute personalized engagement strategies for strategic startup accounts, ensuring programming resonates with technical founders and engineering leaders while addressing regional market dynamics
• Orchestrate key moments programming including founder dinners, customer speaking opportunities at EMEA conferences, technical workshops, and startup showcase events across key tech hubs (London, Berlin, Paris, Amsterdam, Stockholm)
• Develop EMEA startup customer advisory programs that create authentic experiences and deepen relationships with highest-value accounts and influential founders across the region
• Partner with EMEA Startups Sales leadership and Venture Partnerships to identify expansion opportunities and ensure customer marketing initiatives directly support account growth and VC portfolio engagement
• Coordinate with strategic EMEA and global VC partners on co-marketing opportunities featuring portfolio company success stories
• Build and manage a regional programming calendar that balances customer advocacy activities with strategic account engagement across the EMEA startup ecosystem
• Identify and cultivate strategic customer relationships with founders and technical leaders across EMEA who can serve as powerful advocates and reference points for the startup community
• Create content that earns respect from technical audiences,authentic founder stories, technical implementation deep-dives, and developer-focused case studies tailored for EMEA markets

You may be a good fit if you:

• Have 6+ years of B2B customer marketing experience within SaaS or technology companies, ideally within EMEA markets or with significant EMEA responsibility
• Have a proven track record building customer advocacy programs from scratch, with demonstrated success in customer storytelling, advocacy program development, and account engagement
• Have experience marketing to and building relationships with high-growth EMEA startups and technical founders
• Can speak credibly to technical audiences,understand AI concepts, developer workflows, and technical use cases well enough to identify and tell compelling stories
• Have a strategic yet hands-on approach,ability to balance high-touch marquee customer programming with scaled programs, understanding when each approach is appropriate
• Have deep understanding of EMEA market dynamics, regional preferences, and cultural nuances that inform customer engagement strategies within the startup ecosystem
• Have exceptional storytelling abilities,can identify compelling customer narratives and bring them to life across multiple formats that feel authentic, not corporate
• Have a fast-paced working style with strong bias to action,comfortable shipping 80% solutions quickly and iterating, with ability to pivot as priorities shift
• Can thrive in ambiguity and startup environments, building programs with minimal guidance
• Have a background in B2B tech, ideally with experience at fast-paced scale-ups or developer-focused companies
• Currently based in EMEA region, and if applicable, willing to relocate to London

Strong candidates may also:

• Have experience building relationships with EMEA VCs, accelerators, or partnering with VC firms to drive portfolio engagement and co-marketing
• Have previous experience at leading AI companies or marketing AI/ML products specifically
• Have experience in community building, customer advisory programs, or founder community management
• Have former founder experience or early employee at a successful startup
• Have experience scaling customer marketing programs across multiple European markets
• Have fluency in additional European languages (French/German)

Role-specific policy: For this role, we expect all staff to be able to work from our London office at least 2 days a week. We encourage you to apply even if you might need some flexibility for an interim period of time for relocation.

Deadline to apply: None. Applications will be reviewed on a rolling basis.

The annual compensation range for this role is listed below.

For sales roles, the range provided is the role’s On Target Earnings (“OTE”) range, meaning that the range includes both the sales commissions/sales bonuses target and annual base salary for the role.

Annual Salary: £160,000-£160,000 GBP

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You will serve as the focal point for all technical matters related to thrust vectoring, ensuring the system enables precise flight control authority, integrates cleanly with the engine and airframe, and performs reliably across the full range of operational conditions. This role is hands-on, data-driven, and highly cross-functional, requiring collaboration with controls, airframe, flight test, and mission teams.

Responsibilities:

• Act as the single-threaded owner for the TVC system, accountable for all technical decisions from concept to flight.
• Define and manage system requirements, performance goals, and mechanical/electrical interfaces.
• Design and integrate vectoring mechanisms with the engine and surrounding structure.
• Lead ground and flight testing of the TVC system, including instrumentation planning, data collection, and performance evaluation.
• Analyze control authority, vectoring bandwidth, and dynamic response across the flight envelope.
• Collaborate with the controls team to shape vectoring logic and ensure closed-loop system performance meets CONOPS requirements.
• Own fault management, failure investigations, and system reliability strategies.
• Represent the TVC system in design reviews, technical checkpoints, customer briefings, and leadership updates.

Qualifications:

• Bachelor's degree in aerospace engineering, Mechanical Engineering, or a related discipline.
• 7+ years of experience in aerospace propulsion or flight control systems, with relevant experience owning subsystem development.
• Deep understanding of nozzle dynamics, actuation systems, mechanical integration, and structural/thermal constraints.
• Demonstrated experience in hardware development, test planning, and flight test support.
• Strong proficiency in Python for performance analysis, data processing, and model correlation.
• Familiarity with tools such as ANSYS, FEA, or thermal/fluid modeling for mechanism and system validation.
• U.S. Citizenship or ability to comply with ITAR requirements.

Preferred Qualifications:

• Experience with TVC or control effector systems on UAVs, tactical aircraft, or rocket platforms.
• Familiarity with low-bypass turbofan engines and integration constraints near hot-end propulsion hardware.
• Experience collaborating on control logic development, transient response shaping, and actuator tuning.
• Proficiency with Siemens NX and Teamcenter for CAD and configuration control.
• Background in failure modes analysis, margin modeling, and system validation strategies.
• M.S. or Ph.D. in Aerospace Engineering or a related discipline.

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The successful candidate will define integration architecture, ensure scalability, and align with enterprise security and compliance standards. This is an in-office position. Experience in GovCloud or regulated environments is preferred.

Responsibilities:

• Define and own enterprise integration architecture using MuleSoft
• Design scalable, reusable APIs and integration patterns
• Lead implementation of integrations across Salesforce, NetSuite, Workday, and other systems
• Establish API governance and best practices
• Ensure performance, reliability, and security of integrations
• Collaborate with stakeholders to translate requirements into solutions
• Mentor developers and integration engineers
• Manage API lifecycle including monitoring and optimization
• Ensure compliance with security standards
• Support troubleshooting and resolution of issues

Qualifications:

• 10+ years of experience in enterprise integration and architecture
• Strong experience with MuleSoft Anypoint Platform
• Understanding of API-led connectivity and microservices
• Experience integrating Salesforce, NetSuite, Workday
• GovCloud experience preferred
• Knowledge of REST/SOAP APIs and security protocols
• Bachelor’s degree in Computer Science or related field

Physical Demands:

• Prolonged periods of sitting at a desk and working on a computer
• Occasional standing and walking within the office
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment
• Visual acuity to read screens, documents, and reports
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages)

Additional Information:

• Benefits: Medical Insurance, Dental and Vision Insurance, Time Off, Parental Leave, Competitive Salary, Retirement Plan, Stock Options, Life and Disability Insurance, Pet Insurance
• This role requires access to export-controlled information or items that require “U.S. Person” status.

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Key Responsibilities

• Own the security architecture for Saronic's AWS environments, including multi-account strategy, network segmentation, identity architecture, and data protection across commercial AWS and AWS GovCloud

• Design and maintain secure-by-default Terraform modules and IaC standards that teams adopt as the standard path, enforcing least privilege, secure defaults, and compliance requirements

• Implement preventive controls (SCPs, permission boundaries, policy-as-code) and detective controls (Config rules, CloudTrail analysis, GuardDuty) as a unified, layered security model

• Design and enforce IAM patterns across AWS accounts, services, and workloads including least-privilege policies, permission boundaries, cross-account access, federation, and service-to-service authentication

• Implement and govern secrets management using tools such as AWS Secrets Manager or Vault, integrated into CI/CD and runtime environments

• Partner with DevOps and Platform Engineering to embed security into CI/CD pipelines, infrastructure provisioning, and deployment workflows

• Build automated compliance validation into infrastructure pipelines and replace manual security gates with automated guardrails wherever possible

• Create self-service security tooling and patterns that allow teams to operate with speed and autonomy while maintaining compliance

• Integrate logging, monitoring, and alerting across cloud infrastructure to validate control effectiveness and detect misconfigurations or threats

• Build and tune cloud-native detections using CloudTrail, GuardDuty, Config, and SIEM integrations

• Support incident response for cloud security events, drive root-cause analysis, and translate findings into improved guardrails and controls

Required Qualifications:

• 6+ years of hands-on experience in cloud security engineering, infrastructure security, DevSecOps, or a closely related security engineering role

• Expert-level proficiency with Terraform, including module design, state management, policy-as-code, and managing complex multi-environment configurations

• Deep expertise in AWS security services and architecture, including IAM, Organizations, SCPs, Control Tower, CloudTrail, Config, GuardDuty, Security Hub, KMS, and VPC security

• Demonstrated experience building security guardrails and reusable infrastructure patterns that engineering teams adopt without friction

• Strong experience with CI/CD pipeline security, IaC review processes, and automated compliance validation

• Experience operating in AWS GovCloud or FedRAMP-regulated cloud environments

• Strong proficiency in Python, Go, Rust, or equivalent languages for building security automation and tooling

• Ability to obtain and maintain a security clearance

Preferred Qualifications:

• Experience in defence, aerospace, robotics, autonomy, or other high-assurance environments

• Experience designing multi-account AWS landing zones and organisational security architectures from the ground up

• Hands-on experience with Kubernetes security, container security, and service mesh security in cloud-native environments

• Familiarity with NIST SP 800-171, NIST SP 800-53, FedRAMP, or Cloud Computing SRG Impact Levels

• Experience with infrastructure drift detection, automated remediation, and continuous compliance monitoring

• Relevant certifications such as AWS Security Specialty, AWS Solutions Architect Professional, HashiCorp Terraform Associate/Engineer, CCSP, or CISSP

Additional Information

Benefits: Medical Insurance: Comprehensive health insurance plans covering a range of services. Saronic pays 100% of the premium for employees and 80% for dependents. Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care. Saronic pays 100% of the premium under the basic plan for employees and 80% for dependents. Time Off: Generous PTO and Holidays. Parental Leave: Paid maternity and paternity leave to support new parents. Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses. Retirement Plan: 401(k) plan. Stock Options: Equity options to give employees a stake in the company’s success. Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage. Pet Insurance: Discounted pet insurance options including 24/7 Telehealth helpline. Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

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Responsibilities:

• Develop new product features that leverage the network model to help users visualise their network, understand how it behaves, see how it has evolved, answer specific questions, and plan changes
• Design the data model for new product features
• Propose and implement REST APIs to support the Forward Networks web application and to publish to customers
• Constructively review product designs, technical design documents, and code changes

Requirements:

• At least 5+ years of full lifecycle software development experience
• Expertise in Java (version 17 or above)
• Considerable experience with a dependency injection framework such as Guice or Spring and a talent for writing (and refactoring) code for testability
• Deep understanding of REST API design fundamentals and best practices
• Proficiency in SQL and relational database schema design
• Strong object-oriented design and development skills
• Familiarity with the principles of functional programming
• Good communication skills

Nice to have:

• Experience with the Spring Web MVC framework or Spring Boot
• Some experience with other JVM languages such as Groovy, Kotlin, or Scala
• Some experience with TypeScript or modern JavaScript

This position is a regular, full-time opportunity with Forward Networks in Bangalore, India.

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Responsibilities:

• Provide advice and guidance as the Forward Networks subject matter expert to ensure successful ongoing usage and adoption of our technologies.
• Take ownership of post-sales technical issues, working with cross-functional teams to document problem resolution steps and troubleshooting procedures.
• Walk customers through the various stages of adoption with Forward Networks Platform.
• Work directly with our internal Product Management, Engineering, Sales and Marketing teams.

Requirements:

• Must be fluent in Japanese and English, both written and spoken.
• B.S. Computer Science or equivalent educational experience.
• 5+ years of customer-facing experience in a post-sales engineer role for a networking company, relevant software vendor, or as a network engineer for a large enterprise, service provider or Governmental agencies.

Experience:

• Must be fluent in Japanese and English, both written and spoken.
• Strong understanding of Networking and Security fundamentals.
• Experience in working with multiple Network vendors (e.g. A10, Arista, Cisco, F5, Fortinet, Juniper, Palo Alto Networks etc.).
• Strong verbal and written communications skills with a focus on needs analysis, positioning, business justification, and closing techniques; Superior presentation skills.
• Excellent analytical & problem-solving skills, combined with the ability to provide quick resolution to problems.
• Demonstrable success in thinking strategically, executing tactically while providing consistent and high levels of customer satisfaction and retention in a fast-paced environment.

Highly Desired:

• One or more of the following certificates: CCIE, JNCIE or VCDX.
• Experience in working for a startup company.
• Working knowledge of API driven workflows and scripting languages (Python, bash, jq, graphql, etc).

Candidates will work remotely with 10-20% travel requirement for customer and internal meetings.

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Responsibilities: Provide advice and guidance as the Forward Networks subject matter expert to ensure successful ongoing usage and adoption of our technologies. Take ownership of post-sales technical issues, working with cross-functional teams to document problem resolution steps and troubleshooting procedures. Walk customers through the various stages of adoption with Forward Networks Platform. Work directly with our internal Product Management, Engineering, Sales, and Marketing teams. Some travel (10%)

Requirements: B.S. Computer Science or equivalent educational experience. 5+ years of customer-facing experience in a post-sales engineer role for a networking company, relevant software vendor, or as a network engineer for a large enterprise, service provider, or governmental agencies. Must be willing to be onsite at customer location in either Charlotte, NC/Jersey City, NJ/NYC.

Experience: Strong understanding of Networking and Security fundamentals. Experience in working with multiple Network vendors (e.g., A10, Arista, Cisco, F5, Fortinet, Juniper, Palo Alto Networks, etc.). Strong verbal and written communications skills with a focus on needs analysis, positioning, business justification, and closing techniques; superior presentation skills. Excellent analytical & problem-solving skills, combined with the ability to provide quick resolution to problems. Demonstrable success in thinking strategically, executing tactically while providing consistent and high levels of customer satisfaction and retention in a fast-paced environment.

Highly Desired: One or more of the following certificates: CCIE, JNCIE, or VCDX. Experience in working for a startup company. Working knowledge of API-driven workflows and scripting languages (Python, bash, jq, GraphQL, etc). The ideal candidate will be onsite at customer location in Charlotte, NC. The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary + bonus is expected to be between $165,000/yr to $190,000/yr. The offered compensation may also include stock.

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Responsibilities:

• Provide advice and guidance as the Forward Networks subject matter expert to ensure successful ongoing usage and adoption of our technologies
• Take ownership of post-sales technical issues, working with cross-functional teams to document problem resolution steps and troubleshooting procedures
• Walk customers through the various stages of adoption with Forward Networks Platform
• Work directly with our internal Product Management, Engineering, Sales, and Marketing teams

Requirements:

• B.S. Computer Science or equivalent educational experience
• 5+ years of customer-facing experience in a post-sales engineer role for a networking company, relevant software vendor, or as a network engineer for a large enterprise, service provider, or governmental agencies

Experience:

• Strong understanding of Networking and Security fundamentals
• Experience in working with multiple Network vendors (e.g. A10, Arista, Cisco, F5, Fortinet, Juniper, Palo Alto Networks, etc.)
• Strong verbal and written communications skills with a focus on needs analysis, positioning, business justification, and closing techniques; superior presentation skills
• Excellent analytical & problem-solving skills, combined with the ability to provide quick resolution to problems
• Demonstrable success in thinking strategically, executing tactically while providing consistent and high levels of customer satisfaction and retention in a fast-paced environment

Highly Desired:

• One or more of the following certificates: CCIE, JNCIE, or VCDX
• Experience in working for a startup company
• Working knowledge of API-driven workflows and scripting languages (Python, bash, jq, GraphQL, etc)

Ideal candidate will be onsite at customer location in Seattle. The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary + bonus is expected to be between $175,000/yr to $200,000/yr. The offered compensation may also include stock.

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As a Senior RTL/Synthesis Digital Design Engineer, you will be responsible for architecting and developing RTL for high-bandwidth PHY IP and test chips. You will define synthesis constraints, resolve STA and simulation issues, and collaborate with verification, controller, and lab teams.

Key responsibilities include:

• Performing logical and physical synthesis, formal verification, and quality checks
• Analysing timing violations and generating reports
• Mentoring junior engineers and supporting digital flow development

The ideal candidate will have a strong background in RTL design and synthesis, with expertise in industry tools such as VCS, Verdi, Spyglass, and Synopsys sign-off. You should also have good English communication skills and be able to work effectively in a team.

At Synopsys, we value talented individuals who are passionate about technology and problem-solving. We offer a comprehensive benefits package, including health and wellness programs, time away, family support, and competitive compensation.

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The role involves intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

As a DFT Junior Engineer, you will own DFT tasks, create timing constraints for mission and DFT modes, work with design and implementation teams, support customer IP integration and silicon bring-up, automate workflows with scripting, and mentor junior team members.

The impact you will have includes enhancing IP core testability and quality, accelerating time-to-market for new chipsets, facilitating seamless SoC integration, promoting best practices and team growth, advancing DFT methodologies at Synopsys, and supporting customers during silicon bring-up.

To be successful in this role, you will need a degree in Electronics, Electrical Engineering, or a related field, no DFT experience required for junior roles, knowledge of scan insertion, ATPG, JTAG, experience with Synopsys tools (Design Compiler, VCS, TetraMAX) preferred, and scripting skills (Perl, TCL, Python).

You will be an analytical, detail-oriented, proactive, collaborative and communicative individual who is adaptable and eager to learn.

Join a skilled DFT engineering team that values collaboration, innovation, and technical excellence. Benefit from mentorship and tackle industry-leading challenges together.

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more about salary and benefits during the process.

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are: You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in a fast-paced, dynamic environment and are excited by the opportunity to work on next-generation connectivity protocols that power commercial, enterprise, and automotive applications. With a solid foundation in Electrical/Electronics Engineering (BSEE with 5+ years or MSEE with 3+ years of relevant experience), you bring deep expertise in System Verilog and industry-standard verification methodologies such as UVM/OVM/VMM. Your hands-on experience developing HVL-based test environments and extracting meaningful verification metrics sets you apart as a technical leader.

You are a collaborative team player who values knowledge sharing and actively contributes to a culture of continuous improvement. Your familiarity with protocols like MIPI-I3C, UFS, AMBA, Ethernet, DDR, PCIe, and USB allows you to quickly ramp up on new projects and deliver results. You bring a strong analytical mindset, exceptional debugging skills, and a drive to meet and exceed quality metrics. Experienced with scripting languages like Perl, TCL, and Python, you automate processes for efficiency and scalability. Your strong communication skills, initiative, and global perspective enable you to work effectively with cross-functional and multi-site teams. Above all, you are a lifelong learner who embraces challenges, adapts to new technologies, and is committed to shaping the future of silicon design.

What You’ll Be Doing: Specify, architect, and implement advanced verification environments for DesignWare IP cores using System Verilog and state-of-the-art methodologies. Develop and execute comprehensive test plans, ensuring coverage of unit-level and system-level requirements. Design, code, and debug testbenches, test cases, and functional coverage models to validate complex IP functionalities. Perform functional coverage analysis and manage regression testing to achieve and maintain required quality metrics. Collaborate closely with RTL designers and global verification teams to resolve issues and drive verification closure. Leverage scripting (Perl, TCL, Python) to automate verification flows, streamline processes, and enhance productivity. Contribute to the development and refinement of verification methodologies, including VIP development and formal verification approaches.

The Impact You Will Have: Ensure the delivery of high-quality, robust IP cores that power critical applications in commercial, enterprise, and automotive markets. Drive innovation in verification methodologies, setting new standards for efficiency and coverage. Enhance time-to-market by identifying and resolving design and verification issues early in the development cycle. Strengthen Synopsys’ reputation as a leader in silicon IP and verification through technical excellence and customer focus. Mentor and support junior engineers, fostering a culture of learning and continuous improvement. Contribute to the success of global, multi-site R&D teams by providing expertise and driving cross-functional collaboration.

What You’ll Need: BSEE with 5+ years or MSEE with 3+ years of relevant experience in ASIC or IP verification. Expertise in developing HVL (System Verilog)-based verification environments and testbenches. Strong hands-on experience with industry-standard simulators (VCS, NC, MTI) and debugging tools. Proficiency in verification methodologies such as UVM, OVM, or VMM; exposure to formal verification is highly desirable. Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB. Familiarity with scripting languages (Perl, TCL, Python) and HDLs (Verilog); experience with VIP development is a plus. Demonstrated ability to work with functional coverage-driven methodologies and quality metric goals.

Who You Are: Analytical thinker with strong problem-solving and debugging skills. Excellent verbal and written communication abilities. Team player who thrives in collaborative, multi-site environments. Proactive, self-motivated, and able to take initiative on challenging projects. Detail-oriented, quality-focused, and driven by a desire to excel. Adaptable and eager to continuously learn and apply new technologies.

The Team You’ll Be A Part Of: You will join the Solutions Group’s DesignWare IP Verification R&D team, a highly skilled and diverse group of engineers dedicated to delivering world-class IP cores for next-generation connectivity. The team operates in a collaborative, multi-site environment, leveraging global expertise to solve complex verification challenges. Together, you will drive innovation, share knowledge, and uphold Synopsys’ reputation for technical leadership and excellence.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

A peek inside our office

Benefits: At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

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Our high-speed interface IP (PCIE/CXL/USB/DP) subsystem solution is gradually becoming a key module of AI acceleration, GPGPU, Big-Data SOC chips. More and more customers have adopted our latest PCIE GEN6/GEN7 with CXL/IDE to improve security, reduce system latency, and meet the high bandwidth demands of high-end SOCs such as various cloud services, AI, and GPGPU.

Responsibilities:

• Implement IP (PCIE/CXL/USB/DP) subsystem design using synthesis, timing optimization, SDC writing, CDC/RDC checking, etc.
• Work with internal teams and customers to ensure successful integration and validation of the IP subsystem.
• Collaborate with cross-functional teams to develop and maintain design documentation, test plans, and other deliverables.

Requirements:

• Minimum 5+ years of experience in IP/ASIC/SOC design implementation.
• Hands-on experience in synthesis, timing optimization, SDC writing, CDC/RDC checking, etc.
• Domain understanding of one of the interface standards: PCIe, USB, Display Port, Ethernet, or DDR.
• Good communication skills while interacting with internal teams and customers.

Preferred Experience:

• Experience in Design Compiler, Fusion Compiler, PrimeTime, Spyglass, or VC Spyglass.
• Experience in DesignWare Core IPs or PHYs.
• Experience in TCL, Perl, Python, or other shell scripting.

Benefits:

• Competitive salary and benefits package.
• Opportunities for professional growth and development.
• Collaborative and dynamic work environment.

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The successful candidate will have a BS/MS/PhD in Electronics Engineering or Telecommunications and 2+ years of experience in RTL design for ASIC or PHY IP. You will have experience with VCS, Verdi, Spyglass, Perl/TCL/Python and knowledge of clock domain crossing, APB, JTAG. Good English communication skills are essential.

As a member of our team, you will advance industry-leading high bandwidth interface IP, ensure robust design and verification processes, drive innovation in RTL design and workflows, and enhance productivity through automation.

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Your key responsibilities will include working in a Digital and Verification Development team during the development and validation of complex digital mixed signals for high-speed interface IP. You will plan tests, checklists, coverage, and assertion planning. You will create detailed verification environments from functional specifications. You will apply advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification. You will write test cases, checkers, and coverage that implement the verification test plan. You will debug simulations, including those of real signals modeled using SystemVerilog for analog. You will perform RTL, GLS, and co-simulations and ensure coverage closure. You will participate in technical reviews and contribute actively. You will provide customer support with the bring-up of IP in customer simulation environments. You will follow and improve development processes to ensure high-quality output.

To be successful in this role, you will need a BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications. You will require 2+ years of experience in design verification. You will need strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal). Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus. You will require proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.

As a highly responsible and result-oriented individual, you will excel in this role if you have excellent English communication skills, both verbal and written. You will be a great team player, willing to support others. You will be self-motivated and highly enthusiastic about technology and solving problems.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a global leader in semiconductor design and verification solutions, we enable the world's most advanced technology companies to deliver cutting-edge SoCs and systems. Our mission is to accelerate innovation through state-of-the-art verification IP, methodologies, and strategic consulting.

You are a passionate and analytical engineer with a proven track record in digital design and verification, ready to embrace the challenge of developing advanced embedded memory test and SLM architectures. You thrive in dynamic, collaborative environments where your technical expertise and innovative mindset can drive significant impact.

You are detail-oriented, always seeking to ensure design integrity and optimal performance through rigorous validation, debugging, and synthesis. Your hands-on approach extends to scripting and automation, enhancing productivity and accelerating development cycles. You communicate effectively with cross-functional teams, translating complex technical concepts for diverse stakeholders, and you enjoy mentoring and guiding others to achieve shared goals.

Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks. Performing digital design validation and functional verification at both block and SoC levels. Executing logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs. Applying DFT (Design-for-Test) expertise for comprehensive memory and logic testing. Identifying and troubleshooting design timing and DFT functional issues to optimize chip performance. Utilizing and scripting in languages such as Tcl to automate design and verification workflows. Developing and maintaining technical collateral including test suites, protocol documentation, and debug guides.

Accelerate the delivery of reliable, high-performance SoCs for industry-leading technology companies. Shape the evolution of embedded memory test and SLM architectures that power next-generation devices. Drive innovation in simulation, emulation, and verification methodologies for advanced semiconductor products. Enhance customer satisfaction by delivering robust, easy-to-use IP and responsive technical support. Contribute to the continuous improvement of Synopsys' design and verification solutions, setting new industry benchmarks. Mentor and elevate team capabilities, fostering a culture of excellence, knowledge sharing, and mutual growth. Influence the adoption of best practices in DFT, protocol compliance, and subsystem integration across the organization. Support strategic decision-making by providing technical insights and market-driven recommendations.

2-4 years of relevant experience in ASIC digital design and verification. Proficiency in RTL simulation, logic synthesis, and timing verification tools. Strong understanding of DFT architectures. Familiarity with debug tools such as Verdi and workflows for performance analysis. Programming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl. Experience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking.

Analytical thinker with exceptional problem-solving skills. Effective communicator, able to collaborate across disciplines and with external partners. Proactive, self-motivated, and adaptable in fast-paced environments. Committed to quality, detail, and continuous learning. Team player who values diversity, inclusion, and mentorship. Customer-focused, dedicated to delivering timely and effective solutions.

You'll join a highly collaborative and innovative team of digital design and verification experts, working at the forefront of embedded memory test and SLM architecture development. The team bridges R&D, marketing, and customer engagement, driving the roadmap for advanced SoC solutions. With a culture of knowledge sharing, technical excellence, and mutual support, you'll thrive in an environment that values creativity, initiative, and a shared commitment to shaping the future of semiconductor technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Responsibilities:

• Collaborate with R&D architects and customers on hardware-assisted verification products.

• Drive all aspects of the technology life cycle, from development to product sign-off and customer deployment.

• Define test strategies and methodologies to improve ease-of-use, quality of results, and interoperability with other Synopsys tools.

• Become an expert in emulation and prototyping methodologies and flows, including design, partitioning, testing, synthesis, and simulation-based verification.

• Leverage your close interaction with customers, R&D, Marketing, and Sales teams to demonstrate the differentiated emulation/verification environment.

• Adapt to recognised best practices and policies in Synopsys to become proficient in various processes involved in the Product Release Cycle.

• Work with designs from varied verticals to enable and support key ZeBu products in early-stage development.

The Impact You Will Have:

• Enhance Synopsys' emulation and prototyping solutions by driving technology development and customer deployment.

• Improve the ease-of-use, quality of results, and interoperability of Synopsys tools, contributing to overall product excellence.

• Provide expert consultation for solving complex problems, thereby increasing customer satisfaction and product adoption.

• Ensure successful execution of projects from start to completion, contributing to the timely delivery of high-quality products.

• Support the advancement of cutting-edge designs in various verticals such as HPC, AI, storage, networking, and automotive.

• Facilitate the proliferation of Synopsys' differentiated emulation/verification environment through close collaboration with multiple teams.

What You’ll Need:

• BSEE/MS with 7+ years of related experience.

• Expertise in Emulation and/or Prototyping flows, systems, and methodologies.

• Strong proficiency in Verilog, System Verilog, and VHDL.

• Understanding of verification concepts and experience with functional simulators.

• Experience with scripting languages.

• Knowledge in Simulation flows, Assertion, DPI, and Transactors.

• Complex problem-solving and debugging skills.

• Strong communication skills and the ability to interact with customers and peers.

• Knowledge in synthesis and timing analysis concepts (preferred).

• Familiarity with Synopsys solutions and tools like ZeBu, HAPS, VCS, Verdi, Proto Compiler, Synplify, DC, and Formality (preferred).

• Experience with Xilinx & Altera architecture and toolchains (preferred).

• Understanding of SW/HW debug methodologies and experience with standard SW/HW debug tools (preferred).

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect.

Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Join us to transform the future through continuous technological innovation.

You Are:

You have a strong passion for working with embedded processors or processor-based systems.

You bring knowledge of HDL design, with a preference for experience in RISC processor architectures, DSP, AI (Neural Processing Unit), and multi-core systems.

You are familiar with design and verification languages such as Verilog and SystemVerilog, and have experience with RTL simulation tools, such as VCS.

Scripting or programming skills in languages such as assembler, C, Tcl, Csh, and Python is desirable.

Experience with embedded software related to DSP or AI reference models is a plus.

You have strong analytical and problem-solving abilities, as well as excellent written and verbal communication skills, including proficiency in English, detailed status reporting, and the ability to present results to program management teams.

What You’ll Be Doing:

• Develop and maintain microprocessor hardware IP including specification, implementation, verification, and FPGA validation, with an emphasis on validating system architecture and performance for DSP processor IP or Neural Processing Unit (NPU) IP.

• Optimize designs for performance, area, and power efficiency.

• Create and enhance tests for hardware IP verification and validation, improving functional coverage and performance through the application of state-of-the-art methodologies.

• Collaborate with global teams in tools, modeling, and simulation to deliver optimized solutions for our customers.

The Impact You Will Have:

• Contribute to the development of highly optimized hardware IP for the ARC family of configurable processors.

• Enable customers to create sophisticated and efficient embedded designs.

• Support the delivery of world-class microprocessors used in advanced applications.

• Help improve functional coverage and performance of processor IP through advanced verification methods.

• Collaborate globally to deliver customer-focused solutions.

• Drive continuous improvement in processor system verification.

What You’ll Need:

• Passion for embedded processors or processor-based systems.

• Knowledge of HDL design, preferably in RISC processor architectures, DSP, AI (NPU), and multi-core systems.

• Familiarity with Verilog and SystemVerilog.

• Experience with RTL simulation tools (e.g., VCS).

• Scripting or programming skills in assembler, C, Tcl, Csh, or Python.

• Experience with embedded software for DSP or AI reference models is a plus.

Who You Are:

• Strong analytical and problem-solving abilities.

• Excellent written and verbal communication skills.

• Proficient in English.

• Capable of detailed status reporting and presenting results to program management teams.

The Team You’ll Be A Part Of:

Join our dynamic team dedicated to developing highly optimized hardware IP for the ARC family of configurable processors, enabling customers to create sophisticated and efficient embedded designs.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Digital Verification Sr Engineer, you will be responsible for working in a collaborative environment to develop and validate complex digital mixed signals for high-speed interface IP.

Key responsibilities include: Planning tests, checklists, coverage, and assertion planning. Creating detailed verification environments from functional specifications. Applying advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification. Writing test cases, checkers, and coverage that implement the verification test plan. Debugging simulations, including those of real signals modeled using SystemVerilog for analog. Performing RTL, GLS, and co-simulations and ensuring coverage closure. Participating in technical reviews and contributing actively. Providing customer support with the bring-up of IP in customer simulation environments. Following and improving development processes to ensure high-quality output.

Requirements include: BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications. 2+ years of experience in design verification. Strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal). Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus. Proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.

Ideal candidate will be highly responsible and result-oriented, with excellent English communication skills, both verbal and written. A great team player, willing to support others. Self-motivated and highly enthusiastic about technology and solving problems.

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As a Sr Staff Application Engineer - VCS Simulation, you will be responsible for leading customer deployments of VCS simulation technology, working closely with field teams and R&D to ensure successful adoption and integration.

Responsibilities

• Lead customer deployments of VCS simulation technology, working closely with field teams and R&D to ensure successful adoption and integration.
• Diagnose and troubleshoot complex technical issues in verification flows, utilizing deep product knowledge and analytical skills.
• Collaborate with global domain experts to gather requirements and contribute to the development of a robust product roadmap.
• Drive competitive engagements by demonstrating Synopsys VCS advantages and supporting customers in benchmarking scenarios.
• Provide technical expertise in HDL/HVL methodologies, including UVM, SVA, and simulation debugging.
• Interface directly with customers, product validation, and R&D teams to propose solutions and suggest improvements in implementation and validation processes.
• Develop and optimize scripts (Perl, TCL, Shell, Make) to enhance productivity and workflow automation.

The Impact You Will Have

• Enable customers to accelerate their verification cycles and achieve first-pass silicon success through expert support and deployment of VCS simulation technology.
• Drive innovation in verification methodologies by integrating advanced features and AI-driven productivity tools.
• Enhance Synopsys' product offerings by providing actionable feedback from customer engagements and competitive benchmarking.
• Facilitate seamless collaboration across global teams, ensuring consistent delivery of high-quality solutions.
• Support the continuous improvement of VCS and related technologies through proactive problem-solving and technical leadership.
• Contribute to the growth of Synopsys' leadership in EDA by empowering customers to leverage the full capabilities of verification platforms.

What You’ll Need

• Bachelor’s degree in Electronics with 7+ years or Master’s degree in Electronics with 5+ years of experience.
• Proficiency in verification technologies, including simulation, UVM, SVA, and LRM.
• Strong expertise in HDL languages (Verilog, VHDL, SystemVerilog) and digital design fundamentals.
• Proven experience in debugging simulation mismatches and verification flows.
• Advanced scripting skills (Perl, TCL, Make, Shell) and working knowledge of UNIX environments.
• Exposure to Synopsys EDA tools such as SpyGlass, VC SpyGlass, Verdi is a plus.

Who You Are

• Excellent written and oral communication skills, comfortable interfacing with global teams and customers.
• Collaborative team player with a proactive and innovative mindset.
• Detail-oriented and organized, able to manage multiple tasks and priorities.
• Motivated self-starter with strong problem-solving abilities.
• Adaptable and open to travel, eager to learn and grow in a fast-paced environment.

The Team You’ll Be A Part Of

You will join a dynamic and diverse team of applications engineers dedicated to solving the most challenging problems in the verification domain. Our team works at the intersection of technology development, customer engagement, and product innovation, collaborating with experts across field, R&D, and product validation globally. We foster a culture of continuous learning, open communication, and mutual support, ensuring every member can make a meaningful impact and grow professionally.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking an experienced RTL design engineer with a strong background in electronics or telecommunications.

With over five years in ASIC or PHY IP development, you’re passionate about solving technical challenges, collaborating with cross-functional teams, and mentoring others.

Your communication skills and attention to detail ensure projects run smoothly from specification to silicon debug.

You thrive in fast-paced environments and are eager to contribute to groundbreaking technology.

Responsibilities

• Develop RTL specifications and architectures for High Bandwidth Interface PHY IP.

• Define synthesis constraints and resolve STA and gate-level simulation issues.

• Collaborate with verification, controller, and lab teams for design and debugging.

• Support RTL to GDS flow during logic implementation.

• Lead projects and train junior engineers.

• Work with customers to resolve technical RTL issues.

The Impact You Will Have

• Deliver robust RTL designs for advanced silicon solutions.

• Drive successful project completion and tape-outs.

• Enhance design quality and verification efficiency.

• Support customer success and strengthen Synopsys’ reputation.

• Mentor and grow engineering talent within the team.

• Contribute to digital flow improvements and innovation.

What You’ll Need

• BS/MS/PhD in Electronics Engineering or Telecommunications.

• 5+ years of RTL design experience for ASIC or PHY IP.

• Expertise in VCS, Verdi, Spyglass, and scripting (Perl, TCL, Python).

• Knowledge of clock domain crossing, APB, JTAG protocols.

• Strong English communication skills.

Who You Are

• Responsible, result-oriented, and self-motivated.

• Collaborative and proactive problem solver.

• Effective communicator and mentor.

The Team You’ll Be A Part Of

Join a collaborative engineering team delivering innovative PHY IP solutions.

Work alongside experts in Ho Chi Minh City, Da Nang, or Hanoi, and contribute to Synopsys’ global leadership in semiconductor technology.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits.

Your recruiter will provide more details about salary and benefits during the hiring process.

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This role involves defining, implementing, and tracking comprehensive verification test plans to ensure robust coverage and quality for SERDES IP.

Key responsibilities include building, enhancing, and maintaining top-level UVM-based System Verilog testbenches and AMS co-simulation environments, integrating RTL, behavioral models, and transistor-level netlists.

The ideal candidate will have a strong foundational understanding of analog circuits, expertise with AMS tools such as HSPICE, XA, Custom Sim, VCS, and proficiency with System Verilog/UVM.

As a member of the Synopsys IPG Co-Simulation (COSIM) team, you will collaborate closely with mixed-signal designers, modeling engineers, and system architects across global Synopsys teams to deliver best-in-class IP.

In this role, you will enable the successful verification and deployment of high-performance SERDES and mixed-signal IP in leading-edge SoCs worldwide.

Synopsys is a comprehensive range of health, wellness, and financial benefits to cater to your needs.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

We consider all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An experienced and highly skilled ASIC Digital Verification Engineer with a passion for ensuring the highest quality in digital design. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges and delivering innovative solutions. You are detail-oriented, with a strong analytical mindset, and can communicate effectively with various stakeholders. Your ability to mentor and lead junior engineers is a testament to your extensive experience in the field. You thrive in a collaborative environment and are committed to continuous learning and improvement.

What You'll Be Doing:

• Designing and implementing verification environments to ensure the correctness of Interface IP protocols.
• Creating and executing detailed test plans to verify complex ASIC designs.
• Developing and maintaining verification IP and testbenches using SystemVerilog and UVM.
• Collaborating with design and architecture teams to identify and fix bugs.
• Performing functional coverage analysis and driving coverage closure.
• Mentoring and guiding junior verification engineers in best practices and methodologies.

The Impact You Will Have:

• Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.
• Enhancing the robustness and efficiency of our verification processes and methodologies.
• Contributing to the successful launch of Interface IP products, impacting various industries.
• Driving innovation and excellence within the verification team.
• Improving the overall performance and functionality of Synopsys' IP offerings.
• Fostering a culture of continuous improvement and technical excellence.

What You'll Need:

• Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet.
• Proficiency in SystemVerilog and UVM methodologies.
• Strong understanding of digital design and verification concepts.
• Experience with simulation tools such as VCS, ModelSim, or similar.
• Excellent problem-solving skills and attention to detail.

Who You Are:

• Detail-oriented with a strong analytical mindset.
• Excellent communicator, able to convey complex technical concepts clearly.
• Collaborative team player who thrives in a dynamic environment.
• Proactive and self-motivated, with a commitment to continuous learning.
• Mentor and leader, capable of guiding and developing junior engineers.

The Team You'll Be A Part Of:

You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU deep learning. This new model - where deep neural networks are trained to recognize patterns from meaningful amounts of data - has shown to be deeply effective at solving the most sophisticated problems in everyday life.

As a Senior ASIC Verification Engineer at NVIDIA, you will verify the design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Responsibilities:

• In this position, you will be responsible for verification of high-speed coherent interconnect design, architecture and golden models.
• You will be responsible for micro-architecture using sophisticated verification methodologies.
• As a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This role will collaborate with architects, designers, emulation, and silicon verification teams to accomplish your tasks.

Requirements:

• Bachelors or Master’s Degree (or equivalent experience)
• 3+ years of relevant verification experience
• Experience in architecting test bench environments for unit level verification
• Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies
• Prior Design or Verification experience of Coherent high-speed interconnects
• Knowledge of industry standard interconnect protocols like PCIE, CXL, CHI will be useful
• Strong background developing TB's from scratch using SV and UVM methodology is desired
• C++ programming language experience, scripting ability and an expertise in System Verilog
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong debugging and analytical skills
• Experienced communication and interpersonal skills are required. A history of mentoring junior engineers and interns a huge plus.

NVIDIA is widely considered to be one of the technology world’s most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until March 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

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Product Manager – Private Markets Secondaries Data & Analytics

This role sits within Preqin, a part of BlackRock. Preqin plays a key role in how we are revolutionizing private markets data and technology for clients globally, complementing our existing Aladdin technology platform to deliver investment solutions for the whole portfolio.

About the team

Preqin’s Limited Partners Product Group is a cross-functional team within Aladdin Product, responsible for creating innovative data, analytics and workflow products for our clients investing in Private Markets. We are seeking a Product Manager to join the team and work directly with a multi-disciplinary team using the latest technologies to build out secondaries data and analytics products geared towards helping our clients make better investment decisions.

Job overview

Secondaries is a rapidly growing part of private markets, but still very opaque and ripe for innovation. This role will focus on building new data, analytics and workflow products for the secondaries ecosystem, and helping our clients better understand market activity, benchmark transactions, and identify and value the assets being traded.

Responsibilities

• Define the product vision and strategy for your area, working closely with senior stakeholders and your cross-functional team to identify how to deliver on our strategic goals.

• Lead continuous discovery with secondaries advisors, investors, and internal teams—understanding workflows upstream and downstream of private markets data usage.

• Translate complex, ambiguous problems into clear product requirements (PRDs, epics, user stories), prioritised roadmaps, and measurable outcomes.

• Build data-first product capabilities across analytics, benchmarking, and automated workflows.

• Identify and track the right metrics for your area and your customers and use those metrics to make our products better.

• Work closely and collaboratively with engineers and designers – you’ll get everyone aligned around a problem, work together on how to solve it, and then execute effectively.

• Build iteratively and share feedback with customers continuously as you build and evolve the product.

• Develop yourself and the people around you – share what you’ve learned, and work with colleagues to find ways to do things better.

You are a good fit if:

• You care about customers deeply – you’re obsessed with finding out what their problems are, and how we are going to solve them.

• You’re a strong executor, with a track record of getting product to customers quickly and iteratively.

• You’re evidence-based, using data, customer feedback and market insight to build industry-leading products.

• You’re comfortable in ambiguity and enjoy zero-to-one work—turning unclear inputs into crisp plans and shipped outcomes.

• You can partner effectively across engineering, design, data, commercial and senior stakeholders to drive alignment and delivery.

• You take ownership and responsibility for problems, and if you see something wrong, you make it better.

Nice to have:

• Familiarity with private markets (PE/VC/Real Assets) and/or secondaries.

• Experience with data partnerships, data ingestion, entity resolution/identifiers, or analytics/benchmarking products.

• Comfort working with data directly (e.g. Excel, SQL) and using analysis to guide prioritisation.

Our benefits

To help you stay energized, engaged and inspired, we offer a wide range of employee benefits including: retirement investment and tools designed to help you in building a sound financial future; access to education reimbursement; comprehensive resources to support your physical health and emotional well-being; family support programs; and Flexible Time Off (FTO) so you can relax, recharge and be there for the people you care about.

Our hybrid work model

BlackRock’s hybrid work model is designed to enable a culture of collaboration and apprenticeship that enriches the experience of our employees, while supporting flexibility for all. Employees are currently required to work at least 4 days in the office per week, with the flexibility to work from home 1 day a week. Some business groups may require more time in the office due to their roles and responsibilities. We remain focused on increasing the impactful moments that arise when we work together in person – aligned with our commitment to performance and innovation. As a new joiner, you can count on this hybrid model to accelerate your learning and onboarding experience here at BlackRock.

About BlackRock

At BlackRock, we are all connected by one mission: to help more and more people experience financial well-being. Our clients, and the people they serve, are saving for retirement, paying for their children’s educations, buying homes and starting businesses. Their investments also help to strengthen the global economy: support businesses small and large; finance infrastructure projects that connect and power cities; and facilitate innovations that drive progress.

This mission would not be possible without our smartest investment – the one we make in our employees. It’s why we’re dedicated to creating an environment where our colleagues feel welcomed, valued and supported with networks, benefits and development opportunities to help them thrive.

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About this role

You will play a leading role in underwriting and executing venture debt transactions, working closely with senior team members while taking ownership of key analytical and structuring workstreams.

The Opportunity

As an Associate, you will be responsible for leading analytical workstreams across the full transaction lifecycle, conducting independent credit analysis and due diligence, designing and calibrating appropriate financing structures, building and reviewing complex financial models, preparing and presenting investment recommendations, supporting structuring and negotiation of transaction terms and long form documentation, managing transaction processes across internal and external stakeholders, and monitoring portfolio companies, plus managing relationships with management teams and the wider ecosystem.

Key Responsibilities

• Lead analytical workstreams across the full transaction lifecycle
• Conduct independent credit analysis and due diligence
• Design and calibrate appropriate financing structures
• Build and review complex financial models
• Prepare and present investment recommendations
• Support structuring and negotiation of transaction terms and long form documentation
• Manage transaction processes across internal and external stakeholders
• Monitor portfolio companies, plus manage relationships with management teams and the wider ecosystem

Candidate Profile

• Typically 3–6 years’ experience in venture debt, VC/growth equity, private credit, investment banking, consulting or related roles
• Motivated team player. Flexible and open-minded in approach
• Demonstrated experience underwriting and executing transactions
• Strong credit judgement and structuring capability
• Experience managing transaction processes and working with legal documentation
• Commercial mindset with strong stakeholder management skills
• Clear communicator with leadership potential
• High integrity and alignment with BlackRock’s fiduciary culture

Our benefits

To help you stay energized, engaged and inspired, we offer a wide range of employee benefits including: retirement investment and tools designed to help you in building a sound financial future; access to education reimbursement; comprehensive resources to support your physical health and emotional well-being; family support programs; and Flexible Time Off (FTO) so you can relax, recharge and be there for the people you care about.

Our hybrid work model

BlackRock’s hybrid work model is designed to enable a culture of collaboration and apprenticeship that enriches the experience of our employees, while supporting flexibility for all. Employees are currently required to work at least 4 days in the office per week, with the flexibility to work from home 1 day a week. Some business groups may require more time in the office due to their roles and responsibilities. We remain focused on increasing the impactful moments that arise when we work together in person – aligned with our commitment to performance and innovation. As a new joiner, you can count on this hybrid model to accelerate your learning and onboarding experience here at BlackRock.

About BlackRock

At BlackRock, we are all connected by one mission: to help more and more people experience financial well-being. Our clients, and the people they serve, are saving for retirement, paying for their children’s educations, buying homes and starting businesses. Their investments also help to strengthen the global economy: support businesses small and large; finance infrastructure projects that connect and power cities; and facilitate innovations that drive progress.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15231

Remote Eligible

No

Date Posted

02/15/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

• An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.

• You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.

• Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.

• You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.

• You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.

• You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.

What You’ll Be Doing:

• Leading NRZ/PAM4 Serdes analog design transceiver solutions.

• Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.

• Collaborating with silicon test and debug experts for Sim2Sil correlation.

• Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.

The Impact You Will Have:

• Driving innovation in mixed-signal advanced analog serdes design.

• Enhancing the performance and efficiency of high-speed physical interfaces.

• Contributing to the development of cutting-edge technology in High Speed PHY IP.

• Improving quality and robustness of design through collaboration and Sim2Sil correlation.

What You’ll Need:

• BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.

• Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.

• Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .

• Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters

Who You Are:

• Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.

• Experience with PLL designs and high-speed digital circuit design.

• Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.

• Familiarity with digitally assisted analog circuit techniques.

• Capable to drive technical decision and tradeoff with customer focus

The Team You’ll Be A Part Of:

Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.

You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

Get an idea of what your daily routine around the office can be like

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You are a driven and curious engineering professional, passionate about tackling complex technical challenges and eager to make a real difference in the semiconductor industry. You thrive in collaborative, diverse environments and are energized by working alongside global experts to solve high-value problems. You are committed to continuous learning and growth, staying ahead of the curve in verification methodologies, HDL/HVL technologies, and dynamic simulation.

Collaborate with customers to understand their verification challenges and provide tailored technical solutions using Synopsys Verification Platform. Support customer projects throughout their tapeout schedules, ensuring timely resolution of technical issues and successful project outcomes. Deliver technical presentations, workshops, and training sessions on Synopsys EDA tools, methodologies, and best practices.

Enable customers to optimize and verify chips for power, cost, and performance—accelerating their time-to-market. Build strong, collaborative relationships with customers, fostering trust and loyalty through expert support and innovation. Drive adoption of Synopsys Verification Platform, contributing to company growth and industry leadership.

Master’s degree in Electronics, or Bachelor’s degree in Electronics with 1-2 years of relevant experience. Solid understanding of digital design, HDLs (Verilog, VHDL), and System Verilog. Experience with dynamic simulation verification, including methodologies, debug, low power, and coverage. Familiarity with Synopsys EDA tools (VCS, Verdi) is a plus. Proficiency in UNIX environments and scripting languages such as Tcl, with the ability to automate and optimize workflows.

Collaborative team player who values diversity and inclusion. Detail-oriented, organized, and able to manage multiple priorities effectively. Innovative thinker with a proactive, results-driven mindset. Motivated, self-organized, and open to travel as required. Strong interpersonal and social communication skills, fostering positive relationships with colleagues and clients. Adaptable and eager to learn, embracing new technologies and methodologies.

You’ll be part of the Customer Success Group, a collaborative and diverse team dedicated to building strong partnerships with market leaders and innovators. The team’s core mission is to enable customers to solve high-value problems through advanced verification solutions and continuous technical support. Working closely with domain experts across global locations, you’ll develop deep expertise in Synopsys Verification Platform and play a key role in helping customers achieve their design goals efficiently and effectively.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your proactive approach and problem-solving abilities make you a trusted advisor for both internal stakeholders and external customers. You are detail-oriented, yet able to see the big picture, ensuring that every design meets rigorous standards for quality, performance, and scalability. You enjoy guiding teams through challenging technical obstacles and are always eager to explore new technologies and methodologies that can enhance product development. Your communication skills are top-notch, enabling you to clearly articulate complex concepts to diverse audiences. You value inclusion and respect, fostering a team culture where every voice is heard and every idea is considered.

Role Details

• Oversee junior engineers and lead the design, implementation, verification, and physical synthesis of NVM controllers for OTP and MTP products at advanced technology nodes.
• Provide digital guidance for new product developments, ensuring robust architecture and innovative solutions.
• Manage the maintenance and enhancement of digital control blocks, chip test systems, circuit models, and design-for-test circuits.
• Participate in all phases of the ASIC design cycle, including architecture definition, modeling, RTL coding, verification, synthesis, and place & routing.
• Deliver technical support to internal teams, application engineers, and customers during product integration phases.
• Collaborate with cross-functional teams to optimize design flows and ensure seamless integration of digital components.
• Drive continuous improvement initiatives and promote best practices in digital design and verification methodologies.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.

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At Ford Credit, we take immense pride in being a subsidiary of Ford Motor Company, a global leader renowned for its strong sense of family and a firm commitment to making the world a better place. We create a culture of diversity, equity, and inclusion as we believe it is fundamental to achieving our business objectives and essential to treating every employee with the utmost dignity and respect.

For over 65 years, we have been instrumental in placing people in the driver's seat of exceptional Ford and Lincoln vehicles, contributing to the triumph of our 120-year-old Ford Motor Company. We've offered financing, tailored services, and professional expertise to 5,000 dealerships and more than 4 million customers across 100 countries.

As we envision the future of mobility, we present a broad spectrum of opportunities for you to enhance your career trajectory while shaping the transport of tomorrow. Joining us means embracing the liberty to pursue and define your aspirations, anchored in our conviction that the freedom to move is a catalyst for human advancement.

Responsibilities

• Collaborate with product managers, designers, and other stakeholders to understand the product vision, and requirements.

• Provide technical insights, feasibility assessments, translate the requirements into technical specifications considering factors like performance, scalability, and maintainability.

• Designing system architecture and implementing scalable APIs and Microservices

• Demonstrates exceptional technical ability in actually writing software, hands-on keyboard, through proof of concepts and spikes with teams.

• Partner across functions, building relationships that allow you to influence the strategy, plans and work to improve customer value through service, experience, availability, quality, and cost.

• Be an active participant in reviewing, evaluating, and providing feedback on product designs and architectures with an engineering focus.

• Guide and influence design decisions ensuring the product can be built effectively. Review and approve technical designs, architecture diagrams, and code to ensure alignment with specifications and best practices.

• Create prototypes, proof of concepts, or minimum viable products to validate technical concepts and gather feedback. Facilitate communication between teams, addressing technical concerns and ensuring a shared understanding of requirements.

• Develop and socialize new engineering principles and practices fit for purpose for the organization.

• Evaluating and recommending new and emerging products and technologies.

• Partnering with the engineering teams, design, research and end-users to deliver updates.

• Facilitate in highly collaborative Full Stack eXtreme Programming (XP) practices including but not limited to Pair Programming, Test Driven Development (TDD), DevOps, Continuous Integration and Continuous Deployment (CI/CD), Security (SAST/DAST), Monitoring/logging/tracing/ tools (SPLUNK, Dynatrace, etc…), and Agile practices including but not limited to Stand-ups, backlog grooming, sprint demos and journey mapping.

• Dependency and stakeholder management

• Documentation: Create and maintain technical documentation, including specifications, architecture diagrams, and user manuals.

• Continuous Improvement: Stay updated on industry trends, emerging technologies, and best practices related to product development and engineering. Identify opportunities for process improvements, automation, and optimization within the product development lifecycle.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, Information Technology or related field.

• 7+ years of advanced professional experience on Software design/development and execution.

• 7+ years of work experience in Java 8 or above

• 5+ years of work experience in Spring Platform (Spring MVC, Spring Boot, Spring JDBC, Spring Cloud)

• 3+ years of work experience in Microservice architecture and SOAP or REST APIs

• 3+ years of Cloud Native Development experience on GCP Platform CloudRun, Cloud Functions, Containers via Podman.

• Messaging/Streaming - GCP Pub/Sub, Kafka, GCP EventArc.

• Persistence - Buckets, PostgreSQL Bigtable

• Experience in Agile project involvement, Software Craftsmanship

• Experience in Front end client development frameworks (React/Angular)

• Experience in Code quality tools (42Crunch, SonarQube, CheckMarx, etc…)

• CI/CD – Tekton or relative exposures on GIT hub, Jenkins, Maven, Gradle, etc

• Exposure and knowledge to Asset Finance tools.

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At Synopsys, our Hardware Engineers are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15995

Remote Eligible

No

Date Posted

03/05/2026

Alternate Job Titles:

• Staff ASIC Digital Design Engineer

• Staff DFT Engineer

• Staff SoC Testability Engineer

We Are:

At Synopsys, we drive innovations that shape the way we live and connect. From smart cars to AI, our technology leads chip design and verification worldwide. Join us to transform the future through continuous innovation.

You Are:

You are a proactive engineer with 5+ years of DFT experience, strong communication skills, and a drive for technical excellence. You enjoy teamwork, learning, and solving complex challenges in digital design.

What You’ll Be Doing:

• Define and implement DFT architecture for IP designs

• Perform SCAN insertion and ATPG simulation

• Analyze and improve test coverage

• Develop STA DFT timing constraints

• Prepare DFT integration guidelines for SoC

• Conduct quality checks and FMEDA/DFMEA analysis

The Impact You Will Have:

• Enhance product reliability and quality

• Support functional safety standards (ISO26262, FUSA)

• Streamline SoC integration

• Reduce debug cycles and time-to-market

• Mentor peers

• Drive innovation in test methodology

What You’ll Need:

• BS/MS/PhD in Electronics or related field

• 5+ years DFT design experience

• Expertise in Scan insertion, ATPG, JTAG

• Experience with Synopsys tools (Design Compiler, VCS, TetraMAX)

• Scripting (Perl, TCL, Python) is a plus

Who You Are:

• Responsible and collaborative

• Excellent English communication

• Team player and problem solver

The Team You’ll Be A Part Of:

Join a skilled, diverse engineering team in Da Nang focused on advancing DFT methodologies and supporting global innovation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details during the hiring process.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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Design Verification Engineer

Location

San Francisco

Employment Type

Full time

Location Type

Hybrid

Department

Scaling

Compensation

• $226K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

More details about our benefits are available to candidates during the hiring process.

This role is at-will and OpenAI reserves the right to modify base pay and other compensation components at any time based on individual performance, team or company results, or market conditions.

About the Team:

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.

About the Role OpenAI is developing custom silicon to power the next generation of frontier AI models. We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems—ranging from individual IP blocks to subsystems and full SoC—working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale.

In this role you will:

• Own the verification of one or more of: custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality.

• Define verification plans based on architecture and microarchitecture specs.

• Develop constrained-random, directed, and system-level testbenches using SystemVerilog/UVM or equivalent methodologies.

• Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness.

• Drive bug triage, root cause analysis, and work closely with design teams on resolution.

• Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments.

You might thrive in this role if you have:

• BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification.

• Proven success verifying complex IP or SoC designs in industry-standard flows

• Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi).

• Strong knowledge of computer architecture concepts, memory and cache systems, coherency, interconnects, and/or ML compute primitives.

• Familiarity with performance modeling, formal verification, or emulation is a plus.

• Experience working in fast-paced, cross-disciplinary teams with a passion for building reliable hardware.

_To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations._

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

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R&D - Toronto, Ontario (Hybrid)

What we’re doing

We’re building the AI-powered coaching platform that transforms how gamers learn, compete, and win. Backed by a16z with $12M raised, we’re live in 5 titles with 100K+ users and rapidly expanding into new games, hardware partnerships, and SDK integrations.

We’re hiring a Business Operations Associate to join our core team and work directly with the founders to build the backbone of our business. This is a unique opportunity to help scale the world’s first AI coaching platform for gamers at the intersection of gaming and AI.

What You’ll Do

Strategy & Analysis

• Partner with the Head of Product & CEO on core strategic initiatives (B2B + B2C).
• Lead market analysis, competitive deep dives, and opportunity sizing to identify trends, customer needs, and emerging opportunities.
• Build business cases and quantitative models that inform go/no-go decisions on new games, partnerships, and investment bets.
• Help chase down ambiguous, zero-to-one problems , from hypothesis to framework to action plan.

Ops & Execution

• Build the operating backbone: architect workflows, OKRs, and business review processes that scale with the company.
• Drive cross-functional initiatives across Product, Partnerships, and Marketing to ensure alignment and delivery.
• Create leverage for leadership by taking point on pitch decks, proposals, and high-stakes projects that require polish and speed.

Growth Enablement

• Support partnerships and BD with market research, TAMs, and strategic storytelling.
• Help track product performance and translate insights into prioritized business actions.
• Translate product and market learnings into clear narratives for investors, partners, and internal stakeholders.

Skills You’ll Bring

• 2+ years experience in a fast-paced, analytical role (e.g., chief of staff, bizops, VC/PE, banking, consulting, or growth-focused roles at a high-growth tech company).
• Strong analytical skills with the ability to synthesize data into strategic insights
• First-principles thinker who can structure ambiguous problems into clear frameworks.
• Outstanding communication  can craft executive-level decks and align stakeholders.
• Relentlessly resourceful — you move fast, solve problems without a playbook, and aren’t afraid to get your hands dirty.
• Highly organized with strong attention to detail and follow-through.

You Will Not Enjoy This Role If…

• You prefer a narrow lane or a fixed playbook.
• You avoid rolling up your sleeves and tackling operational details.
• You’re uncomfortable balancing strategy with execution.
• You don’t enjoy gaming, AI, or exploring how new technologies reshape industries.

Link to This Job

Location

Toronto, Ontario (Hybrid)

Department

R&D

Employment Type

Full-Time

Minimum Experience

Entry-level

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What you'll do

• Designing and verifying advanced digital circuits for PAM-based SerDes PHY IP, ensuring robust and high-performance mixed-signal solutions.
• Developing RTL code, modeling analog blocks, and crafting complex system-level testbenches in Verilog to validate functionality and performance.

What you need

• Bachelor's or Master's degree in Electrical Engineering (BSEE or MSEE) with at least 10 years of industry experience in digital design and verification.
• Must be familiar with Verilog and VCS. Good knowledge of back-end synthesis tools DC/PT is required
• Must have knowledge of digital design methodologies, ATE production testing, DFT insertion, Synthesis constraints and flows

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What you'll do

• Define, implement, and track comprehensive verification test plans to ensure robust coverage and quality for SERDES IP.
• Build, enhance, and maintain top-level UVM-based System Verilog testbenches and AMS co-simulation environments, integrating RTL, behavioral models, and transistor-level netlists.

What you need

• Bachelor's or master's degree in electrical engineering or a related field.
• Strong foundational understanding of analog circuits (op-amps, bandgaps, PLLs, ADCs, TX/RX components, etc.).
• Experience with AMS tools such as HSPICE, XA, Custom Sim, VCS, and scripting languages like Python, Perl, and UNIX shell.

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What you'll do

Responsible for the development and implementation of System Design Solutions using Synopsys EDA tools and IP to solve customer problems as part of a service project team. Contributes to both turnkey projects and as a trusted advisor to customer design. Develop innovative solutions to problems with little guidance and implement them independently. Set task-level goals and consistently meet schedules. Works with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tool and IP solutions.

• Synthesis
• LEC
• LDRC
• GCA
• STA
• PTPX

What you need

• 2 - 4 years of related experience.
• Good of ASIC/SOC design, synthesis, timing closure.
• Familiar with Synthesis, LEC, STA flow.
• It’s a plus if you have experience in low-power, high-performance design, advanced nodes under 12nm.
• Knowledge of RTL, DFT, LDRC, GCA, VCLP, PTPX, IREM is advantageous.
• Familiar with scripting languages, such as TCL, Perl, Python.
• Good English/communication skills and willingness to work with customer.
• BS or MS with an EE or related major

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What you'll do

Responsible for the development and implementation of System Design Solutions using Synopsys EDA tools and IP to solve customer problems as part of a service project team. Contributes to both turnkey projects and as a trusted advisor to customer design. Develop innovative solutions to problems with little guidance and implement them independently. Set task-level goals and consistently meet schedules. Works with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tool and IP solutions.

• Synthesis
• LEC
• LDRC
• GCA
• STA
• PTPX

What you need

• 6-12 years of related experience.
• Good of ASIC/SOC design, synthesis, timing closure.
• Familiar with Synthesis, LEC, STA flow.
• It’s a plus if you have experience in low-power, high-performance design, advanced nodes under 12nm.
• Knowledge of RTL, DFT, LDRC, GCA, VCLP, PTPX, IREM is advantageous.
• Familiar with scripting languages, such as TCL, Perl, Python.
• Good English/communication skills and willingness to work with customer.
• BS or MS with an EE or related major

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What you'll do

Develop and enhance PPA (Power, Performance, Area) methodologies for complex interface IPs at advanced technology nodes.

• Implement high-performance CPUs, GPUs, and interface IPs using industry-leading Synopsys tools such as RTLA, Fusion Compiler, DSO, and Fusion AI.

• Drive flow development and optimization to improve design quality and predictability.

• Collaborate with global experts to solve critical design challenges, ensuring the best possible QOR (Quality of Results).

• Contribute to the adoption and integration of advanced technologies and tool features in design implementation.

• Automate tasks and processes using scripting languages (TCL, Perl, Python) to streamline workflows and boost efficiency.

• Analyze and resolve issues related to synthesis, timing closure, power optimization, and constraints management.

What you need

• Minimum 7 years of experience in physical design, with a focus on high-performance and low-power methodologies.

• Expertise in synthesis, timing closure, power optimization, constraints management, LEC, and STA flows.

• Hands-on experience with advanced process nodes (under 5nm) and complex IP implementation.

• Proficiency in scripting languages such as TCL, Perl, and Python for automation and process enhancement.

• Strong understanding of RTL, DFT, LDRC, TCM, VCLP, and PTPX; experience with interface IP controllers (UCie, PCIe, USB) is a plus.

Why this matters

Shape the future of high-performance silicon by advancing methodologies that deliver superior PPA and TAT outcomes.

Enable Synopsys customers to achieve breakthrough performance and efficiency in their semiconductor products.

Enhance the predictability and simplicity of implementation processes for complex interface IPs.

Accelerate the adoption of next-generation design technologies and tools across the industry.

Drive innovation in low-power, high-performance design, influencing the direction of emerging semiconductor solutions.

Empower Synopsys to remain at the forefront of chip design and IP integration through continuous improvement.

What you’ll need

• Minimum 7years of experience in physical design, with a focus on high-performance and low-power methodologies.

• Expertise in synthesis, timing closure, power optimization, constraints management, LEC, and STA flows.

• Hands-on experience with advanced process nodes (under 5nm) and complex IP implementation.

• Proficiency in scripting languages such as TCL, Perl, and Python for automation and process enhancement.

• Strong understanding of RTL, DFT, LDRC, TCM, VCLP, and PTPX; experience with interface IP controllers (UCie, PCIe, USB) is a plus.

Why you’ll love this role

• Collaborate with a talented team of engineers and experts to drive innovation and excellence in chip design and IP integration.

• Work on cutting-edge technologies and tools, shaping the future of the semiconductor industry.

• Enjoy a dynamic and supportive work environment that fosters growth, learning, and collaboration.

• Participate in professional development opportunities to enhance your skills and expertise.

• Contribute to the development of best-in-class methodologies and tools that drive industry-leading results.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

• Comprehensive medical and healthcare plans that work for you and your family.

• Time Away

• In addition to company holidays, we have ETO and FTO Programs.

• Family Support

• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ESPP

• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• Retirement Plans

• Save for your future with our retirement plans that vary by region and country.

• Compensation

• Competitive salaries.

• Awards

• We're proud to receive several recognitions.

• Explore the Possibilities with Synopsys

• Search Synopsys Careers

• Join our Talent Community

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What you'll do

• As part of the product team, you will be a key contributor, developing the solution for high-volume, high transaction applications specifically targeted to support the game development teams across the entire global enterprise.
• You will take part in any negotiations or discussions regarding the necessary requirements and provide feedback to all parties involved.
• You will participate in code reviews and provide constructive feedback on design and implementation to peers.
• Report progress and status through regular email or face-to-face communication with appropriate leads/managers.

What you need

• 5+ years of experience developing enterprise level software solutions.
• 5+ years of broad experience working with development technologies including Microsoft .NET (C#), ASP.NET/MVC, WCF/Web API/REST, JavaScript frameworks, HTML+CSS3+Javascript.
• 5+ years of experience in database development using Microsoft SQL Server or similar RDBMs and related programming data access technologies (ADO.NET, ORMs, OData)
• 5+ years of experience applying design patterns, methodologies and recognized practices like unit testing, dependency injection, test-driven development, continuous integration, and delivery.
• 3+ years of experience developing cloud-based applications using PaaS (Platform as a Service) and IaaS (Infrastructure as a Service) offerings from leading vendors such Amazon’s AWS and Microsoft Azure

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What you'll do

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

• Designing, implementing and optimizing verification environments to ensure the correctness of Interface IP protocols.
• Creating, executing and tracking against detailed test plans to verify complex ASIC designs.

What you need

• Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).
• Proficiency in System Verilog, SVA and UVM methodologies.
• Strong understanding of digital design and verification concepts.
• Familiarity with wider digital ASIC and IP development flow, including RTL design through synthesis.
• Experience with simulation tools such as VCS, Model Sim, or similar.
• Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
• Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.

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What you'll do

• Working in a Digital and Verification Development team during the development and validation of complex digital mixed signals for high-speed interface IP.
• Planning tests, checklists, coverage, and assertion planning.
• Creating detailed verification environments from functional specifications.
• Applying advanced verification techniques like constrained random generation, functional coverage, assertions, and formal verification.
• Writing test cases, checkers, and coverage that implement the verification test plan.
• Debugging simulations, including those of real signals modeled using SystemVerilog for analog.
• Performing RTL, GLS, and co-simulations and ensuring coverage closure.
• Participating in technical reviews and contributing actively.
• Providing customer support with the bring-up of IP in customer simulation environments.
• Following and improving development processes to ensure high-quality output.

What you need

• BS/MS/PhD in Electronics Engineering, Electromechanics, Telecommunications.
• 8+ years of experience in design verification.
• Strong skills with VCS/Verdi simulation tools and formal verification tools (vc_formal).
• Knowledge of UPF, UVM (Universal Verification Methodology), and SVA (SystemVerilog Assertion) is a plus.
• Proficiency in debugging and demonstrated experience in Perl/TCL/Python scripting is a plus.

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