Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nYou are a dedicated and meticulous Layout Design Engineer with a passion for semiconductor technology. Your expertise lies in the intricate world of IC layout, and you thrive in environments that demand precision, creativity, and innovation.
\nDesigning and developing standard cell layouts, ranging from simple (INV, ND, NR) to complex cells (Level Shifters, Flip Flops, Multi-bit combinational, Multi-bit Flip Flop cells) within the Logic Libraries IP team.
\nDeveloping cells across planar, CMOS, FinFet, GAA, uni-directional and multi-directional routing technologies, adapting to both native and cutting-edge platforms.
\nApplying comprehensive sign-off checks (DRC/LVS/ERC/ANT/DFM) to optimize manufacturability, performance, and yield across multiple foundries.
\nCollaborating with global teams, circuit design, CAD, and PD teams to resolve methodology issues and implement optimized layout designs.
\nConducting design reviews and offering constructive feedback to enhance quality and performance.
\nUtilizing Unix/Shell/Python/TCL/ICV scripting to automate design workflows, QA checks, checklist enforcement, and quality metrics generation.
\nAccelerating the creation and optimization of high-performance logic library IP for next-generation silicon solutions.
\nEnsuring robust manufacturability and yield, contributing to the reliability and success of Synopsys' IP products.
\nEnhancing productivity and efficiency through workflow automation and quality assurance initiatives.
\nDriving innovation by implementing advanced layout techniques for emerging technologies like FinFet and GAA.
\nFostering collaboration across global teams, leading to improved methodologies and best practices.
\nMaintaining the highest standards of quality, compliance, and performance in every design delivered.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_d0d01c2f-b91","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/layout-design-sr-engineer/44408/93979726464","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["BTech/MTech in Electrical Engineering, Electronics, or related field","2+ years of relevant experience in IC layout design, preferably in standard cell libraries","Proficiency with Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, and ICV/Calibre (DRC/LVS/DFM)","Hands-on experience with TSMC, Samsung, UMC, and GlobalFoundries PDKs","Strong scripting skills in Python, Tcl, Perl, SKILL, ICV, and shell scripting"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:00.975Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"BTech/MTech in Electrical Engineering, Electronics, or related field, 2+ years of relevant experience in IC layout design, preferably in standard cell libraries, Proficiency with Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, and ICV/Calibre (DRC/LVS/DFM), Hands-on experience with TSMC, Samsung, UMC, and GlobalFoundries PDKs, Strong scripting skills in Python, Tcl, Perl, SKILL, ICV, and shell scripting"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_aa155194-bee"},"title":"Advanced Packaging Design, Sr Staff Engineer","description":"Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.
\nThey work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nThese engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nJob Description
\nAt Synopsys, we drive the innovations that shape the way we live and connect.
\nOur technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.
\nWe lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nJoin us to transform the future through continuous technological innovation.
\nResponsibilities
\nRequirements
\nWhat You’ll Need
\nThe Team You’ll Be A Part Of
\nJoin a global, highly skilled, and supportive team dedicated to advancing the forefront of package design and integration.
\nOur team works closely with R&D, product management, and customer engineering groups to foster innovation, technical excellence, and open communication.
\nTogether, we tackle some of the most complex challenges in the semiconductor industry, supporting each other’s growth and celebrating our collective achievements.
\nRewards and Benefits
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
\nOur total rewards include both monetary and non-monetary offerings.
\nYour recruiter will provide more details about the salary range and benefits during the hiring process.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_aa155194-bee","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/advanced-packaging-design-sr-staff-engineer-13846/44408/89639743968","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$157,000-$235,000","x-skills-required":["advanced circuit and transmission line theory","multi-physics analysis","EDA tools","Windows and Linux operating systems","TSMC, Intel, Samsung, or OSAT advanced package technologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:12:28.250Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"advanced circuit and transmission line theory, multi-physics analysis, EDA tools, Windows and Linux operating systems, TSMC, Intel, Samsung, or OSAT advanced package technologies","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":157000,"maxValue":235000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8fb79b22-cd0"},"title":"Layout Design, Staff Engineer","description":"Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nAs a Layout Design Engineer, you will be designing and developing standard cell layouts, ranging from simple to complex cells, within the Logic Libraries IP team. You will also be applying comprehensive sign-off checks to optimize manufacturability, performance, and yield across multiple foundries.
\nKey responsibilities include:
\nYou will join a dynamic, innovative, high-performing, globally distributed Logic Library layout design team focused on creating world-class IP solutions. The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organization's goals.
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_8fb79b22-cd0","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/layout-design-staff-engineer/44408/93979726448","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["IC layout design","standard cell libraries","Synopsys Custom Compiler","Virtuoso","Innovus/ICC2","ICV/Calibre","TSMC","Samsung","UMC","GlobalFoundries PDKs","Python","Tcl","Perl","SKILL","ICV","shell scripting"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:11:54.856Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"IC layout design, standard cell libraries, Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, ICV/Calibre, TSMC, Samsung, UMC, GlobalFoundries PDKs, Python, Tcl, Perl, SKILL, ICV, shell scripting"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_d4e4fda2-379"},"title":"Layout Design, Staff Engineer","description":"As a Layout Design, Staff Engineer at Synopsys, you will design and develop standard cell layouts, ranging from simple to complex cells, within the Logic Libraries IP team. You will work on developing cells across planar, CMOS, FinFet, GAA, uni-directional and multi-directional routing technologies, adapting to both native and cutting-edge platforms.
\nYour responsibilities will include applying comprehensive sign-off checks (DRC/LVS/ERC/ANT/DFM) to optimize manufacturability, performance, and yield across multiple foundries. You will collaborate with global teams, circuit design, CAD, and PD teams to resolve methodology issues and implement optimized layout designs.
\nYou will conduct design reviews and offer constructive feedback to enhance quality and performance. You will utilize Unix/Shell/Python/TCL/ICV scripting to automate design workflows, QA checks, checklist enforcement, and quality metrics generation.
\nThe impact you will have includes accelerating the creation and optimization of high-performance logic library IP for next-generation silicon solutions, ensuring robust manufacturability and yield, contributing to the reliability and success of Synopsys' IP products, enhancing productivity and efficiency through workflow automation and quality assurance initiatives, driving innovation by implementing advanced layout techniques for emerging technologies like FinFet and GAA, fostering collaboration across global teams, leading to improved methodologies and best practices, and maintaining the highest standards of quality, compliance, and performance in every design delivered.
\nTo succeed in this role, you will need a BTech/MTech in Electrical Engineering, Electronics, or related field, with 5+ years of relevant experience in IC layout design, preferably in standard cell libraries. You will require proficiency with Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, and ICV/Calibre (DRC/LVS/DFM), hands-on experience with TSMC, Samsung, UMC, and GlobalFoundries PDKs, strong scripting skills in Python, Tcl, Perl, SKILL, ICV, and shell scripting, solid understanding of sign-off flow, waiver handling, and quality tracking, excellent written and spoken English for technical communication, deep knowledge of CMOS, DPT, EM/IR, ESD/latch-up, noise, and digital layout fundamentals, and ability to work independently and collaborate effectively across teams.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_d4e4fda2-379","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/layout-design-staff-engineer/44408/93979726480","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Standard Cell Layout Design","Synopsys Custom Compiler","Virtuoso","Innovus/ICC2","ICV/Calibre","TSMC","Samsung","UMC","GlobalFoundries PDKs","Python","Tcl","Perl","SKILL","ICV","Shell Scripting","CMOS","DPT","EM/IR","ESD/latch-up","Noise","Digital Layout Fundamentals"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:11:39.515Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Standard Cell Layout Design, Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, ICV/Calibre, TSMC, Samsung, UMC, GlobalFoundries PDKs, Python, Tcl, Perl, SKILL, ICV, Shell Scripting, CMOS, DPT, EM/IR, ESD/latch-up, Noise, Digital Layout Fundamentals"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7c3da59f-71d"},"title":"Product Sales Manager, Staff","description":"At Ansys now part of Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nThe main expected role is Product Sales for legacy Ansys Simulation & Analysis Solution (not EDA). The Product Sales Manager is responsible for directing and supporting collaborative sales efforts to grow one or more assigned Solutions (N&ET products).
\nKey duties and responsibilities include:
\nMinimum education/certification requirements and experience include:
\nPreferred qualifications and skills include:
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_7c3da59f-71d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Ansys now part of Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/taipei/product-sales-manager-staff/44408/92616533168","x-work-arrangement":null,"x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Software sales experience for the semiconductor industry","Fully understanding and familiar with sales process","Ability of coordination for sales lead generation with proactive sales motions","Functional safety for semiconductor, automotive, and A&D","Digital engineering","Model-based system engineering","Embedded software design and software validation","Process integration knowledge","High-level engagement & value proposition sales play","Sales fundamentals regarding demand generation, account plan, opportunity management, and forecasting SFDC","Problem-solving; ability to determine appropriate solutions for customers"],"x-skills-preferred":["Software sales experience for the semiconductor industry, especially TSMC, Delta, and Key Accounts with Enterprise Account sales","Fully understanding and familiar with sales process (MEDDIC, SCOPE, etc)","Well-experience for below applications: Functional safety for semiconductor, automotive, and A&D, Digital engineering, Model-based system engineering (SysML 2.0), Embedded software design and software validation (MIL, SIL, HIL), Process integration knowledge","Accomplished skill for high-level engagement & value proposition sales play","Skillful with sales fundamentals regarding demand generation, account plan, opportunity management, and forecasting SFDC","Aptitude for problem-solving; ability to determine appropriate solutions for customers"],"datePosted":"2026-04-24T14:11:14.762Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Taipei"}},"employmentType":"FULL_TIME","occupationalCategory":"Sales","industry":"Technology","skills":"Software sales experience for the semiconductor industry, Fully understanding and familiar with sales process, Ability of coordination for sales lead generation with proactive sales motions, Functional safety for semiconductor, automotive, and A&D, Digital engineering, Model-based system engineering, Embedded software design and software validation, Process integration knowledge, High-level engagement & value proposition sales play, Sales fundamentals regarding demand generation, account plan, opportunity management, and forecasting SFDC, Problem-solving; ability to determine appropriate solutions for customers, Software sales experience for the semiconductor industry, especially TSMC, Delta, and Key Accounts with Enterprise Account sales, Fully understanding and familiar with sales process (MEDDIC, SCOPE, etc), Well-experience for below applications: Functional safety for semiconductor, automotive, and A&D, Digital engineering, Model-based system engineering (SysML 2.0), Embedded software design and software validation (MIL, SIL, HIL), Process integration knowledge, Accomplished skill for high-level engagement & value proposition sales play, Skillful with sales fundamentals regarding demand generation, account plan, opportunity management, and forecasting SFDC, Aptitude for problem-solving; ability to determine appropriate solutions for customers"}]}