{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/timing-and-physical-sign-off"},"x-facet":{"type":"skill","slug":"timing-and-physical-sign-off","display":"Timing and Physical Sign-off","count":1},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_3bb7e3ce-9f9"},"title":"ASIC Physical Design, Principal Engineer","description":"<p>We are seeking a highly motivated individual with a passion for physical design and implementation of complex Mixed Signal IPs and test chips. As an ASIC Physical Design, Principal Engineer, you will lead the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Leading the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off.</li>\n<li>Collaborating with cross-functional teams to integrate and verify IP designs to achieve project goals.</li>\n<li>Providing technical guidance and mentorship.</li>\n<li>Continuously improving design methodologies and processes to enhance efficiency and quality.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>BE or MSEE with 10+ years of direct physical design experience.</li>\n<li>Proficiency in full design cycle from RTL to GDSII, with a focus on Physical Design.</li>\n<li>Solid engineering understanding of IC design, implementation flows, and methodologies for deep submicron design.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_3bb7e3ce-9f9","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ho-chi-minh-city/asic-physical-design-principal-engineer-in-tan-binh-district/44408/91117302576?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Physical Design","Mixed Signal IPs","Test Chips"],"x-skills-preferred":["RTL to GDS","Timing and Physical Sign-off","Cross-functional Team Collaboration"],"datePosted":"2026-03-06T07:24:06.055Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Tan Binh district, Ho Chi Minh City"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Physical Design, Mixed Signal IPs, Test Chips, RTL to GDS, Timing and Physical Sign-off, Cross-functional Team Collaboration"}]}