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The primary focus of this role is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)</li>\n<li>RTL to GDSII full flow experience or knowledge is preferable</li>\n<li>Strong interest and understanding of Advanced Node &amp; Design methodologies are required.</li>\n<li>In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node, Static Timing Analysis, including noise analysis) experience and knowledge are required.</li>\n<li>Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred</li>\n<li>Back end P&amp;R tools (Fusion Compiler, ICC2, Innovus)</li>\n<li>Excellent verbal and written presentation/communication skills are mandatory.</li>\n</ul>\n<p>Requirements include:</p>\n<ul>\n<li>BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience.</li>\n<li>Tool knowledge: front end Synthesis and back end PnR tools (Fusion Compiler, ICC2, Design Compiler, Genus),</li>\n<li>Tool knowledge: STA (Primetime, Tempus)</li>\n</ul>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_d416110b-f79","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/pnr-applications-engineer-staff/44408/92664451888","x-work-arrangement":null,"x-experience-level":"staff","x-job-type":"employee","x-salary-range":"$129000-$193000","x-skills-required":["ASIC design","Industry-standard tools","RTL to GDSII full flow","Advanced Node & Design methodologies","Synopsys Back end tool","Clock Tree Synthesis methodologies","Back end P&R tools"],"x-skills-preferred":["Front end Synthesis","Back end PnR tools","STA (Primetime, Tempus)"],"datePosted":"2026-04-05T13:22:58.699Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC design, Industry-standard tools, RTL to GDSII full flow, Advanced Node & Design methodologies, Synopsys Back end tool, Clock Tree Synthesis methodologies, Back end P&R tools, Front end Synthesis, Back end PnR tools, STA (Primetime, Tempus)","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":129000,"maxValue":193000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8142c2c7-bfb"},"title":"Principal STA Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p><strong>Job Description</strong></p>\n<p>As a Principal STA Engineer, you will be responsible for owning full-chip and block-level STA sign-off across all PVT corners and operational modes. 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