We are seeking an Electronics Reliability Engineer to join our team at the RES Lab facility in Beltsville, Maryland. As an Electronics Reliability Engineer, you will serve as technical lead and project manager for complex projects, applying Synopsys products, engineering services, and laboratory testing to meet customer and internal objectives.
\nYour responsibilities will include scoping cost, schedule, and technical objectives, and leading technical discussions for strategic and enterprise customer engagements. You will also lead and execute testing projects, including design-of-experiments, failure analysis, test planning, test execution, data analysis, and correlation with simulation results.
\nAdditionally, you will contribute to research and development (R&D) initiatives focused on electronics reliability, packaging, and mechanical behavior. You will perform advanced simulations to assess responses of finite element models under temperature cycling, vibration, and mechanical shock.
\nYou will conduct Sherlock simulations to model printed circuit board assemblies and predict solder fatigue under various environmental conditions. You will collaborate with multidisciplinary teams to identify and mitigate mechanical risks in electronic components, products, and systems.
\nYou will build strong internal networks across regions and functions, supporting technical excellence and business growth. You will apply and grow industry-specific knowledge in electronics reliability and packaging, contributing to internal and external thought leadership.
\nAs an Electronics Reliability Engineer, you will enhance the reliability and performance of advanced electronic products and systems for industry-leading clients. You will drive innovation in mechanical simulation and reliability testing, shaping the future of electronics packaging and design.
\nYou will improve customer satisfaction through expert technical support and project management, fostering long-term partnerships. You will reduce risk and failure rates in critical electronic systems through rigorous testing and simulation methodologies.
\nYou will accelerate R&D initiatives by applying cutting-edge engineering solutions to real-world challenges. You will strengthen Synopsys' reputation as a leader in engineering services, technical excellence, and reliability solutions.
\nYou will mentor and develop team members, elevating the collective expertise and capability of the organization.
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\nYou are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 1–3 years of experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies. Your curiosity drives you to stay current with industry standards, including JEDEC requirements for DDR interfaces, and you are enthusiastic about mastering new methodologies and tools. You value quality and efficiency, consistently delivering robust designs that meet rigorous specifications. Your communication skills enable you to articulate technical concepts clearly and foster productive relationships within cross-functional teams. You are detail-oriented, self-motivated, and embrace opportunities to learn and grow. Whether tackling circuit design tasks or collaborating with system engineers, you demonstrate adaptability, integrity, and a commitment to excellence. Your proactive approach, analytical mindset, and willingness to take initiative make you an invaluable contributor to the team. If you are excited about working on cutting-edge memory interface solutions and contributing to the next generation of high-performance chips, Synopsys is the place for you.
\nDesigning DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.
\nAccelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys’ leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.
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\nWe are at the forefront of integrating Generative AI and agentic systems into large-scale recommendation pipelines. We are seeking a Senior Applied Scientist to design, build, and optimize ranking and recommendation models that directly impact user engagement across Microsoft’s content ecosystem.
\nIn this role, you will work hands-on with cutting-edge deep learning and LLM-enhanced ranking systems while collaborating closely with engineering and product partners to deliver production-quality solutions at scale.
\nMicrosoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
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\nThis position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
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\nYou will define, evolve, and implement SystemC modeling standards and virtual platform architectures for complex embedded and SoC-based systems. You will also architect and develop SystemC/TLM2.0 models, integrating C++ models for CPUs, interconnects, memories, and peripherals within the Virtualizer environment.
\nYour responsibilities will include customizing and configuring Virtualizer platforms to support early firmware, bootloader development, and Linux/RTOS bring-up and debugging. You will optimize virtual platforms for performance, scalability, and usability, integrating with debuggers, build systems, and CI pipelines.
\nYou will drive advanced software debugging, conducting deep root-cause analysis across hardware models and software stacks, and implementing long-term fixes and improvements. You will utilize Python for Virtualizer automation, simulation orchestration, and test/regression frameworks.
\nYou will conduct design and code reviews, mentor engineers, and foster technical excellence across teams. You will accelerate early software development and system validation for Synopsys' customers, enabling faster time-to-market for innovative products.
\nOur team is composed of experts in SystemC, C++, embedded software, and hardware architecture, working collaboratively to deliver high-impact solutions for global customers. Together, you will pioneer new technologies, set industry standards, and drive the future of system-level design and verification.
\nAs a staff engineer, you will have the opportunity to shape the architectural direction of virtual platform solutions, ensuring their scalability, accuracy, and usability for complex SoC designs. You will mentor and uplift engineering teams, fostering a culture of technical excellence, collaboration, and continuous learning.
\nYou will drive improvements in simulation workflows, debugging tools, and automation frameworks, enhancing productivity and reliability. You will contribute to Synopsys' leadership in semiconductor and embedded software innovation, impacting global industries from automotive to IoT.
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
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\nAs Director of Circuit Racing, you will be responsible for driving commercial growth, championing high performance and competitive excellence, and providing strategic leadership to the circuit racing division.
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