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    <job>
      <externalid>3511e871-def</externalid>
      <Title>Application Engineering, Staff Engineer</Title>
      <Description><![CDATA[<p>We&#39;re seeking an expert in static timing analysis to join our applications engineering team. As a Staff Engineer, you will be responsible for supporting the industry-leading Synopsys PrimeTime Static Timing Analysis tool across pre-sale and post-sale engagements.</p>
<p>Your key responsibilities will include driving product adoption through competitive benchmarking, customer evaluations, and articulating product advantages to design teams and management. You will also deliver customer training, technical presentations, and hands-on workshops to maximize user proficiency and satisfaction.</p>
<p>In addition, you will provide tape-out support, troubleshoot complex timing issues, and ensure successful project completion. You will collaborate with R&amp;D, marketing, and sales to relay customer feedback and influence product enhancements.</p>
<p>To succeed in this role, you will need expertise in Synopsys PrimeTime STA tool, with hands-on experience and deep knowledge of its features. You will also require strong understanding of timing corners, process variations, and signal integrity-related issues.</p>
<p>If you are a collaborative team player who values diverse perspectives and fosters inclusive environments, we encourage you to apply.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>Synopsys PrimeTime STA tool, Timing corners, Process variations, Signal integrity-related issues, TCL scripting, Physical design, Extraction, ECO methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of solutions for designing and verifying advanced silicon chips.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/application-engineering-staff-engineer/44408/92918452480</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>5566d11e-802</externalid>
      <Title>RTL Design &amp; Verification - Senior Staff Engineer</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.</p>
<p>You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.</p>
<p>You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.</p>
<p>You will participate in code reviews and technical discussions to drive innovation and continuous improvement.</p>
<p>You will accelerate the development of industry-leading SLM IPs that power the world&#39;s top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.</p>
<p>You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys&#39; leadership in the market.</p>
<p>You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.</p>
<p>To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.</p>
<p>You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.</p>
<p>You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.</p>
<p>Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, Unix/Linux environments, debugging and problem-solving skills, digital, analog, and mixed-signal IP/circuit design, 3D-IC standards and semiconductor verification best practices</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys develops and provides electronic design automation (EDA) software and intellectual property (IP) products used in the design and manufacturing of semiconductors.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-senior-staff-engineer/44408/93169653024</Applyto>
      <Location>Yerevan</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>8409e0bb-24a</externalid>
      <Title>RTL Design &amp; Verification Staff Engineer</Title>
      <Description><![CDATA[<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>We are looking for a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will thrive in collaborative environments, bringing together diverse perspectives to solve complex challenges. With a strong foundation in RTL design and verification, you will approach every project with a sense of ownership and a commitment to excellence.</p>
<p>As an effective communicator, you will clearly articulate technical concepts to both internal teams and external customers, fostering strong partnerships and driving innovation. You will be adaptable, self-motivated, and resilient in the face of challenges, always seeking opportunities to learn and grow.</p>
<p>Your responsibilities will include designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance. You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.</p>
<p>You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies. You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.</p>
<p>You will participate in code reviews and technical discussions to drive innovation and continuous improvement.</p>
<p>The impact you will have includes accelerating the development of industry-leading SLM IPs that power the world&#39;s top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions. You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy.</p>
<p>You will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will have 5+ years of hands-on experience in RTL design and verification. You will be proficient in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.</p>
<p>You will be an analytical and critical thinker with a detail-oriented approach. You will be an effective communicator, comfortable collaborating across teams and with customers. You will be self-motivated and proactive in seeking solutions and driving projects forward.</p>
<p>You will join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services for the semiconductor and electronics industries.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-staff-engineer/44408/93169652816</Applyto>
      <Location>Yerevan</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>9ba8cfce-60d</externalid>
      <Title>Failure Analysis Engineer - Electronics Assemblies</Title>
      <Description><![CDATA[<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>As a Failure Analysis Engineer, you will be responsible for diagnosing and analyzing functional failures in highly complex electronic assemblies throughout the product lifecycle. You will provide expert technical support to Contract Manufacturers during production and test phases, ensuring rapid resolution of manufacturing-related failures.</p>
<p>Key responsibilities:</p>
<ul>
<li>Diagnose and analyze functional failures in highly complex electronic assemblies</li>
<li>Provide expert technical support to Contract Manufacturers during production and test phases</li>
<li>Collaborate closely with R&amp;D teams to root-cause prototype and pre-production issues</li>
<li>Perform hands-on failure analysis, including hardware manipulation, measurement, mounting/demounting, and rework of assemblies</li>
<li>Utilize laboratory equipment (oscilloscopes, multimeters, logic analyzers, power supplies) to characterize failures and confirm hypotheses</li>
<li>Leverage Linux-based environments and develop/maintain Tcl scripts to automate tests, extract data, reproduce failures, and support diagnostics</li>
<li>Document analysis results, root causes, and corrective actions clearly and thoroughly</li>
<li>Interface with cross-functional teams (Engineering, Manufacturing, Quality, Field Service) to drive timely and aligned issue resolution</li>
<li>Identify recurring failure patterns and propose continuous improvements to design, process, or test methodologies</li>
<li>Ensure compliance with internal procedures, quality requirements, and relevant industrial standards</li>
</ul>
<p>Requirements:</p>
<ul>
<li>Engineering degree in Electronics (mandatory)</li>
<li>Minimum 5 years of experience in failure analysis, hardware debugging, electronics design, manufacturing support, or related technical role</li>
<li>Deep expertise in complex electronic assemblies, including mixed-signal, digital, analog, and power electronics</li>
<li>Strong system-level understanding of mechanical integration, power management, and thermal impacts on electronics reliability</li>
<li>Hands-on proficiency with laboratory equipment (oscilloscopes, multimeters, logic analyzers, power supplies)</li>
<li>Solid experience working in Linux environments for analysis, data extraction, and debugging</li>
<li>Proven ability to develop and deploy Tcl scripts for test automation and diagnostics</li>
<li>Fluency in both French and English (spoken and written); German language skills are a plus</li>
</ul>
<p>Experience Level: Senior
Employment Type: Full-time
Workplace Type: Onsite
Category: Engineering
Industry: Technology
Salary Range: Competitive salary
Required Skills: Failure analysis, electronics design, manufacturing support, Linux, Tcl scripting, oscilloscopes, multimeters, logic analyzers, power supplies
Preferred Skills: German language skills, experience with complex electronic assemblies, system-level understanding of mechanical integration, power management, and thermal impacts on electronics reliability</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>Full-time</Jobtype>
      <Experiencelevel>Senior</Experiencelevel>
      <Workarrangement>Onsite</Workarrangement>
      <Salaryrange>Competitive salary</Salaryrange>
      <Skills>Failure analysis, Electronics design, Manufacturing support, Linux, Tcl scripting, Oscilloscopes, Multimeters, Logic analyzers, Power supplies, German language skills, Experience with complex electronic assemblies, System-level understanding of mechanical integration, power management, and thermal impacts on electronics reliability</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. With over 40 years of experience, the company has established itself as a key player in the development of complex semiconductor solutions.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/rungis/failure-analysis-engineer-electronics-assemblies/44408/92577688000</Applyto>
      <Location>Rungis, Île-de-France Region, France</Location>
      <Country></Country>
      <Postedate>2026-03-10</Postedate>
    </job>
    <job>
      <externalid>07d0d6b0-9ac</externalid>
      <Title>RTL Design &amp; Verification Engineer (R&amp;D Engineering, Sr Engineer)</Title>
      <Description><![CDATA[<p>We are seeking a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will be responsible for designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.</li>
<li>Developing comprehensive test cases to ensure robust product functionality and performance.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>BS/MS in Computer Science, Electrical Engineering, or related field.</li>
<li>5 years of hands-on experience in RTL design and verification.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, digital, analog, mixed-signal IP/circuit design, 3D-IC standards, semiconductor verification best practices</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/rtl-design-and-verification-engineer-r-and-d-engineering-sr-engineer/44408/90568184224</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>19f57d9e-523</externalid>
      <Title>Staff EDA Applications Engineer</Title>
      <Description><![CDATA[<p>We are seeking a highly skilled Staff EDA Applications Engineer to join our team in Bengaluru, India. As a Staff EDA Applications Engineer, you will be responsible for creating and optimizing design flows and solutions to meet aggressive PPA targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Creating and optimizing design flows and solutions to meet aggressive PPA targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</li>
<li>Collaborating cross-functionally with customers, R&amp;D, and internal teams to drive innovative solution and feature development that anticipates and addresses real-world design challenges.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with 5+ years of relevant experience.</li>
<li>Deep understanding of RTL-to-GDSII flows and hands-on experience with backend P&amp;R tools (Fusion Compiler, ICC2, or similar).</li>
<li>Expertise in physical synthesis, timing closure, clock tree synthesis (CTS), and routing at advanced technology nodes.</li>
<li>Proficiency in Tcl and Python scripting for automating EDA workflows and optimizing design methodologies.</li>
<li>Strong understanding of ASIC design flow, VLSI, and CAD development.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL-to-GDSII flows, backend P&amp;R tools, physical synthesis, timing closure, clock tree synthesis, routing, Tcl scripting, Python scripting, ASIC design flow, VLSI, CAD development</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions. The company&apos;s technology is used to design and develop complex semiconductor products, and its solutions are used by leading companies in the electronics industry.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/staff-eda-applications-engineer/44408/92130651408</Applyto>
      <Location>Bengaluru, Karnataka, India</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>d6bfdcde-f3e</externalid>
      <Title>Application Engineering, Sr Staff Engineer</Title>
      <Description><![CDATA[<p>We are seeking a technically adept engineer with a deep understanding of static timing analysis and a passion for helping others succeed. You will be providing expert-level support for PrimeTime, Synopsys’ industry-leading Static Timing Analysis (STA) tool, to both prospective and existing customers.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Providing expert-level support for PrimeTime, Synopsys’ industry-leading Static Timing Analysis (STA) tool, to both prospective and existing customers.</li>
<li>Leading competitive product benchmarks and technical evaluations, demonstrating PrimeTime’s advantages to customer design teams and management.</li>
<li>Delivering customer training sessions and workshops, enabling teams to maximize their productivity and achieve successful tape-outs.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Bachelor’s degree in Electrical Engineering or equivalent with 5-7 years of relevant experience, or Master’s degree (MSEE or equivalent) with 4-6 years of experience.</li>
<li>Hands-on experience and in-depth knowledge of Synopsys PrimeTime or similar STA tools.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>static timing analysis, Synopsys PrimeTime, STA tools, TCL scripting, workflow optimization</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of solutions for designing and verifying advanced silicon chips. They enable their customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/application-engineering-sr-staff-engineer/44408/90816592768</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>f3867591-b1a</externalid>
      <Title>HBM Design Verification Engineer, Principal</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>
<p><strong>What you&#39;ll do</strong></p>
<p>As a HBM Design Verification Engineer, Principal, you will be responsible for developing verification strategies and plans for ASIC/SoC projects, defining and implementing testbench architecture and methodologies, building testbench infrastructure and verification components, and creating verification item lists, coverage models, and checkers.</p>
<p><strong>What you need</strong></p>
<ul>
<li>Bachelor’s or Master’s degree in Electrical Engineering (BSEE/MSEE) with 10–15+ years of relevant experience</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>UVM/VMM/OVM, SystemVerilog, Verilog, C/C++, Perl, Python, TCL scripting</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leader in advanced chip design and software security technologies, empowering the Era of Smart Everything. The company drives innovations that shape how we live and work—self-driving cars, artificial intelligence, cloud computing, 5G, and the Internet of Things.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/hsinchu/hbm-design-verification-engineer-principal/44408/90624325296</Applyto>
      <Location>Hsinchu</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>c52ba7ed-c54</externalid>
      <Title>Applications Engineering, Sr Staff Engineer</Title>
      <Description><![CDATA[<p>We are seeking a highly skilled Applications Engineering, Sr Staff Engineer to join our team. As a Sr Staff Engineer, you will be responsible for partnering with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs, and libraries.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Partnering with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs, and libraries.</li>
<li>Creating and optimizing design flows and solutions to meet aggressive PPA (performance, power, area) targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with 9+ years of relevant experience.</li>
<li>Deep understanding of RTL-to-GDSII flows and hands-on experience with backend P&amp;R tools (Fusion Compiler, ICC2, or similar).</li>
<li>Expertise in physical synthesis, timing closure, clock tree synthesis (CTS), and routing at advanced technology nodes (like 2nm/3nm/5nm etc).</li>
<li>Proficiency in Tcl and Python scripting for automating EDA workflows and optimizing design methodologies.</li>
<li>Strong technical account management skills and a proven ability to lead and mentor teams in a high-performance environment.</li>
<li>Outstanding verbal and written communication, presentation, and customer interaction skills.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL-to-GDSII flows, backend P&amp;R tools, physical synthesis, timing closure, clock tree synthesis, routing, Tcl scripting, Python scripting, technical account management, AI-driven design methodologies, EDA tools, IPs, libraries, customer interaction</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys drives the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/noida/applications-engineering-sr-staff-engineer/44408/92304384000</Applyto>
      <Location>Noida</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>1e32ec8b-15e</externalid>
      <Title>R&amp;D Engineering, Sr Staff Engineer (RTL Design &amp; Verification)</Title>
      <Description><![CDATA[<p>Opening. This role exists to drive the development of industry-leading Silicon Lifecycle Management IPs that power the world&#39;s top technology companies.</p>
<p><strong>What you&#39;ll do</strong></p>
<p>You will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.</p>
<ul>
<li>Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.</li>
<li>Developing comprehensive test cases to ensure robust product functionality and performance.</li>
<li>Collaborating with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.</li>
<li>Staying current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.</li>
<li>Contributing to the improvement of verification methodologies and automation flows.</li>
<li>Documenting design specifications, verification plans, and results to ensure transparency and repeatability.</li>
<li>Participating in code reviews and technical discussions to drive innovation and continuous improvement.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>BS/MS in Computer Science, Electrical Engineering, or related field.</li>
<li>8+ years of hands-on experience in RTL design and verification.</li>
<li>Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.</li>
<li>Experience working in Unix/Linux environments.</li>
<li>Strong debugging and problem-solving skills, especially in complex chip design environments.</li>
<li>Excellent written and verbal communication skills in English.</li>
<li>Knowledge of digital, analog, and mixed-signal IP/circuit design (a plus).</li>
<li>Familiarity with 3D-IC standards and semiconductor verification best practices (desirable).</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, Unix/Linux environments, Digital, analog, and mixed-signal IP/circuit design, 3D-IC standards and semiconductor verification best practices</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/r-and-d-engineering-sr-staff-engineer-rtl-design-and-verification/44408/91089467920</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-01-28</Postedate>
    </job>
    <job>
      <externalid>53f944ea-09d</externalid>
      <Title>Senior Applications Engineer</Title>
      <Description><![CDATA[<p>We&#39;re looking for Senior Applications Engineer to join our team!</p>
<p><strong>What you&#39;ll do</strong></p>
<p>Working on Functional Verification and Design Implementation.</p>
<ul>
<li>Using tools such as Formality, Formality-ECO, Fusion Compiler, or other EDA tools.</li>
</ul>
<ul>
<li>Leveraging your understanding of advanced process nodes.</li>
</ul>
<ul>
<li>Utilizing your scripting skills to automate processes.</li>
</ul>
<p><strong>What you need</strong></p>
<p>BS with 3-5 years of direct hands-on experience.</p>
<ul>
<li>Proficiency in design closure.</li>
</ul>
<ul>
<li>Experience with tools such as Formality, Formality-ECO, Fusion Compiler, or other EDA tools will be added value.</li>
</ul>
<ul>
<li>Knowledge of Python, Perl, and TCL scripting languages.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>BS with 3-5 years of direct hands-on experience, Proficiency in design closure, Experience with tools such as Formality, Formality-ECO, Fusion Compiler, or other EDA tools, Knowledge of Python, Perl, and TCL scripting languages, Business level English proficiency</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/penang/applications-engineer-sr-engineer-implementation/44408/89575303088</Applyto>
      <Location>Brackley</Location>
      <Country></Country>
      <Postedate>2025-12-22</Postedate>
    </job>
  </jobs>
</source>