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Your expertise in high-speed serializer and data recovery circuits will position you as a key contributor to the next generation of PAM-based SerDes products.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Designing and verifying advanced digital circuits for PAM-based SerDes PHY IP, ensuring robust and high-performance mixed-signal solutions.</li>\n<li>Developing RTL code, modeling analog blocks, and crafting complex system-level testbenches in Verilog to validate functionality and performance.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Bachelor&#39;s or Master&#39;s degree in Electrical Engineering (BSEE or MSEE) with at least 10 years of industry experience in digital design and verification.</li>\n<li>Must be familiar with Verilog and VCS. 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