Senior High Frequency C++ Engineer · Unknown

Sat, 18 Apr 2026 22:13:18 GMT
Engineering

Unknown · New York, New York, United States of America · $175,000 to $250,000 · onsite

The Systematic Platform Execution & Exchange Data (SPEED) Team is at the core of our organisation, powering our lowest-latency solutions for systematic and high-frequency trading. We deliver the live trading and market-data platforms used by portfolio managers and risk systems, including Latency Critical Trading (LCT), DMA OMS (Client Direct), DMA market data feeds, packet capture (PCAPs), enterprise market data, and intraday data services across latency tiers from sub-100 nanoseconds to millisecond-sensitive workflows.

As a Senior HFT Developer on SPEED, you will design and build core low-latency components for order entry, market data, exchange simulation, feature extraction, and strategy containers, initially focused on delivering the full set of capabilities required for trading and research infrastructure. You will collaborate closely with system architects and quantitative researchers, operate and optimise these systems in production, and have clear opportunities to grow into technical and team leadership as the effort scales.

Principal Responsibilities:

Build low-latency infrastructure for order entry, market data, exchange simulators, feature extraction, strategy container, and other systems.

Build convenience layer tools and services to facilitate trading teams onboarding at MLP.

Provide level 2 support for the systems in production.

Work closely with the SPEED architect, quantitative researchers, and the business to provide high ROI solutions that are aligned with both the business and the platform strategy.

Opportunities for growth in terms of leadership as effort expands.

Will liaise with many other MLP teams depending on project focus.

Qualifications/Skills Required:

5+ years with a well-regarded HFT group, delivering production-grade, low-latency systems.

Demonstrated expertise in C++ and Python for production, low-latency systems.

Deep familiarity with low-level Systems: OS tuning, networking stack, user-space drivers, and kernel-bypass patterns.

Strong understanding of the HFT quantitative research pipeline.

Experience with HPC grids (scheduling, storage, job management) for research and production workloads.

Cloud experience (AWS, GCP) is a plus.

Proven ability to navigate large organisations, create cross-team synergies, and influence outcomes.

High accountability and ownership; able to self-manage time, set priorities, and meet deadlines.

Potential to provide technical leadership and manage a small team.

The estimated base salary range for this position is $175,000 to $250,000, which is specific to New York and may change in the future. We pay a total compensation package which includes a base salary, discretionary performance bonus, and a comprehensive benefits package.