We are seeking a highly capable Implementation Engineer & Technologist to drive silicon construction and optimization for next-generation AI chips. This is a senior hands-on individual-contributor role for an engineer who combines strong technical breadth with the ability to go deep quickly, solve hard problems, and land results in collaboration with cross-functional teams.
\nYou will operate across architecture, circuits, memory, RTL, physical implementation, and integration technologies to turn ambitious product goals into manufacturable silicon. This role is not limited to analysis or pathfinding,you will be expected to develop solutions, prototype ideas, drive execution, and close critical gaps.
\nThe ideal candidate is a hands-on generalist with strong engineering judgment, deep circuit intuition, broad semiconductor knowledge, and a habit of using AI tools to move faster and make better decisions.
\nKey responsibilities include: Partner with architecture and system teams to translate product goals into executable silicon construction strategies. Drive hands-on optimization of power, performance, area, cost, and reliability across the silicon stack. Develop and implement solutions spanning circuits, memory, RTL, physical design, and integration. Use and build AI-driven tools, flows, and methodologies to accelerate silicon implementation. Evaluate new technologies and convert them into reliable product constructions optimized for performance, performance/TCO, and performance/W.
\nRequirements include: BS with 12+ years, MS with 10+ years, or PhD with 6+ years of relevant industry experience in chip design or implementation. Strong hands-on expertise in circuits and implementation-driven PPA optimization. Deep knowledge of semiconductor technologies including memory, advanced nodes, packaging, and 3D integration. Hands-on experience with RTL design and physical implementation through tapeout. Proven ability to work across disciplines and solve complex technical problems end-to-end. Strong use of AI tools for engineering productivity, analysis, coding, or design optimization. Excellent technical communication and collaboration skills.
\nPreferred qualifications include: Strong first-principles understanding of AI chip architectures and training/inference workloads. Experience improving silicon products through innovations in performance, power, cost, yield, or reliability. Experience with HBM, SRAM, memory hierarchy design, or memory-centric optimization. Experience building internal tools, models, or automation used by engineering teams. Research lab experience and/or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
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\nResponsibilities:
\nAs a Manager, the individual will be involved in challenging projects and drive it to completion in record time.
\nYou will quickly ramp on the existing flow, understand the challenges, and produce the work plan.
\nYour expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.
\nYou will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.
\nSkills/Experience:
\nFundamentals:
\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
\nBenefits:
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\nWhat you'll do
\nAs a Staff Engineer, you will be responsible for designing and developing advanced embedded memories (SRAM, ROM, Register File).
\nWhat you need
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