Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.
\nThey work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nThese engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nAt Synopsys, we drive the innovations that shape the way we live and connect.
\nOur technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.
\nWe lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nJoin us to transform the future through continuous technological innovation.
\nYou are a visionary and detail-oriented principal engineer, passionate about pushing the boundaries of analog circuit design in high-speed interfaces.
\nWith a deep technical foundation and proven leadership skills, you thrive in collaborative environments and are eager to mentor the next generation of engineers.
\nYour expertise in SerDes and analog macros enables you to dissect complex architectural requirements and translate them into robust, scalable designs.
\nYou are adept at balancing power, area, and performance trade-offs, and you proactively seek innovative solutions to technical challenges.
\nYour experience spans both the theoretical and practical aspects of circuit design,from transistor-level fundamentals to silicon-proven implementations.
\nYou champion rigorous verification methodologies and leverage advanced simulation tools to ensure the highest quality outcomes.
\nAs a communicator, you clearly articulate your ideas to peers, customers, and junior team members, fostering a culture of learning and excellence.
\nYou are motivated by the opportunity to shape industry-leading IP products that power tomorrow’s technology, and you approach every project with a commitment to reliability, efficiency, and continuous improvement.
\nYour adaptability and curiosity make you a valuable contributor to cross-functional teams, and you are excited to make a lasting impact at Synopsys.
\nOwn the architecture, design, and implementation of analog macro-level circuits for SerDes IP.
\nTrack and review the technical progress of sub-block owners, ensuring alignment with project goals.
\nInterpret SerDes standards and architecture documents to develop detailed analog specifications.
\nIdentify and refine circuit implementations, optimizing for power, area, and performance targets.
\nPropose and execute design and verification strategies using advanced simulator features for robust outcomes.
\nOversee physical layout to minimize parasitics, device stress, and process variation impacts.
\nCollaborate closely with digital RTL engineers on calibration, adaptation, and control algorithms for analog circuits.
\nPresent simulation data and technical insights for peer and customer reviews.
\nMentor and review the progress of junior engineers, fostering growth and technical excellence.
\nDocument design features, methodologies, and test plans for internal and customer use.
\nConsult on electrical characterization and testing of circuits within the SerDes IP product portfolio.
\nDrive innovation and quality in Synopsys’ industry-leading SerDes IP solutions.
\nElevate the performance and reliability of analog designs, enabling next-generation connectivity standards.
\nContribute to the success of global customers by delivering robust, silicon-proven analog macros.
\nEnhance cross-functional collaboration across design, layout, and digital teams.
\nMentor and develop junior engineers, strengthening Synopsys’ talent pipeline.
\nInfluence the direction of advanced analog design methodologies and verification strategies.
\nProvide technical leadership in customer engagements and peer reviews.
\nSupport continuous improvement in design processes and documentation practices.
\nPhD with 7+ years, or MSc with 10+ years of SerDes/high-speed analog design experience.
\nExpertise in transistor-level circuit design and strong CMOS design fundamentals.
\nSilicon-proven experience implementing circuits for TX, RX, and Clock paths within SerDes architectures.
\nLeadership experience in guiding small teams through macro-level design projects.
\nIn-depth knowledge of SerDes sub-circuits such as equalizers, samplers, drivers, serializers, deserializers, VCOs, phase interpolators, DLLs, PLLs, bandgap references, ADCs, and DACs.
\nAdvanced skills in optimizing FinFET CMOS layouts to minimize parasitics and local device mismatches.
\nAwareness of ESD and reliability issues, including circuit techniques and layout strategies.
\nProficiency with EDA tools for schematic entry, physical layout, and design verification.
\nExperience with SPICE simulators for detailed circuit analysis.
\nFamiliarity with analog behavioral modeling and simulation control using Verilog-A.
\nProgramming experience in TCL, Perl, C, Python, and MATLAB for design automation and data analysis.
\nAnalytical thinker with exceptional problem-solving skills.
\nCollaborative leader and effective communicator.
\nDetail-oriented and methodical in approach.
\nAdaptable and open to learning new technologies.
\nMentor and role model for junior engineers.
\nSelf-motivated and proactive in driving project outcomes.
\nCommitted to excellence, reliability, and innovation.
\nYou will join a dynamic and multidisciplinary team of analog, digital, and mixed-signal engineers dedicated to developing industry-leading SerDes IP solutions.
\nThe team is focused on delivering high-performance, reliable, and scalable designs that enable advanced connectivity in semiconductor products.
\nCollaboration, mentorship, and technical innovation are at the core of the team’s culture, providing an environment where your expertise and leadership will have a direct impact on both product and team success.
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
\nOur total rewards include both monetary and non-monetary offerings.
\nYour recruiter will provide more details about the salary range and benefits during the hiring process.
\nSynopsys Canada ULC values the diversity of our workforce.
\nWe are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process.
\nShould you require an accommodation, please contact hr-help-canada@synopsys.com.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_410ca56b-a94","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/analog-design-principal-engineer-serdes/44408/92736415648","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["SerDes","analog circuit design","high-speed interfaces","transistor-level circuit design","CMOS design fundamentals","EDA tools","SPICE simulators","Verilog-A","TCL","Perl","C","Python","MATLAB"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:49.319Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"SerDes, analog circuit design, high-speed interfaces, transistor-level circuit design, CMOS design fundamentals, EDA tools, SPICE simulators, Verilog-A, TCL, Perl, C, Python, MATLAB"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4815342e-ce8"},"title":"Analog Design Engineer","description":"Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
\nYou Are:
\nYou are a seasoned analog design engineer with deep expertise in high-speed SERDES IP. You thrive on solving complex circuit challenges, leading technical initiatives, and collaborating across multidisciplinary teams. Your track record in advanced CMOS design, effective communication skills, and passion for innovation make you a trusted mentor and a key contributor to project and team success.
\nWhat You’ll Be Doing:
\nThe Impact You Will Have:
\nWhat You’ll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nA collaborative, high-performing analog and mixed-signal design group focused on developing advanced SERDES IP for leading-edge applications. The core purpose of the team is the development of 224-Gb/s Ethernet SerDes Transceivers for network infrastructure ICs, driving the future of high-speed connectivity in data centers and communications networks for the world.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_4815342e-ce8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/kanata/analog-design-engineer/44408/93286401584","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["High-speed SERDES IP","Transistor-level CMOS design","SERDES sub-circuits","Schematic, layout, and verification tools","SPICE simulators","Scripting languages (Verilog-A, TCL, Python, etc.)"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.629Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Kanata"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"High-speed SERDES IP, Transistor-level CMOS design, SERDES sub-circuits, Schematic, layout, and verification tools, SPICE simulators, Scripting languages (Verilog-A, TCL, Python, etc.)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5f4e85a9-296"},"title":"Staff Analog Design Engineer","description":"Overview
\nOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nJob Description
\nCategory
\nEngineering
\nHire Type
\nEmployee
\nJob ID
\n15391
\nRemote Eligible
\nNo
\nDate Posted
\n02/23/2026
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
\nYou Are:
\nYou are a seasoned analog design professional with a passion for pushing technology boundaries. With over a decade of hands-on experience in analog IC design, you thrive in fast-paced, collaborative environments and are motivated by technical challenges. Your expertise in Multi-Gbps NRZ & PAM4 SERDES IP and familiarity with the latest FinFET and gate-all-around process nodes set you apart as a leader in the field. You are adept at translating complex SerDes standards into innovative, high-performance circuit architectures and are comfortable navigating the intricacies of transistor-level design, system-level budgeting, and analog/digital co-design.
\nYou excel at mentoring peers, sharing knowledge, and advocating for design excellence. Your strong analytical skills allow you to quickly identify architectural bottlenecks and propose effective solutions. You are detail-oriented, balancing deep technical focus with a strategic view of project goals and timelines. Communication is one of your strengths—whether presenting simulation data, documenting design features, or collaborating across multidisciplinary teams, you articulate complex ideas clearly to both technical and non-technical audiences.
\nBeyond your technical expertise, you are committed to continuous learning and growth, staying abreast of industry trends and emerging technologies. You value diversity and inclusion, recognizing that great ideas come from a variety of perspectives. Your proactive and adaptable approach ensures you thrive in dynamic, innovative environments where your contributions drive meaningful impact.
\nWhat You’ll Be Doing:
\nThe Impact You Will Have:
\nWhat You’ll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nYou’ll join a world-class analog and mixed-signal R&D team at Synopsys, working alongside experts in high-speed IC design, verification, and CAD tool development. The team is collaborative, diverse, and passionate about innovation, with a focus on developing cutting-edge SERDES IP for advanced process nodes. You’ll have access to best-in-class design tools, mentorship, and opportunities for professional growth as you help shape the future of connectivity technology.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
\nWhat is it like to be an Analog Design Engineer at Synopsys?
\nArman Shahmuradyan
\nAnalog Design, Manager
\nBenefits
\nAt Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
\nVisit Benefits Page
\nComprehensive medical and healthcare plans that work for you and your family.
\nIn addition to company holidays, we have ETO and FTO Programs.
\nMaternity and patern
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_5f4e85a9-296","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/staff-analog-design-engineer/44408/92076328848","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","FinFET technologies","CMOS tape-outs","Multi-Gbps high-speed designs","SERDES architectures","analog/digital co-design","calibration","adaptation","timing handoff","ESD protection","custom digital design","design for reliability","schematic entry","physical layout","design verification tools","SPICE simulators","scripting languages","system-level budgeting","signal integrity"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:05:32.632Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad, Telangana, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, FinFET technologies, CMOS tape-outs, Multi-Gbps high-speed designs, SERDES architectures, analog/digital co-design, calibration, adaptation, timing handoff, ESD protection, custom digital design, design for reliability, schematic entry, physical layout, design verification tools, SPICE simulators, scripting languages, system-level budgeting, signal integrity"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e344db05-e19"},"title":"Staff Analog and Mixed Signal IC Designer","description":"We are seeking a Staff Analog and Mixed Signal IC Designer to join our team. As a Staff Analog and Mixed Signal IC Designer, you will be responsible for designing and developing high-speed analog and mixed-signal ICs. You will work closely with our cross-functional teams to develop and implement new design methodologies and tools.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_e344db05-e19","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/markham/staff-analog-and-mixed-signal-ic-designer-15315/44408/92214309312","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog and mixed-signal IC design","SPICE simulators","EDA tools"],"x-skills-preferred":["circuit design and analysis","communication and teamwork skills"],"datePosted":"2026-03-06T07:26:51.053Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Markham"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog and mixed-signal IC design, SPICE simulators, EDA tools, circuit design and analysis, communication and teamwork skills"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_b536cc5b-c88"},"title":"Analog IC Design Engineer","description":"We are seeking an experienced Analog IC Design Engineer to join our team. As an Analog IC Design Engineer, you will be responsible for designing and developing cutting-edge semiconductor solutions. You will work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_b536cc5b-c88","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ottawa/analog-ic-design-engineer-14913/44408/91106519536","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","SERDES transceiver architectures","high-speed analog circuits"],"x-skills-preferred":["transistor-level CMOS design","SPICE simulators","scripting languages"],"datePosted":"2026-03-06T07:26:19.092Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ottawa"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, SERDES transceiver architectures, high-speed analog circuits, transistor-level CMOS design, SPICE simulators, scripting languages"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_388fc596-762"},"title":"R&D Engineering, Staff Engineer in Da Nang or Ho Chi Minh City","description":"Opening. This role is a key contributor to the development of high-performance memory IP solutions.
\nWhat you'll do
\nDesigning and verifying embedded memory compilers for advanced nodes. Collaborating with layout, methodology, and testchip teams to solve technical issues. Optimizing memory architectures for performance and efficiency. Using spice simulators for circuit validation. Communicating technical updates effectively.
\nWhat you need
\nWhy this matters
\nAccelerate delivery of high-performance memory IP. Drive innovation in Foundation IP Group projects. Enable cutting-edge chip designs for global clients. Support team collaboration and technical excellence.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_388fc596-762","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/da-nang/r-and-d-engineering-staff-engineer-in-da-nang-or-ho-chi-minh-city/44408/91617487472","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["embedded memory design","FinFET/advanced technologies","spice simulators","schematic architecture","technical communication"],"x-skills-preferred":["team collaboration","technical expertise"],"datePosted":"2026-02-11T16:13:30.689Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Da Nang"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"embedded memory design, FinFET/advanced technologies, spice simulators, schematic architecture, technical communication, team collaboration, technical expertise"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_83f45538-d2c"},"title":"Analog Design, Sr Staff Engineer","description":"Opening. This role is responsible for driving innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions. The successful candidate will be a seasoned analog design professional with a passion for pushing technology boundaries.
\nWhat you'll do
\nReview SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.
\nInvestigate and architect circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.
\nCollaborate with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.
\nOversee and guide the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.
\nPresent and review simulation data with internal teams and external stakeholders, including industry panels and customer reviews.
\nDocument design features, test plans, and results, and consult on electrical characterization and post-silicon analysis for product enhancements.
\nAnalyze customer silicon data to identify design improvement opportunities and propose solutions for post-silicon updates.
\nWhat you need
\nMTech/MS with 7+ years or BTech/BS with 8+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).
\nProven expertise with FinFET technologies and CMOS tape-outs.
\nDeep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.
\nExtensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).
\nSkilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.
\nFamiliarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).
\nProficient with schematic entry, physical layout, design verification tools, and SPICE simulators.
\nExperience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.
\nUnderstanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).
\nExcellent communication and documentation skills.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_83f45538-d2c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/analog-design-sr-staff-engineer/44408/91089467936","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","FinFET technologies","CMOS tape-outs","Multi-Gbps high-speed designs","SERDES architectures","SERDES sub-circuits","analog/digital co-design","calibration","adaptation","timing handoff","ESD protection","custom digital design","design for reliability"],"x-skills-preferred":["scripting languages","schematic entry","physical layout","design verification tools","SPICE simulators"],"datePosted":"2026-01-28T15:10:19.833Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, FinFET technologies, CMOS tape-outs, Multi-Gbps high-speed designs, SERDES architectures, SERDES sub-circuits, analog/digital co-design, calibration, adaptation, timing handoff, ESD protection, custom digital design, design for reliability, scripting languages, schematic entry, physical layout, design verification tools, SPICE simulators"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_aed36d8a-c98"},"title":"Senior Staff Field Application Engineer","description":"Opening.
\nWhat you'll do
\nYou will serve as the primary technical interface for strategic customers leveraging PrimeLib for advanced library characterization and modeling. You will provide expert guidance on integrating PrimeLib into diverse EDA flows, ensuring optimal performance and accuracy.
\nWhat you need
\nWhy this matters
\nAccelerate customer adoption and success with PrimeLib, directly influencing the design of next-generation semiconductor products.
\nWhat you’ll be doing
\nThe Impact You Will Have
\nWhat You’ll Need
\nThe Team You’ll Be A Part Of
\nYou will join a dynamic, high-impact Customer Application Services team focused on enabling customer success with Synopsys’ PrimeLib product. Our team works closely with R&D, product management, and global customers to deliver technical excellence, foster innovation, and drive the adoption of industry-leading library characterization solutions.
\nRewards and Benefits
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_aed36d8a-c98","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/zapopan/senior-staff-field-application-engineer/44408/90581151904","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["BS/MS in Electrical Engineering, Computer Engineering, or a related field","8+ years of experience in semiconductor design, library characterization, or EDA application engineering","Strong background in timing, power, variation, and signal integrity analysis for standard cell libraries","Hands-on expertise with characterization tools such as PrimeLib, Liberate, or SiliconSmart, and SPICE simulators","Advanced scripting skills (Python, Perl, TCL) for automation and flow customization","Familiarity with advanced process technologies, variation modeling, and Liberty format (including LVF/CCS/CCSN/CCSP models)","Excellent verbal and written communication skills"],"x-skills-preferred":["Leadership","Collaboration","Problem-solving","Communication","Technical expertise"],"datePosted":"2026-01-21T15:06:18.837Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Zapopan, Jalisco, Mexico"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"BS/MS in Electrical Engineering, Computer Engineering, or a related field, 8+ years of experience in semiconductor design, library characterization, or EDA application engineering, Strong background in timing, power, variation, and signal integrity analysis for standard cell libraries, Hands-on expertise with characterization tools such as PrimeLib, Liberate, or SiliconSmart, and SPICE simulators, Advanced scripting skills (Python, Perl, TCL) for automation and flow customization, Familiarity with advanced process technologies, variation modeling, and Liberty format (including LVF/CCS/CCSN/CCSP models), Excellent verbal and written communication skills, Leadership, Collaboration, Problem-solving, Communication, Technical expertise"}]}