To be successful in this role, you should have a strong background in vehicle technology, mechanical engineering, mechatronics, electrical engineering, or a related field. You should also have basic knowledge of system modeling, control engineering, or signal processing. Analytical, structured, and independent work habits are essential, as well as an interest in technical and scientific questions. Additionally, you should have experience with model building and system analysis, as well as knowledge of regulation and observer theory (foundations).

As a part-time student assistant, you will work approximately 20 hours per week during the semester. You will be integrated into our team and contribute to the development of innovative solutions. We offer a dynamic and supportive work environment, with opportunities for professional growth and development.

If you are a motivated and detail-oriented individual with a passion for technical work, we encourage you to apply for this exciting opportunity.

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The thesis involves examining the following aspects:

• Which physical quantities are suitable for drawing conclusions about the friction behavior?
• To what extent are filter and observer approaches theoretically suitable?
• What disturbance and influencing factors limit the validity of such procedures?

The thesis includes:

• Research and categorization of the state of the art in friction evaluation and model-based system analysis
• Derivation of a simplified physical model for friction calculation
• Investigation of suitable filter and observer concepts from a control engineering perspective
• Qualitative evaluation of the results using simulation
• Discussion of the findings and derivation of conclusions for possible further development at the conceptual level

The concrete methodological design will be carried out in the course of the work in close coordination with the academic supervisor.

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Honda has a clear vision for the future, and it’s a joyful one. We are looking for individuals with the skills, courage, persistence, and dreams that will help us reach our future-focused goals. At our core is innovation. Honda is constantly innovating and developing solutions to drive our business with record success.

We are looking for qualified individuals with diverse backgrounds, experiences, continuous improvement values, and a strong work ethic to join our team.

If your goals and values align with Honda’s, we want you to join our team to Bring the Future!

JOB PURPOSE:

The HILS Application Engineer III is responsible for the design, assembly, validation, and test deployment of HILS (Hardware-in-the-Loop Simulation) systems to support vehicle embedded software development.

KEY ACCOUNTABILITIES:

Creates and maintains software validation test plans to ensure complete coverage of test requirements by a given project development milestone. Responsible for the complete design of a HIL Simulator which includes simulator hardware selection, plant model specification and programming, I/O channel selection, and simulator/controller harness design. Prepares test automation scripts to meet testing requirements from the system function team. Accurately reports test results and conditions so that correct system judgments may be made. Documents test conduct and results, problems and resolutions and results of investigations in an established database. Coordinates the strategy to design, purchase, and deploy new HILS systems with the Global Engineering Center and System Suppliers Collects, implements, and maintains prototype control software and physical system models from related function groups.

QUALIFICATIONS, EXPERIENCE, & SKILLS:

Minimum Educational Qualifications:

A Bachelor's or equivalent degree / diploma in Mathematics / Computer Science / Electrical or Electronics Engineering or, Software Engineering or equivalent relevant work experience.

Minimum work experience:

3 or more years of relevant experience in the industry.

Required qualifying skills:

Must have strong demonstrable skills in Matlab / Simulink, in the control field. Working knowledge of embedded control (real-time), simulators and software. Acceptable platforms are dSPACE, National Instruments, Vector, and/or OEM Proprietary Tools A working knowledge of electrical and signal measurement tools and software. Working knowledge of vehicle systems and networks. Python programming skills.

Other Job-Specific Skills:

Strong quantitative/analytical problem-solving skills are required. Working knowledge of system modelling using CAE (Computer Aided Engineering) and analysis Ability to work effectively with team members and with peers across the organization. Decision-making skills, able to make sound decisions on mildly complex matters. Ability to multi-task and work with minimal supervision. Effective communication skills (written, verbal and presentation) Ability to manage time effectively and productively Can clarify and confirm understanding with Team Leaders and staff

Workstyle:

Must be able to work onsite at our Auto Development Center (ADC), in Raymond, OH. One remote workday a week may be possible with prior departmental approval.

What differentiates Honda and make us an employer of choice?

Total Rewards:

Competitive Base Salary (pay will be based on several variables that include, but not limited to geographic location, work experience, etc.) Paid Overtime Regional Bonus (when applicable) Industry-leading Benefit Plans (Medical, Dental, Vision, Rx) Paid time off, including vacation, holidays, shutdown Company Paid Short-Term and Long-Term Disability 401K Plan with company match + additional contribution Relocation assistance (if eligible)

Career Growth:

Advancement Opportunities Career Mobility Education Reimbursement for Continued Learning Training and Development programs

Additional Offerings:

Tuition Assistance & Student Loan Repayment Lifestyle Account Childcare Reimbursement Account Elder Care Support Wellbeing Program Community Service and Engagement Programs Product Programs

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The successful candidate will be responsible for defining active EO/IR system architectures, performing radiometric performance modeling, and laboratory, ground, and flight testing. They will also model atmospheric and environmental effects for land, sea, and air targets, and leverage their analyses to inform system-level architectural trades.

Key responsibilities include:

• Defining system architectures via detailed trade studies and analyses
• Adapting or deriving physics-based models of sensor system performance and deriving requirements based on those models
• Taking ownership over the development of prototype sensor systems in a lab environment
• Supporting both laboratory-based and field-based experiments and demonstrations
• Engaging technically with the hardware, software, and mission teams to define, integrate, and deliver high-performance systems to our customers
• Validating models against laboratory and real-world data
• Coordinating and communicating with both external & internal stakeholders with varying degrees of technical background

Required qualifications include:

• Model development and validation in one or more domains relevant to remote sensing
• Ability to decompose complex systems into functional parts, with clearly defined interfaces and requirements for each
• Experience in system design and development from initial concept through test and delivery to customer
• Strong laboratory skills (rapid prototyping, design of experiments) and familiarity with opto-electrical test and measurement equipment
• Willingness to travel to test sites, as needed
• Must be able to obtain and hold a U.S. security clearance

Preferred qualifications include:

• Knowledge of current and next-generation advanced sensing systems and platforms
• Active and passive sensing domain experience (e.g., LiDAR, EO/IR, Radar)
• Experience with laser systems, including opto-mechanical scanning and beam steering techniques
• Knowledge of electro-mechanical control systems, including their performance requirements and verification methodologies
• Experience with LiDAR/Radar signal processing techniques, and knowledge of their implementation on real-time embedded platforms (FPGA, MCU, etc.)
• Experience with signature and/or scenario modeling/software packages (MODTRAN, SPIRITS, AFSIM)

Salary: $166,000 - $220,000 USD per year, plus highly competitive equity grants and top-tier benefits for full-time employees, including comprehensive medical, dental, and vision plans, income protection, generous time off, family planning and parenting support, mental health resources, professional development, commuter benefits, relocation assistance, and a retirement savings plan.

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Your responsibilities will include:

Architecting and owning the ML foundations for commerce discovery: user, item, and interaction embeddings that power personalized recommendations across shop surfaces (homepage, cart, post-purchase, wishlist, and more).

Designing and deploying scalable real-time recommendation and ranking systems that support a growing catalog of 1P and 3P items across heterogeneous game publisher inventories.

Building ML-powered marketing targeting systems that identify the right users for the right campaigns , new buyer discounts, drop campaigns, weekly deals, and seasonal promotions , driving conversion without conditioning users to wait for discounts.

Leveraging Discord's unique social graph to build social commerce ML: gifting recipient prediction, group buying conversion modeling, and friend-group recommendations that differentiate Discord from traditional game storefronts.

Driving deep learning A/B testing infrastructure and model monitoring to translate experimentation results into actionable product decisions.

Partnering closely with Shop, Game Commerce, Revenue Infra, ML Infra, and Data Engineering teams to define ML requirements, surface integration points, and influence the commerce roadmap.

To be successful in this role, you will need:

4+ years of experience as a Machine Learning Engineer, with a track record of owning and shipping recommendation or personalization systems end-to-end.

Deep expertise in applied deep learning , particularly embedding models, two-tower architectures, and retrieval/ranking systems for e-commerce or content recommendation.

Strong proficiency in Python and deep learning frameworks (PyTorch preferred).

Experience building and operating real-time ML serving infrastructure at scale, including feature stores, model serving, and A/B testing frameworks.

Demonstrated ability to work in early-stage, high-ambiguity environments and build ML systems from the ground up, not just improve existing ones.

Experience translating ML evaluation metrics and experiment results into product roadmap decisions and business impact.

Strong cross-functional instincts , you're comfortable partnering with product, engineering, data science, and business stakeholders to align on priorities and drive execution.

Bonus skills include experience applying graph ML or social network signals (social affinities, community behavior) to recommendation or personalization problems, familiarity with personalized marketing systems: lifecycle targeting, audience segmentation, and campaign optimization, and familiarity with loyalty, rewards, or incentive programs.

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Anthropic is seeking talented and experienced Software Engineers to join our Observability team within the Infrastructure organization. The Observability team owns the monitoring and telemetry infrastructure that every engineer and researcher at Anthropic depends on,from metrics and logging pipelines to distributed tracing, error analytics, alerting, and the dashboards and query interfaces that make it all actionable.

As Anthropic scales its infrastructure across massive GPU, TPU, and Trainium clusters, the volume and complexity of operational data is growing by orders of magnitude. We’re building next-generation observability systems,high-throughput ingest pipelines, cost-efficient columnar storage, unified query layers across signals, and agentic diagnostic tools,to ensure that engineers can detect, diagnose, and resolve issues in minutes rather than hours, even as the systems they operate become exponentially more complex.

Responsibilities

• Design and build scalable telemetry ingest and storage pipelines for metrics, logs, traces, and error data across Anthropic’s multi-cluster infrastructure

• Own and evolve core observability platforms, driving migrations and architectural improvements that improve reliability, reduce cost, and scale with organisational growth

• Build instrumentation libraries, SDKs, and integrations that make it easy for engineering teams to emit high-quality telemetry from their services

• Drive alerting and SLO infrastructure that enables teams to define, monitor, and respond to reliability targets with minimal noise

• Reduce mean time to detection and resolution by building cross-signal correlation, unified query interfaces, and AI-assisted diagnostic tooling

• Partner with Research, Inference, Product, and Infrastructure teams to ensure observability solutions meet the unique needs of each organisation

You May Be a Good Fit If You

• Have 10+ years of relevant industry experience building and operating large-scale observability or monitoring infrastructure

• Have deep experience with at least one observability signal area (metrics, logging, tracing, or error analytics) and familiarity with the others

• Understand high-throughput data pipelines, columnar storage engines, and the tradeoffs involved in ingesting and querying telemetry data at scale

• Have experience operating or building on top of observability platforms such as Prometheus, Grafana, ClickHouse, OpenTelemetry, or similar systems

• Have strong proficiency in at least one of Python, Rust, or Go

• Have excellent communication skills and enjoy partnering with internal teams to improve their operational visibility and incident response capabilities

• Are excited about building foundational infrastructure and are comfortable working independently on ambiguous, high-impact technical challenges

Strong Candidates May Also Have

• Experience operating metrics systems at very high cardinality (hundreds of millions of active time series or more)

• Experience with log storage migrations or operating columnar databases (ClickHouse, BigQuery, or similar) for analytics workloads

• Experience with OpenTelemetry instrumentation, collector pipelines, and tail-based sampling strategies

• Experience building or operating alerting platforms, on-call tooling, or SLO frameworks at scale

• Experience with Kubernetes-native monitoring, eBPF-based observability, or continuous profiling

• Interest in applying AI/LLMs to operational workflows such as automated root cause analysis, anomaly detection, or intelligent alerting

Logistics

• Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

• Required field of study: A field relevant to the role as demonstrated through coursework, training, or professional experience

• Minimum years of experience: Years of experience required will correlate with the internal job level requirements for the position

• Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.

• Visa sponsorship: We do sponsor visas! However, we aren’t able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

How we're different

We believe that the highest-impact AI research will be big science. At Anthropic we work as a single cohesive team on just a few large-scale research efforts. And we value impact , advancing our long-term goals of steerable, trustworthy AI , rather than work on smaller and more specific puzzles. We view AI research as an empirical science, which has as much in common with physics and biology as with traditional efforts in computer science. We’re an extremely collaborative group, and we host frequent research discussions to ensure that we are pursuing the highest-impact work at any given time. As such, we greatly value communication skills.

Come work with us!

Anthropic is a public benefit corporation headquartered in San Francisco. We offer competitive compensation and benefits, optional equity donation matching, generous vacation and parental leave, flexible working hours, and a lovely office space in which to collaborate with colleagues.

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At Gusto, we're on a mission to grow the small business economy. We handle the hard stuff , payroll, health insurance, 401(k)s, and HR , so owners can focus on their craft and their customers.

With teams in Denver, San Francisco, and New York, we support more than 400,000 small businesses nationwide and are building a workplace that reflects the people we serve.

All full-time employees receive competitive base pay, benefits, and equity (RSUs) , because everyone who helps build Gusto should share in its success. Offer amounts are determined by role, level, and location. Learn more about our Total Rewards philosophy.

AI is a fundamental part of how work gets done at Gusto. We expect all team members to actively engage with AI tools relevant to their role and grow their fluency as the technology evolves. AI experience requirements vary by role and will be assessed during the interview process.

About the Role:

Gusto is looking for a builder to take on the role of Head of AI-Native Talent Systems as we rethink how people grow in an AI-native company. This role is about designing the systems that shape growth day to day. Not courses. Not programs. The actual mechanics of work. Onboarding, feedback, performance reviews, promotion decisions, and leadership expectations should all help people get better by default, without needing special events or extra effort.

You will be responsible for building new architecture and tearing down what no longer serves us. AI will be a core part of how you do this, not as a concept, but as a practical tool for reflection, coaching, skill building, and clarity. The goal is simple but hard: make growth obvious, continuous, and hard to avoid.

This is a role for someone who wants to build something durable, test it in the real world, and keep improving it. If it works, others will copy it. If it doesn’t, you’ll learn fast and fix it.

About the Team:

The Talent Development team sits within the Gustie Engagement Team, with a shared purpose: to help Gusties write the best chapters of their careers. We do this by designing the conditions that create clarity, connection, and commitment across the employee journey, not through programs, but through how work actually happens.

Here’s what you’ll do day-to-day:

• Own the Gustie growth system at Gusto, from onboarding through executive leadership, with AI embedded at its core

• Redesign moments like feedback, performance reviews, and promotion decisions so AI actively helps people reflect, learn, and improve in real time

• Treat AI as a design partner in growth, deciding deliberately where it should lead, where it should support, and where humans stay firmly in charge

• Build development directly into the flow of work, with AI reducing friction, surfacing insights, and prompting better decisions

• Prototype, test, and ship AI-enabled changes that meaningfully improve how people grow here

• Define new AI-native standards for leadership development, coaching, and skill building

• Create feedback loops and signals, powered by AI, that make growth, readiness, and leadership effectiveness visible as the company evolves

• Continuously revisit what belongs in code, what belongs in judgment, and how the boundary should shift over time

Here’s what we're looking for:

• You’ve built something that changed how people actually worked. It might have been called talent, product, systems, or something else entirely, but it moved behavior, not just decks.

• You believe the walls are hollow and you don’t assume systems are fixed just because they look finished. You get impatient with patchwork solutions and prefer fixing the system instead.

• You’re comfortable starting without a playbook and writing one as you go.

• You already use AI as part of how you think and work, not as a talking point or side project.

• You can hold a long-term point of view while shipping fast and putting real things into the world.

• You have strong opinions about what good looks like, and you’re willing to change them when reality disagrees.

• You care deeply about how people grow, especially when things are changing quickly or breaking in interesting ways.

People who fit this role often have 10–12 years of relevant experience, but we care far more about what you’ve built than how your resume is labeled.

What does success look like?

A year into this role, growth at Gusto is no longer something people are asked to manage on top of their jobs. It is something the company’s systems quietly and consistently do. The everyday work of the company generates signal by default. Decisions, docs, code, customer interactions, feedback, and leadership moments all leave usable traces. Those signals are captured and interpreted as work happens, then reflected back in ways that help people see patterns, progress, and gaps without needing to reconstruct the past or advocate for themselves.

Growth becomes legible. Learning is no longer organized around classes, curricula, or moments on a calendar. Instead, it exists as an always-on environment woven into how work gets done. People can quickly see examples of strong judgment, understand what “good” looks like in context, and explore how similar problems have been solved before.

AI makes this possible at scale by synthesizing real examples, answering questions in the moment, connecting people to relevant expertise, and turning individual insight into shared capability.

Over time, development feels less like an intervention and more like a natural byproduct of doing the work. People pull what they need when they need it. Leaders spend less time explaining expectations and more time reinforcing them.

The system improves with use, because every interaction adds clarity rather than noise. Importantly, the system has a point of view. It creates gentle pressure in the right places and removes friction in the wrong ones. It makes certain behaviors easier, others harder, and does so through design rather than persuasion.

Standards become clear not because they are stated repeatedly, but because the environment reinforces them.

At that point, this work no longer resembles traditional Talent Development or Performance Management. It looks like core infrastructure for a company that expects to keep changing, and expects its people to keep pace not through heroics, but through design.

Our cash compensation amount for this role is $150,000 /year to $180,000 /year in Denver & most major metro locations, and $177,000/year to $210,000 /year for San Francisco & New York. Final offer amounts are determined by multiple factors including candidate location, experience and expertise and may vary from the amounts listed above.

Gusto has physical office spaces in Denver, San Francisco, and New York City. Employees who are based in those locations will be expected to work from the office on designated days approximately 2-3 days per week (or more depending on role). The same office expectations apply to all Symmetry roles, Gusto's subsidiary, whose physical office is in Scottsdale.

Note: The San Francisco office expectations encompass both the San Francisco and San Jose metro areas. When approved to work from a location other than a Gusto office, a secure, reliable, and consistent internet connection is required. This includes non-office days for hybrid employees.

Our customers come from all walks of life and so do we. We hire great people from a wide variety of backgrounds, not just because it's the right thing to do, but because it makes our company stronger. If you share our values and our enthusiasm for small businesses, you will find a home at Gusto.

Gusto is proud to be an equal opportunity employer. We do not discriminate in hiring or any employment decision based

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Key responsibilities include:

• Collaborating with a multidisciplinary team of software and hardware engineers to develop software defined radios;
• Implementing high-performance, real-time signal processing chains on embedded and hardware platforms to support mission-critical sensing capabilities;
• Developing Modeling and Simulation (M&S) code for RADAR techniques and data analysis including Hardware-in-the Loop / Software-in-the-loop (HIL/SIL) testing;
• Participating in laboratory and field testing of RF systems and techniques;
• Participating in the maturation of RF systems into deployable systems and products.

Required qualifications include:

• 5+ years of experience with a BSEE or related field;
• Strong foundation in digital signal processing, comms theory, and system engineering with emphasis in direction finding algorithm implementation;
• Hands-on experience with direction finding, angle-of-arrival estimation, and multi-antenna signal processing;
• Strong experience with DSP implementation for embedded devices including FPGA, Nvidia Jetson, and Software Defined Radios and/or software defined radios;
• Strong knowledge of Python and MATLAB;
• Experience with CUDA or GPU accelerated frameworks like cuSignal is preferred;
• Familiar with deep learning algorithms;
• Familiar with wireless communication standards (Bluetooth, 3G/4G/5G, Wi-Fi, SINCGARS, MUOS, etc.).

Preferred qualifications include:

• Masters or PhD degree in Electrical, Electronics, Computer Engineering, or related fields;
• Experience with ML frameworks such as TensorFlow and PyTorch;
• Defense, national security, or aerospace domain familiarity through industry or education;
• Extensive Digital Signal Processing (DSP) knowledge and experience;
• Expertise in Synthetic Aperture Radar (SAR) and/or Inverse SAR (ISAR): Image formation, waveforms, phenomenology, modeling and simulation.

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Your key responsibilities will include investigating, planning, designing and developing harnesses to meet various technical requirements, researching and selecting appropriate connectors, back-shells, contacts, wire, shielding, and cable construction for the product to meet appropriate environmental requirements, developing and generating harness system block diagrams and wire diagrams to release for production, participating in design reviews and providing input to identify issues and drive design choices, preparing harness assembly instructions and test procedures, incorporating your knowledge of industry standards and best practices, and providing guidance to the electrical team in identifying electrical system requirements given input from internal and external stakeholders including engineering (mechanical, electrical, software), product management, quality and compliance.

You will work in a fast-paced environment supporting new developments, active deployments, and customer-operated hardware, and concurrently manage involvement in multiple projects at various stages.

To be successful in this role, you will need to have a Bachelor's Degree in Electrical Engineering, Mechanical Engineering, or equivalent, and 3+ years hands-on experience designing electrical harnessing for rugged commercial, industrial, aerospace, or military applications, experience working directly with harness manufacturers to deliver high-quality, high-reliability products, and ownership of end-to-end of the electrical wiring and interconnect system, including power distribution, grounding, shielding, and signal integrity.

You will also need to ensure the design meets system-level electrical requirements for voltage, current, bandwidth, redundancy, EMI/EMC, perform electrical trade studies for wire gauge, shielding, connector selection, and topology, analyze and mitigate electrical risks such as voltage drop, crosstalk, EMI susceptibility, and thermal effects, familiarity with common electrical bus interfaces (CAN, Ethernet, RS422, RS232, 1553), familiarity with existing applicable harness standards as well as MIL-STD requirements, ability to apply knowledge of SWaP for power, network, and communications systems and designs, experience reading wire block interconnect diagrams and wire diagrams, and exceptional organization and communication skills (both written and oral).

Preferred qualifications include building 3D routed harness data files applying NX Cabling and Siemens Capital Harness, experience with or proficiency in 3D CAD wire harness routing, such as (NX, Siemens Capital, CATIA, CREO), ability to read and generate formboard drawings in 2D CAD for production, EMI/EMC principles, and common electrical bus interfaces (CAN, Ethernet, RS-422, RS-232, MIL-STD-1553).

The salary range for this role is $98,000-$171,000 USD, and highly competitive equity grants are included in the majority of full-time offers.

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Responsibilities:

• Oversee the design, installation, configuration, and integration of AV systems.
• Perform hands-on setup, operation, troubleshooting, and maintenance of AV equipment for live events, meetings, and presentations.
• Plan and support events ranging from 300+ person internal/external events to small team meetings.
• Act as the primary escalation point for complex technical issues, ensuring minimal downtime and quick resolution.
• Collaborate with clients, event planners, IT teams, and vendors to assess needs, plan layouts, and execute AV setups for small to large-scale events.
• Develop and maintain documentation, including maintenance schedules, troubleshooting guides, inventory tracking, and system diagrams.
• Ensure compliance with safety standards, company policies, and industry best practices during installations and operations.
• Manage project timelines, budgets (for small projects), and resource allocation while maintaining profitability and quality.
• Stay current with emerging AV technologies and recommend upgrades or improvements
• Provide exceptional customer service, including on-site support and post-event debriefs

Basic Qualifications:

• Associate's or Bachelor's degree in Audio Visual Technology, Electronics, Information Technology, or a related field preferred (or equivalent experience).
• 5+ years in audio-visual technical roles, with at least 2 years in a lead, senior, or supervisory position. Experience in corporate, educational, or event environments is a plus.
• CTS (Certified Technology Specialist) from AVIXA strongly preferred; additional certifications like Crestron, Extron, Dante, or Biamp are highly desirable.
• Proficiency with AV control systems (Crestron, AMX, Extron), video conferencing (Zoom, Microsoft Teams, Cisco Webex), digital signal processing (DSP), and networking basics.
• Strong knowledge of audio/video signal flow, cabling, rigging, lighting, and projection systems.
• Experience with live event production, including mixing boards, cameras, and streaming.
• Excellent leadership, communication, and problem-solving abilities; ability to work under pressure and manage multiple priorities. Strong customer service orientation and team collaboration.
• Physical Requirements: Ability to lift heavy equipment (up to 50 lbs), climb ladders, and work in varied environments (including evenings/weekends for events). Valid driver's license may be required

Additional Requirements:

• Must be physically fit enough to regularly lift up to 30 lbs. for duties such as delivering computers, unpacking and rack-mounting equipment, etc.
• Must be willing to work extended hours and weekends as needed.
• Must be willing to travel

Compensation and Benefits: $115,000 - $145,000 Base salary is just one part of our total rewards package at xAI, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

ITAR Requirements: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

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Key responsibilities include:

• Developing high-performance, high-efficiency, and highly robust avionics solutions for air vehicle platforms
• Developing reliable on-board communication systems to exchange high-bandwidth data across various air and ground assets
• Architecting, designing, and building high-speed digital PCBAs (schematic capture, simulation, board layout)
• Helping decide what to do in-house and what to outsource, communicating design requirements with external vendors and helping drive the progress
• Developing relationships with external vendors and communicating design requirements to external vendors and suppliers
• Working cross-functionally between software, firmware, and hardware teams
• Developing hardware validation test plans for sub-system and full system products

Requirements include:

• Bachelor's degree in Electrical Engineering, or a closely related field
• 8+ years relevant experience in electrical hardware design
• Experience designing high-density PCB layouts with an understanding of cutting-edge PCB manufacturing technology
• Deep understanding of thermal, mechanical, power, and performance tradeoffs
• Experience with creating test plans, benchmarking, and performing validation tests to determine performance of complex hardware systems
• Understanding of high-speed interfaces (PCIe, DDR, USB, MIPI, etc.), power integrity, and signal integrity
• Knowledgeable of EMI/EMC susceptibility and emissions along with mitigation experience
• Eligible to obtain and maintain an active U.S. Secret security clearance

Preferred qualifications include:

• Experience with high-performance SOMs (System On a Module)
• Experience in developing FPGA and ASIC architectures
• Experience with rapid, hands-on prototyping
• Skilled at soldering and reworking microelectronic components
• Knowledgeable in RF investigation and analysis with the use of specialized equipment (Spectrum analyzer, Network Analyzer, etc.) and RF simulation tool suites
• Knowledge of state-of-the-art hardware systems, software tools, and algorithms for interfaces required for sensors, actuators, firmware development, and inter-communication bus protocols (CAN-FD, Ethernet, SFP, 1553, etc.)
• Experience using Linux command line interface (CLI)

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As Anthropic scales its infrastructure across massive GPU, TPU, and Trainium clusters, the volume and complexity of operational data is growing by orders of magnitude. We're building next-generation observability systems,high-throughput ingest pipelines, cost-efficient columnar storage, unified query layers across signals, and agentic diagnostic tools,to ensure that engineers can detect, diagnose, and resolve issues in minutes rather than hours, even as the systems they operate become exponentially more complex.

Responsibilities:

• Design and build scalable telemetry ingest and storage pipelines for metrics, logs, traces, and error data across Anthropic's multi-cluster infrastructure
• Own and evolve core observability platforms, driving migrations and architectural improvements that improve reliability, reduce cost, and scale with organisational growth
• Build instrumentation libraries, SDKs, and integrations that make it easy for engineering teams to emit high-quality telemetry from their services
• Drive alerting and SLO infrastructure that enables teams to define, monitor, and respond to reliability targets with minimal noise
• Reduce mean time to detection and resolution by building cross-signal correlation, unified query interfaces, and AI-assisted diagnostic tooling
• Partner with Research, Inference, Product, and Infrastructure teams to ensure observability solutions meet the unique needs of each organisation

You May Be a Good Fit If You:

• Have 10+ years of relevant industry experience building and operating large-scale observability or monitoring infrastructure
• Have deep experience with at least one observability signal area (metrics, logging, tracing, or error analytics) and familiarity with the others
• Understand high-throughput data pipelines, columnar storage engines, and the tradeoffs involved in ingesting and querying telemetry data at scale
• Have experience operating or building on top of observability platforms such as Prometheus, Grafana, ClickHouse, OpenTelemetry, or similar systems
• Have strong proficiency in at least one of Python, Rust, or Go
• Have excellent communication skills and enjoy partnering with internal teams to improve their operational visibility and incident response capabilities
• Are excited about building foundational infrastructure and are comfortable working independently on ambiguous, high-impact technical challenges

Strong Candidates May Also Have:

• Experience operating metrics systems at very high cardinality (hundreds of millions of active time series or more)
• Experience with log storage migrations or operating columnar databases (ClickHouse, BigQuery, or similar) for analytics workloads
• Experience with OpenTelemetry instrumentation, collector pipelines, and tail-based sampling strategies
• Experience building or operating alerting platforms, on-call tooling, or SLO frameworks at scale
• Experience with Kubernetes-native monitoring, eBPF-based observability, or continuous profiling
• Interest in applying AI/LLMs to operational workflows such as automated root cause analysis, anomaly detection, or intelligent alerting

The annual compensation range for this role is $405,000-$485,000 USD.

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The Head of Programmatic Outcomes (Product) shapes the product-led growth strategy, in-product activation design, and adoption loops that reach every knowledge worker , not account by account, but at population scale , in deep partnership with Anthropic’s Product, Growth Marketing, and Strategy functions.

This role sits at the intersection of Product, CS, Growth Marketing, and Strategy , and succeeds by leveraging what each of those teams already does well. You drive the activation playbook the entire Success function executes, co-design the in-product onboarding sequences that convert seat activation into habitual use, and partner alongside Product Engineering and the Systems capability leads to drive high fidelity feedback between users and builders.

The mandate is to make Claude products so easy to adopt that knowledge workers build habits around them , then codify the plays so they scale beyond what any account team could achieve alone. Success comes through influence and coordination across functions, filling genuine gaps.

Responsibilities:

• Drive the PLG activation strategy across Claude Teams, Claude for Enterprise, Claude Code, and API , partnering with Product PMs and Growth Marketing to define plays that drive adoption from first login to habitual daily use

• Co-design onboarding sequences, in-product nudges, and activation milestones with Product , then codify them so the Customer Success team and partners execute at scale

• Partner with Product and Strategy to define which usage signals indicate healthy vs. at-risk accounts and trigger the right human or automated interventions

• Partner closely with Product PMs to ensure the activation motion is built into the product, not bolted on , serving as the dedicated GTM voice advocating for UX patterns and enablement features that reduce time-to-value, and reducing duplication between Product-owned onboarding and CS-owned playbooks

• Develop and test hypothesis-driven activation plays across specific knowledge-worker use cases (Finance, Legal, HR, exec workflows) , codifying what converts at scale

• Hold the connective tissue across the Partners and Growth Marketing capability leads to ensure PLG motions are product-anchored, not just relationship-driven or campaign-driven , this leader is the integration point, not a parallel function

• Establish adoption benchmarks, population-level penetration metrics, and health indicators the programmatic team uses to track progress on the knowledge-worker gap

• Feed product activation learnings back into the Success motion , creating the intelligence loop between population-level data and account-level execution

You may be a good fit if you have:

• 8+ years in PLG, growth PM, product marketing, or CS strategy with direct ownership of activation or adoption metrics

• Experience designing and running product-led onboarding or activation programs at enterprise SaaS or AI companies , not just contributing to them

• Deep understanding of how product telemetry translates into adoption signals and how to trigger the right human and automated interventions

• Strong cross-functional fluency: you’ve worked embedded with Product teams while maintaining a GTM orientation and commercial accountability

• Track record of building programmatic motions that generate scale across a large customer base , not one-off account customizations

• Real perspective on what drives knowledge workers to build habits around new tools, backed by experience

Logistics

• Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

• Required field of study: A field relevant to the role as demonstrated through coursework, training, or professional experience

• Minimum years of experience: Years of experience required will correlate with the internal job level requirements for the position

• Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.

• Visa sponsorship: We do sponsor visas! However, we aren’t able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

How we’re different

We believe that the highest-impact AI research will be big science. At Anthropic we work as a single cohesive team on just a few large-scale research efforts. And we value impact , advancing our long-term goals of steerable, trustworthy AI , rather than work on smaller and more specific puzzles. We view AI research as an empirical science, which has as much in common with physics and biology as with traditional efforts in computer science. We’re an extremely collaborative group, and we host frequent research discussions to ensure that we are pursuing the highest-impact work at any given time. As such, we greatly value communication skills.

Come work with us!

Anthropic is a public benefit corporation headquartered in San Francisco. We offer competitive compensation and benefits, optional equity donation matching, generous vacation and parental leave, flexible working hours, and a lovely office space in which to collaborate with colleagues.

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Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes.

We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk.

As a Senior Technical Account Manager, you will focus exclusively on Workforce Identity, serving as a trusted technical advisor and advocate for some of our largest customers. You will focus on strategic account alignment and broad deployment strategies to drive lasting success through elevated technical maturity.

Key Workforce Identity Solutions You Will Support: The Okta Platform secures employees, contractors, and partners across every part of the Identity lifecycle, including governance, access, and privileged controls. Products include:

• Identity & Access Management (IAM): Single Sign-On (SSO), Adaptive MFA, Device Access, API Access Management, Secure Partner Access, Access Gateway, and Universal Directory.
• Identity Governance & Administration (IGA): Lifecycle Management and Identity Governance.
• Privileged Access Management (PAM): Privileged Access.
• Identity Threat Detection & Response (ITDR): Identity Security Posture Management and Identity Threat Protection.

What You'll Be Doing

Strategic Customer Partnership & Influence:

• Build deep, long-lasting relationships with customers as their go-to technical advisor.
• Earn Okta trusted advisor status with customer identity owners and technical leadership, known as the primary point of contact for technical leaders.
• Possess and masterfully apply comprehensive technical expertise to solve complex problems, design sophisticated solutions, and influence customer strategies.
• Collaborate with customers to design identity strategies aligned with their business objectives.
• Leverage tailored technical plans for success with a portfolio of customers of increasing size and complexity.
• Help find ways to build upon and expand customers' adoption of the Okta footprint through additional use cases and increasing security posture.
• Use knowledge of how Okta's product differentiators lead to positive outcomes for customers, securing the Okta footprint against competitive displacement.

Complex Problem Resolution & Advocacy:

• Demonstrate advanced problem-solving skills, capable of dissecting complex, multi-faceted problems and orchestrating effective solutions.
• Proactively identify risks and create mitigation plans, establishing actions, ownership, and driving resolutions.
• Able to handle most customer technical escalations independently, or collaboratively with the Customer Success Manager (CSM).
• Manage competing priorities with little impact on delivery, ensuring follow through on all activity.
• Demonstrate a strong ability to represent and advocate for the customer with cross-functional teams (including engineering and support), while supporting policies and decisions that are in the best interests of the company.
• Facilitate difficult discussions with senior stakeholders.

Thought Leadership & Team Enablement:

• Serve as a thought leader, providing best practices, workshops, and training.
• Generate specific vertical/use case insights and thought leadership, demonstrating an advanced level of Okta platform and identity domain knowledge, with a focus on enhancing customers' security posture.
• Generate higher value for customers and deeper TAM engagement through repeatable asset and strategy creation for the team.
• Mentor peers and colleagues, upskilling capability with a focus on technical development.
• Contribute to the development of adoption and retention strategies, sharing knowledge of customer patterns, and leading execution.
• Lead project tasks or initiatives aimed at improvement of TAM processes and knowledge.

What You'll Bring to the Role

• Requires 8+ years of related experience in a professional role, or equivalent experience (e.g., 6+ years with a Master’s degree).
• 3+ years of experience as a Technical Account Manager (TAM) or a comparable role such as Technical Consultant, Product Management, or Solution Architect.
• 3+ years in identity and access management, including SSO, MFA, lifecycle management, or security best practices.
• Education: BA/BS/MS in Computer Science, Information Technology or related discipline, or equivalent work experience required.
• Certifications: Okta Certified, CISSP, or equivalent.
• Technical Mastery (Workforce Identity Focus):
• Extensive proficiency utilizing Okta feature sets and platforms to portray a design, or architecture, that satisfies well-known customer use cases to a customer technical persona including architect.
• Able to modify existing quickstart or code samples to adapt them to the customer's requirements.
• Confident in assisting TAM peers on technical challenges, or on behalf of other TAMs customers.
• Solid understanding of one or more of the following key areas:
• Technologies and protocols to support identity federation and robust access control models (e.g., SAML 2.0, WS-Federation, OAuth, OpenID Connect).
• Experience dealing with legacy applications in a hybrid IT environment with non-standard applications (i.e., those that do not support modern identity federation protocols).
• SaaS deployment such as Salesforce, Box, Office 365, Workday, and HR as master for identities.
• Lifecycle management scenarios to 3rd party systems and applications (Workflows, HR-driven provisioning, MSFT integrations, SCIM, etc).
• Enterprise applications in the ecosystem to provide identity and attributes to applications or to harness an external application to help drive business processes (ITSM, HR, etc).
• Security and performance monitoring and 3rd party signals integrations (SEIM, MDM, WAF, etc).
• Awareness of augmentation of identity protocols and flows, capable of identifying augmentation that requires additional review.
• Communication and Leadership Skills:
• Excellent communication skills, capable of translating complex technical topics into actionable insights.
• Convey complex ideas in a compelling and easily understandable manner.
• Ability to set expectations and communicate goals and objectives with customers at various levels, up to CxO.
• Skilled in setting and enforcing appropriate boundaries with both internal and external stakeholders.
• Ability to track and influence customer behavior.

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Key responsibilities include:

• Developing and maintaining a detailed project and execution plan, including feature development, testing and validation, deployment, and monitoring.
• Establishing clear objectives and deliverables for the software that align with program needs.
• Maintaining a deep understanding of underlying algorithms and software interfaces for radar processing, target tracking, detection, classification, and sensor fusion to ensure that the relevant services integrate effectively with the larger system.
• Staying updated on the latest techniques to work with subject matter experts in incorporating relevant innovations into the project plan.
• Ensuring comprehensive documentation is maintained for the project, including technical specifications, user manuals, and project reports.
• Overseeing the planning and execution of the software release process, ensuring that deployment is carried out smoothly and efficiently.
• Serving as the primary point of contact for all project-related communications, internally across teams and externally with stakeholders.

The ideal candidate will have 5+ years of experience and a Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related technical field. They will also have extensive project management experience, preferably in software development for radar systems or advanced signal processing algorithms.

Salary: $111,000-$147,000 USD per year.

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In addition to a competitive salary, we offer a variety of benefits to support your needs, including medical, dental, and vision insurance, company-paid life insurance, voluntary supplemental life insurance, short and long-term disability insurance, flexible spending account, health savings account, tuition reimbursement, ability to participate in employee stock purchase program (ESPP), mental wellness benefits through Spring Health, family-forming support provided by Carrot, paid parental leave, flexible, full-service childcare support with Kinside, 401(k) with a generous employer match, flexible PTO, catered lunch each day in our office and data center locations, and a casual work environment.

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Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era.

We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work.

The Team

Technical Account Management (TAM) is a global team that owns Auth0 customer success within Okta’s broader Customer Success team. We collaborate with Auth0’s customers to share knowledge, and best practices and make recommendations to continuously innovate around identity and security.

As our customer’s strategic identity coaches, we are Auth0 product experts, and we enable Auth0's worldwide growth by educating existing customers and ensuring they are happy and successful.

We share our technical and product expertise with customers through presentations, demonstrations, technical evaluations, and ongoing recommendations on Auth0 and industry best practices.

The Opportunity

A TAM specializing in enterprise identity, including the Auth0 product and adjacent technologies. The TAM will provide Okta’s customers with strategic technical guidance over the comprehensive suite of products and features available at Okta.

They are held in high regard as a technical expert for how Okta’s solutions translate to business value. They are also held in high regard for their ability to understand the code that makes up identity authentication pipelines, Auth0, after all, is developer-friendly.

The TAM specialization calls for an understanding of hybrid scenarios that capitalize on Auth0’s ability to manage authentication, authorization, and lifecycle management capabilities for consumer SaaS, business-to-consumer (B2C), and general CIAM applications.

The opportunity is that as an Auth0 TAM you will get to guide some of the world's largest companies in their strategic identity journey at the same time as being an Auth0 champion!

What you’ll be doing

Fully own the account management function as an Auth0 TAM. This includes the business and the technical side

Advise customers on best practices and product adoption in a post-sales capacity

Be comfortable with a number of personas including but not limited to CISO, Product Owner, CMO, developers, etc., with an account portfolio of strategic accounts

Have a deep interest in the security space and where the industry is headed particularly from a CIAM perspective.

Earn customer trust by understanding their goals and use cases, and recommend best practices relating to process changes, product adoption, configuration, and additional features to meet requirements

Maintain focus on increasing subscription adoption, customer satisfaction, and retention

Review customer architectures and Auth0 configurations to ensure they are enhancing security posture and capturing ROI as Auth0 releases new features and functionality

Establish strong personal relationships on key accounts with decision-makers and stakeholders

Establish strong relationships internally, too as part of a larger collaborative team

Participate in content creation for both internal and external enablement of staff and customers

What you’ll bring to the role

7+ years of total experience in information technology, with at least 3 years of hands-on experience as a Technical Account Manager (TAM) or comparable practitioner role in the IAM space

Working proficiency in the following core IAM areas:

Technologies and protocols to support identity federation and robust access control models, including concepts such as SAML 2.0, WS-Federation, OAuth, OpenID Connect, etc.

Legacy applications in a hybrid IT environment with non-standard applications (i.e. those that do not support modern identity federation protocols)

Enterprise applications in the ecosystem to provide identity and attributes to applications or to harness an external application to help drive business processes (ITSM, HR, etc)

Consumer and/or SaaS application deployments

Security and performance monitoring, and 3rd party signals integrations (SEIM, MDM, WAF, etc)

Familiarity with IAM solution providers is strongly desired.

Strong background in any of the following: Technical Account Management, Technical Consulting, Product Management, Solution Architect, or a similar role

Understanding of common software development practices, including concepts such as SDLC, CI/CD, Containerization, etc.

Ability to code in Javascript

Understanding of identity and surrounding technologies, including concepts such as encryption, PKI, RSA, etc.

Strong business acumen, history of success owning enterprise segment customer relationships and escalations

Excellent communication skills. Ability to set expectations and communicate goals and objectives with customers at various levels, from a developer to a CISO

Ability to track and influence customer behavior and health metrics across a portfolio of accounts

This position will be located in London or Barcelona and will have some travel required (under 50% of the time)

BA/BS/MS or related discipline or equivalent work experience required

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The ideal candidate will have 7+ years of experience with a BSEE or related field, strong experience with DSP implementation for embedded devices and/or software defined radios, strong knowledge of Python and MATLAB, experience with CUDA or GPU accelerated frameworks like cuSignal, experience with embedded devices, including FPGA, Nvidia Jetson, and Software Defined Radios, skilled with Modeling and Simulation of RF systems including Radar and SAR, familiar with deep learning algorithms, experience with ML frameworks such as TensorFlow and PyTorch, familiar with wireless communication standards (Bluetooth, 3G/4G/5G, Wi-Fi, SINCGARS, MUOS, etc.), excellent at balancing multiple projects at any given time and/or managing a larger team for a larger program, enthusiastic about both working with a team and executing some work individually (depending on program scope), experience with Electronic Warfare systems, and currently possesses and is able to maintain an active U.S. Secret security clearance.

Preferred qualifications include a Master's or PhD degree in Electrical, Electronics, Computer Engineering, or related fields, defense, national security, or aerospace domain familiarity through industry or education, extensive Digital Signal Processing (DSP) knowledge and experience, expertise in Synthetic Aperture Radar (SAR) and/or Inverse SAR (ISAR): Image formation, waveforms, phenomenology, modeling and simulation.

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You'll operate at the intersection of live production, broadcast engineering, and internal tooling, ensuring our teams can communicate effectively at scale. In addition to running critical productions, you'll define the workflows, and standards that power internal media across offices and remote environments globally.

This is a highly cross-functional role requiring strong technical depth, operational excellence, and the ability to support a wide range of internal stakeholders.

Responsibilities

• Lead Internal Productions
• Own technical production for internal events including all-hands, executive communications, trainings, and internal broadcasts
• Serve as Technical Director or Lead Producer for high-visibility internal moments
• Ensure seamless delivery across in-room, livestream, and video conferencing audiences
• Build & Scale Internal Production Systems
• Design and standardize workflows across internal event spaces, studios, and remote setups
• Define and maintain a production playbook to ensure consistency across internal events
• Improve and scale internal production infrastructure to support global teams
• Operate at a Deep Technical Level
• Lead multi-destination signal workflows (In room, live stream, recording, conferencing platforms)
• Integrate AV systems with internal tools (e.g., video conferencing platforms, collaboration tools)
• Troubleshoot live production issues quickly with minimal disruption to internal audiences
• Partner Across the Company
• Work directly with internal stakeholders (Execs, Comms, HR, Enablement, Events) to define production needs
• Translate business requirements into clear, executable production plans
• Coordinate internal teams and external vendors when needed
• Elevate Internal Experience Quality
• Continuously improve the quality, reliability, and scalability of internal productions
• Create training materials and documentation to enable self-service and team growth
• Mentor team members and elevate production capabilities across offices

What We're Looking For

• Core Requirements
• 8+ years in live production, broadcast, or media production roles
• Strong expertise in:

+ Audio/video signal flow + Video switching / technical direction + Live streaming and remote production tools (e.g., VMix or similar) + Experience supporting distributed or multi-location production environments

• Strong communication skills, especially when working with non-technical stakeholders
• Experience operating in fast-paced, high-growth environments
• BA/BS or equivalent practical experience
• Staff-Level Signals
• You've supported executive-facing or high-visibility internal communications
• You design systems and workflows that scale across teams and locations
• You operate with high ownership and autonomy in ambiguous environments
• You proactively identify risks and ensure reliability for critical internal moments
• You influence stakeholders across functions without direct authority
• Nice to Have
• Experience supporting internal communications, corporate events, or enablement programs
• Familiarity with enterprise video conferencing and collaboration tools
• Experience with IP-based video (NDI, SRT, 2110) or cloud-based production workflows
• Background in motion graphics or internal content production

Why This Role Matters

Internal communication is critical to how Databricks operates and scales. In this role, you'll ensure that employees,from executives to new hires,can connect, learn, and align through high-quality live experiences.

You won't just run internal events,you'll build the systems that make internal communication seamless, reliable, and scalable across the company.

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In this role, you will work closely with an interdisciplinary technical team to route high-speed mixed-signal designs, interact with fabricators and assemblers, and manage signal integrity in complex PCBs.

Key responsibilities include:

• Working directly with engineers to produce printed circuit board designs supporting Anduril's products.
• Applying modern design standards and guidelines to create high-reliability, highly manufacturable assemblies.
• Implementing combinations of high-speed digital, precision analog, RF, and high-power designs.
• Leading the team in establishing internal guidelines for design for manufacturing (DFM), design for assembly (DFA), and overall quality fabrication and assembly outputs.
• Developing and refining team processes for PCB design, part creation, and library/database standards.
• Coordinating external PCB design resources during design surges.

Required qualifications include:

• A bachelor's degree in electrical engineering or similar and 5+ years of professional experience in PCB design OR 10+ years of professional experience in PCB design.
• Ability to read and interpret schematics and apply best practices appropriate for each design.
• Expertise in applying relevant IPC standards, CID, CID+ certification.
• Expertise in PCB fabrication processes, limitations, design rules, and best practice.
• Experience using Altium Designer CAD tools (Allegro is a plus).
• Experience with developing component libraries and library management.
• Excellent communication skills with multiple fab houses (ensuring boards are built to print).
• Excellent communication skills with multiple assembly houses (ensuring boards are built to BOM).
• Experience with a variety of board types, including high density and high layer count (greater than 16) digital designs, power electronics, flex circuits, and RF circuits.
• Experience with HDI (high density interconnect) and thicker boards (greater than 1.6mm).
• Experience with high speed digital interfaces and controlled impedance routing requirements like USB, PCIe, Ethernet, SERDES, and DDR memory.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Preferred qualifications include:

• Familiarity with RF board design.
• Experience with high-pin count packages (FPGA fanout).
• Familiarity with basic signal and power integrity rules (how they affect layout).

US Salary Range $111,000-$147,000 USD

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You will manage a portfolio of approximately 10–25 advertisers, designing structured Test & Learn roadmaps, demonstrating the performance value of Reddit as a marketing channel, and identifying opportunities to scale investment. In this role, you will work with some of the most innovative B2B companies (ranging from high growth startups to Fortune 1000 enterprises), helping them tap into Reddit’s uniquely engaged communities to drive awareness, consideration, and measurable business outcomes.

Responsibilities:

• Client Onboarding & Activation: Lead new advertisers through their first successful activation on Reddit, supporting Business Manager setup, campaign creation, and driving rapid time-to-launch so advertisers can quickly see early performance signals and momentum.

• Signal & Technical Foundations: Partner with advertisers to establish strong signal and measurement foundations (Pixel, CAPI, MTA, and MMM) to ensure campaigns are set up for accurate tracking and scalable performance.

• Performance Optimization & Goal Attainment: Proactively analyze campaign performance data, build and execute structured Test & Learn roadmaps (e.g., creative A/B testing, audience segmentation, bidding strategies), and provide data-backed recommendations to help clients achieve and exceed their initial goals.

• Revenue Growth & Investment Expansion: Identify and secure opportunities to scale advertiser investment by demonstrating clear performance impact and ROI, driving upsell and expansion across your portfolio to achieve revenue targets.

• Cross-Functional Collaboration: Collaborate closely with internal teams across Sales, Product, Marketing, Measurement, and Ad Operations to ensure advertisers are onboarded successfully, troubleshoot issues, and continuously improve campaign setup and performance.

• B2B Data & Measurement Partnerships: Leverage third-party data and intent partners (e.g., Bombora, Demandbase, Octane11) to help advertisers identify high-intent audiences, strengthen ABM strategies, and unlock deeper performance insights.

• Client Growth & Account Transition: Ensure advertisers reach defined success milestones and are positioned for continued investment and growth, partnering closely with peers to transition accounts and unlock the next phase of opportunity.

• Account Performance & Storytelling: Monitor and analyze campaign performance while translating complex data into clear, actionable insights through client meetings, presentations, and written communications.

• Organic + Paid Strategy: Introduce advertisers to Reddit Pro and organic best practices, helping clients combine community engagement with paid media to influence key decision makers across the B2B buying committee.

Required Qualifications:

• 4-7 years of experience in a Client Success, Account Management, or Media Planning/Strategy role within digital advertising, social media, or performance marketing.

• Experience managing or contributing to revenue targets through client expansion, upsell, or portfolio growth.

• Strong analytical and communication skills with the ability to translate campaign data into clear insights and recommendations (experience with tools such as Excel or similar analytical applications).

• Experience developing test & learn strategies and measurement frameworks to evaluate marketing performance, including strong familiarity with attribution models, signal implementation and third-party MTA/MMM measurement partners.

• Solid understanding of the digital marketing funnel and broader marketing ecosystem, particularly within B2B or performance marketing environments.

• Ability to thrive in a fast-paced, ambiguous environment with a proactive and solutions-oriented mindset.

• Demonstrated ability to build strong relationships with a large portfolio of clients and external partners.

• A passion for social media, insights-driven marketing, client success, and partnerships.

Benefits:

• Comprehensive Healthcare Benefits and Income Replacement Programs.

• 401k with Employer Match.

• Global Benefit programs that fit your lifestyle, from workspace to professional development to caregiving support.

• Family Planning Support.

• Gender-Affirming Care.

• Mental Health & Coaching Benefits.

• Flexible Vacation & Paid Volunteer Time Off.

• Generous Paid Parental Leave.

Pay Transparency: This job posting may span more than one career level. In addition to base salary, this job is eligible to receive equity in the form of restricted stock units, and will also be eligible to receive a commission. Additionally, Reddit offers a wide range of benefits to U.S.-based employees, including medical, dental, and vision insurance, 401(k) program with employer match, generous time off for vacation, and parental leave. To learn more, please visit https://www.redditinc.com/careers/. To provide greater transparency to candidates, we share base salary ranges for all US-based job postings regardless of state. We set standard base pay ranges for all roles based on function, level, and country location, benchmarked against similar stage growth companies. Final offer amounts are determined by multiple factors including, skills, depth of work experience and relevant licenses/credentials, and may vary from the amounts listed below. The base salary range for this position is $105,000-$147,000 USD.

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As a Senior Technical Account Manager, you will play a critical role in securing every identity, from AI to human identity. You will focus on strategic account alignment and broad deployment strategies to drive lasting success through elevated technical maturity.

Key Workforce Identity Solutions You Will Support: The Okta Platform secures employees, contractors, and partners across every part of the Identity lifecycle, including governance, access, and privileged controls. Products include:

• Identity & Access Management (IAM): Single Sign-On (SSO), Adaptive MFA, Device Access, API Access Management, Secure Partner Access, Access Gateway, and Universal Directory.
• Identity Governance & Administration (IGA): Lifecycle Management and Identity Governance.
• Privileged Access Management (PAM): Privileged Access.
• Identity Threat Detection & Response (ITDR): Identity Security Posture Management and Identity Threat Protection.

Strategic Customer Partnership & Influence:

• Build deep, long-lasting relationships with customers as their go-to technical advisor.
• Earn Okta trusted advisor status with customer identity owners and technical leadership, known as the primary point of contact for technical leaders.
• Possess and masterfully apply comprehensive technical expertise to solve complex problems, design sophisticated solutions, and influence customer strategies.
• Collaborate with customers to design identity strategies aligned with their business objectives.
• Leverage tailored technical plans for success with a portfolio of customers of increasing size and complexity.
• Help find ways to build upon and expand customers' adoption of the Okta footprint through additional use cases and increasing security posture.
• Use knowledge of how Okta's product differentiators lead to positive outcomes for customers, securing the Okta footprint against competitive displacement.

Complex Problem Resolution & Advocacy:

• Demonstrate advanced problem-solving skills, capable of dissecting complex, multi-faceted problems and orchestrating effective solutions.
• Proactively identify risks and create mitigation plans, establishing actions, ownership, and driving resolutions.
• Able to handle most customer technical escalations independently, or collaboratively with the Customer Success Manager (CSM).
• Manage competing priorities with little impact on delivery, ensuring follow through on all activity.
• Demonstrate a strong ability to represent and advocate for the customer with cross-functional teams (including engineering and support), while supporting policies and decisions that are in the best interests of the company.
• Facilitate difficult discussions with senior stakeholders.

Thought Leadership & Team Enablement:

• Serve as a thought leader, providing best practices, workshops, and training.
• Generate specific vertical/use case insights and thought leadership, demonstrating an advanced level of Okta platform and identity domain knowledge, with a focus on enhancing customers' security posture.
• Generate higher value for customers and deeper TAM engagement through repeatable asset and strategy creation for the team.
• Mentor peers and colleagues, upskilling capability with a focus on technical development.
• Contribute to the development of adoption and retention strategies, sharing knowledge of customer patterns, and leading execution.
• Lead project tasks or initiatives aimed at improvement of TAM processes and knowledge.

What You'll Bring to the Role

• Requires 8+ years of related experience in a professional role, or equivalent experience (e.g., 6+ years with a Master’s degree).
• 3+ years of experience as a Technical Account Manager (TAM) or a comparable role such as Technical Consultant, Product Management, or Solution Architect.
• 3+ years in identity and access management, including SSO, MFA, lifecycle management, or security best practices.
• Education: BA/BS/MS in Computer Science, Information Technology or related discipline, or equivalent work experience required.
• Certifications: Okta Certified, CISSP, or equivalent

Technical Mastery (Workforce Identity Focus):

• Extensive proficiency utilizing Okta feature sets and platforms to portray a design, or architecture, that satisfies well-known customer use cases to a customer technical persona including architect.
• Able to modify existing quickstart or code samples to adapt them to the customer's requirements.
• Confident in assisting TAM peers on technical challenges, or on behalf of other TAMs customers.
• Solid understanding of one or more of the following key areas:
• Technologies and protocols to support identity federation and robust access control models (e.g., SAML 2.0, WS-Federation, OAuth, OpenID Connect).
• Experience dealing with legacy applications in a hybrid IT environment with non-standard applications (i.e., those that do not support modern identity federation protocols).
• SaaS deployment such as Salesforce, Box, Office 365, Workday, and HR as master for identities.
• Lifecycle management scenarios to 3rd party systems and applications (Workflows, HR-driven provisioning, MSFT integrations, SCIM, etc).
• Enterprise applications in the ecosystem to provide identity and attributes to applications or to harness an external application to help drive business processes (ITSM, HR, etc).
• Security and performance monitoring and 3rd party signals integrations (SEIM, MDM, WAF, etc).
• Awareness of augmentation of identity protocols and flows, capable of identifying augmentation that requires additional review.

Communication and Leadership Skills:

• Excellent communication skills, capable of translating complex technical to

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As an analyst, you will engage directly with internal and external stakeholders to translate their questions into physics-based analyses, often designing experiments using mission-level simulations. You will follow the scientific method and generate clear and compelling analytical artifacts with actionable conclusions. Your analyses will often accompany demonstration events to quantify exactly how Anduril technology delivers mission success to the warfighter.

Employ the scientific method to develop model-driven analysis (and often the models themselves) Develop a deep understanding of the transformational value of Anduril’s platform, autonomy, simulation, and perception products Use our advanced internal M&S capabilities to give our analyses and asymmetric advantage over competitors Use exceptional writing and verbal communication to translate complex analytical findings into clear and compelling summaries for both internal program teams and external customers

Required Qualifications: 3+ years of experience in a relevant Science or Engineering field Currently possesses and is able to maintain an active U.S. Secret security clearance 2+ years of hands-on AFSIM scripting experience (deeper experience highly valued) Proficiency and love of modeling and scripting languages (e.g., Python, MATLAB, Simulink) Demonstrated experience in: Platform MS&A - aero, fuel, and signature modeling Payload MS&A - radar, EOIR, communications, or weapons payloads Exceptional communication and presentation skills, with the ability to convey complex technical information in written, visual and spoken form to diverse audiences A working knowledge of domains such as Offensive/Defensive Counter-Air (OCA/DCA), Intelligence, Surveillance, and Reconnaissance (ISR), Suppression/Destruction of Enemy Air Defenses (SEAD/DEAD), Electronic Attack, or Long Range Fires

Preferred Qualifications: 5+ years of experience in a relevant Science or Engineering field, or equivalent advanced academic experience (e.g., MS, Ph.D.) Ability to obtain and maintain a DoD Top Secret security clearance Demonstrated ability to lead and execute an Operations Analysis study from concept to completion, encompassing problem definition, research, model development, data analysis, and report generation Signal processing experience, for example, track fusion and filtering techniques Experience with RF propagation modeling, including communications, radar, and electronic warfare (EW) modeling

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Your role will be cross-cutting. The Head of Growth is part of the core business line leadership team that owns top line growth and influences internal investments, prioritization, program execution, and operations. You will also be responsible for developing, mentoring, and building the EW growth team, collaborating with Division and cross-Division leaders, and supporting programs / engineering / and mission operations teams within the business line.

Key Responsibilities:

• Build a cohesive, data-driven strategy within relevant Original Equipment Manufacturers (OEM), DOD Program Executive Offices (PEO), the Intelligence Community, Federal Agencies, Federally Funded Research and Development Centers (FFRDC), University-affiliated research centers (UARC), and with International partners to penetrate, expand, and deliver technology at scale.

• Develop and maintain close working relationships with internal Anduril stakeholders including business line and division leadership, growth teams, program and engineering teams, and corporate functions to identify and shape new business opportunities, communicate and resolve program issues, and provide strategic direction to execution teams.

• Lead the expansion of the EW portfolio across US and allied services and agencies, including advanced infrared, optical, laser, threat tracking, and seeker technologies that address warfighter needs across all domains including Space.

• Partner with Anduril customers to identify and develop disruptive technologies to deliver sustained operational advantage at the tactical, operational, and strategic level.

• Work with internal stakeholders to identify, prioritize, fund, and execute internally and externally funded research and development to advance Imaging technology.

• Identify, onboard, and manage strategic partners that are vital to growth strategy and program execution.

• Deliver on financial performance metrics and build strategic market growth initiatives.

• Build, mentor, and lead the EW Growth team in business development, account management, and mission operations functions.

Requirements:

• Deep expertise in applications of radio frequency technologies such as electromagnetic warfare, signals intelligence, aircraft survivability, counter-space or other relevant areas.

• A proven leader that effectively engages and communicates with stakeholders at all levels.

• Demonstrated experience with relevant FFRDCs, UARCs, PEOs, OEMs, federal agencies, and/or Combatant Commands.

• A builder and an owner: someone who is willing to put in the work across all aspects of the business, effectively prioritize actions, and own the outcomes.

• Demonstrated ability and willingness to learn; undeterred by a long, steep climb to understand technology, programs, process, problems, and customer nuance.

• Demonstrated ability in developing and executing tactical and strategic plans to some target end state.

• Ability to identify, establish, and maintain relationships with current and future customers at all levels.

• Knowledge of defense acquisitions, with demonstrated history in new technology/product introduction, zero to one projects, and scaling to larger defense programs.

• Ability to travel up to 50%.

• Eligible to obtain and maintain an active U.S. Top Secret security clearance.

Preferred Qualifications:

• Willing to relocate to Costa Mesa, CA.

• Advanced degree (Engineering, MBA, Military Sciences, etc.).

• Understanding of business operations and financial management.

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This strategic role will drive innovation in high-bandwidth, low-latency, power-efficient interconnects critical for AI/ML clusters based on advanced computing platforms. You will have the opportunity to work on all modalities of interconnects connecting GPUs and switches both inside and between data centres, including our primary front and backend networks that train Grok and that customers use for inference.

Responsibilities:

• Design, validate, and productise high-speed copper and optical connectivity solutions for AI clusters (100k+ GPU scale).
• Own vendor due diligence and onboarding for new 1.6T products including AEC and pluggable optical transceivers (DR4/8, FR4) including rigorous bring-up & characterisation.
• Investigate the opportunity for LPO and LRO in our network.
• Evaluate early co-packaged and near-packaged engines for switches and GPUs.
• Pathfinding for new interconnect modalities including VCSEL, microLED, THz radio-based solutions to improve network economics and reliability.
• Work closely with vendors (transceiver, cable, SerDes, DSP, silicon photonics foundries) to influence roadmaps and ensure timely delivery of next-gen solutions.
• Collaborate with ML training teams to translate workload communication patterns into concrete interconnect topology and optical reconfigurability requirements.
• Perform system-level simulation of end-to-end fabric performance.
• Drive failure analysis, root cause, and corrective actions for interconnect-related issues in production clusters through fleet-level metrics gathering and analysis.
• Contribute to internal tooling and automation for interconnect health monitoring, telemetry, diagnostics, remediation and automated qualification pipelines.

Basic Qualifications:

• At least 8+ years of hands-on experience in designing, deploying and operating high-speed copper and optical interconnects, preferably in a module design role or in a hyperscale datacentre environment.
• Master's or PhD degree in Electrical Engineering, Photonics or Physics.
• Deep knowledge of PAM4 SerDes performance, equalisation, jitter, crosstalk.
• Solid operational understanding of FEC, Retimers, TIAs and Drivers.
• Deep knowledge of optical link budget analysis and performance metrics including TDECQ, OMA, Tcode, stressed receiver sensitivity and associated diagnostics.
• Expertise in transceiver components including CW lasers, SiPh PICs, EML, DSP, passive subassemblies, their failure modes and characterisation.
• Knowledge of thermal, mechanical, power, signal integrity constraints in dense hardware.
• Knowledge of SiPh design process, yield improvement and reliability testing.
• Familiarity with CPO technologies and challenges/risk areas.
• Familiarity with subcomponent supply chains and global manufacturers, ODMs and CMs.
• Strong problem-solving skills and ability to thrive in a fast-paced, ambiguous setting.

Compensation and Benefits:

$180,000 - $440,000 USD

Base salary is just one part of our total rewards package at X, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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You will develop and iterate on account signals and prevention frameworks that consolidate internal and external data into actionable abuse indicators.

You will develop and optimize identity and account-linking signals using graph-based data infrastructure to detect coordinated and scaled account abuse.

You will evaluate, integrate, and operationalize third-party vendor signals , assessing whether new data sources provide genuine lift in detection.

You will expand internal account signals with new data sources and behavioural indicators to improve detection coverage.

You will build and maintain processes that evaluate new product launches for scaled abuse risks, working closely with product teams to ensure enforcement readiness.

You will operationalize and iterate on enforcement tooling , including appeals workflows, review processes, and user communications , to maintain quality and scale with growing volume.

You will analyse enforcement performance through operational metrics, partnering with the team to keep detection accurate as abuse patterns evolve.

You will manage payment fraud and dispute operations to protect revenue and maintain our standing with payment partners.

You will coordinate enforcement efforts for policy compliance gaps across products, working with relevant teams to build scalable review processes.

You will collaborate with cross-functional teams (Engineering, Product, Legal, Data Science) to surface new signals and translate detection capabilities into enforcement workflows.

You will maintain detailed documentation of signal development, enforcement processes, and operational decisions.

This role requires 2+ years of experience in risk scoring, fraud detection, trust and safety, or policy enforcement.

You should have hands-on experience building detection systems, risk models, or enforcement processes and workflows.

You should have experience evaluating and integrating third-party data sources into detection or scoring pipelines.

You should have strong SQL and Python skills , this role involves heavy data analysis across complex, multi-table data relationships.

You should have familiarity with identity signals such as device fingerprinting, account linking, or entity resolution, or experience with appeals processes and customer-facing enforcement communications.

You should have demonstrated ability to analyse complex data problems and translate findings into actionable improvements.

You should have strong written and verbal communication skills , ability to explain technical tradeoffs and navigate cross-functional stakeholder conversations.

Equivalent practical experience or a Bachelor's degree in Computer Science, Data Science, or related field is required.

This role offers an annual salary range of $230,000-$310,000 USD.

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As a Staff Software Engineer for Search Quality, you will drive the technical direction of ranking, relevance, evaluation, and quality initiatives across Databricks' next-generation Search product. You'll design and build the systems, models, and evaluation frameworks that ensure our Search stack delivers accurate, high-quality results across diverse multimodal datasets and query patterns.

The impact you will have:

• Lead the technical vision for Search Quality, shaping the ranking architecture, relevance modeling stack, and evaluation systems that power Databricks' next-generation retrieval experiences.

• Identify and solve challenges in ranking, query understanding, and hybrid retrieval , advancing state-of-the-art techniques in vector, keyword, and multimodal search.

• Design and train production-ready ranking and reranking models with strong guarantees around quality, latency, and resource efficiency.

• Partner closely with research, product, and infra teams to define metrics, evaluation methodologies, and experimentation strategies for new retrieval features and model architectures.

• Drive end-to-end engineering efforts , from early prototyping to production rollout , ensuring correctness, reliability, and measurable improvements to relevance.

• Build and operate resilient, low-latency services for ranking, evaluation, and relevance signal processing.

• Champion excellence in ML and search engineering, mentoring teammates and elevating design, code quality, and scientific rigor across the team.

• Shape Databricks' long-term roadmap for retrieval quality, ranking infrastructure, and the foundations for retrieval-driven AI products.

What we look for:

• 10+ years of experience building large-scale search, ranking, recommendation, or ML-driven relevance systems.

• Deep expertise in Search Quality, including ranking models, signals, query understanding, and evaluation methodologies.

• Strong understanding of relevance metrics and evaluation frameworks.

• Familiarity with vector search, keyword search, hybrid retrieval, and embedding-based semantic retrieval.

• Solid foundation in algorithms, data structures, and system design for performance-critical ranking and retrieval systems.

• Proven ability to deliver high-impact technical initiatives with clear business or product outcomes.

• Strong communication skills and ability to collaborate across teams in fast-moving environments.

• Strategic and product-oriented mindset with the ability to align technical execution with long-term vision.

• Passion for mentoring, growing engineers, and fostering technical excellence.

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As the Head of Growth, you will be responsible for developing, mentoring, and building the EW growth team, collaborating with Division and cross-Division leaders, and supporting programs / engineering / and mission operations teams within the business line.

Key responsibilities include:

• Building a cohesive, data-driven strategy within relevant Original Equipment Manufacturers (OEM), DOD Program Executive Offices (PEO), the Intelligence Community, Federal Agencies, Federally Funded Research and Development Centers (FFRDC), University-affiliated research centers (UARC), and with International partners to penetrate, expand, and deliver technology at scale.

• Developing and maintaining close working relationships with internal Anduril stakeholders including business line and division leadership, growth teams, program and engineering teams, and corporate functions to identify and shape new business opportunities, communicate and resolve program issues, and provide strategic direction to execution teams.

• Leading the expansion of the EW portfolio across US and allied services and agencies, including advanced infrared, optical, laser, threat tracking, and seeker technologies that address warfighter needs across all domains including Space.

• Partnering with Anduril customers to identify and develop disruptive technologies to deliver sustained operational advantage at the tactical, operational, and strategic level.

• Working with internal stakeholders to identify, prioritize, fund, and execute internally and externally funded research and development to advance Imaging technology.

• Identifying, onboarding, and managing strategic partners that are vital to growth strategy and program execution.

• Delivering on financial performance metrics and building strategic market growth initiatives.

• Building, mentoring, and leading the EW Growth team in business development, account management, and mission operations functions.

Required qualifications include:

• Deep expertise in applications of radio frequency technologies such as electromagnetic warfare, signals intelligence, aircraft survivability, counter-space or other relevant areas.

• A proven leader that effectively engages and communicates with stakeholders at all levels.

• Demonstrated experience with relevant FFRDCs, UARCs, PEOs, OEMs, federal agencies, and/or Combatant Commands.

• A builder and an owner: someone who is willing to put in the work across all aspects of the business, effectively prioritize actions, and own the outcomes.

• Demonstrated ability and willingness to learn; undeterred by a long, steep climb to understand technology, programs, process, problems, and customer nuance.

• Demonstrated ability in developing and executing tactical and strategic plans to some target end state.

• Ability to identify, establish, and maintain relationships with current and future customers at all levels.

• Knowledge of defense acquisitions, with demonstrated history in new technology/product introduction, zero to one projects, and scaling to larger defense programs.

• Ability to travel up to 50%.

• Eligible to obtain and maintain an active U.S. Top Secret security clearance.

Preferred qualifications include:

• Willing to relocate to Costa Mesa, CA.

• Advanced degree (Engineering, MBA, Military Sciences, etc.).

• Understanding of business operations and financial management.

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Our team focuses primarily but not exclusively on speech, building advanced steerable systems spanning end-to-end conversational systems, speech and audio understanding models, and speech synthesis capabilities. The team works closely with many collaborators across pretraining, finetuning, reinforcement learning, production inference, and product to get advanced audio technologies from early research to high-impact real-world deployments.

Responsibilities:

• Develop and train audio models, including conversational speech-to-speech, speech translation, speech recognition, text-to-speech, diarization, codecs, and generative audio models
• Work across abstraction levels, from signal processing fundamentals to large-scale model training and inference optimization
• Collaborate with teams across the company to develop and deploy audio technologies
• Communicate clearly and effectively with colleagues and stakeholders

Strong candidates may also have experience with:

• Large language model pretraining and finetuning
• Training diffusion models for image and audio generation
• Reinforcement learning for large language models and diffusion models
• End-to-end system optimization, from performance benchmarking to kernel optimization
• GPUs, Kubernetes, PyTorch, or distributed training infrastructure

Representative projects:

• Training state-of-the-art neural audio codecs for 48 kHz stereo audio
• Developing novel algorithms for diffusion pretraining and reinforcement learning
• Scaling audio datasets to millions of hours of high-quality audio
• Creating robust evaluation methodologies for hard-to-measure qualities such as naturalness or expressiveness
• Studying training dynamics of mixed audio-text language models
• Optimizing latency and inference throughput for deployed streaming audio systems

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About the Role: The Head of Programmatic Outcomes (Product) shapes the product-led growth strategy, in-product activation design, and adoption loops that reach every knowledge worker , not account by account, but at population scale , in deep partnership with Anthropic’s Product, Growth Marketing, and Strategy functions.

Responsibilities:

• Drive the PLG activation strategy across Claude Teams, Claude for Enterprise, Claude Code, and API , partnering with Product PMs and Growth Marketing to define plays that drive adoption from first login to habitual daily use

• Co-design onboarding sequences, in-product nudges, and activation milestones with Product , then codify them so the Customer Success team and partners execute at scale

• Partner with Product and Strategy to define which usage signals indicate healthy vs. at-risk accounts and trigger the right human or automated interventions

• Partner closely with Product PMs to ensure the activation motion is built into the product, not bolted on , serving as the dedicated GTM voice advocating for UX patterns and enablement features that reduce time-to-value, and reducing duplication between Product-owned onboarding and CS-owned playbooks

• Develop and test hypothesis-driven activation plays across specific knowledge-worker use cases (Finance, Legal, HR, exec workflows) , codifying what converts at scale

• Hold the connective tissue across the Partners and Growth Marketing capability leads to ensure PLG motions are product-anchored, not just relationship-driven or campaign-driven , this leader is the integration point, not a parallel function

• Establish adoption benchmarks, population-level penetration metrics, and health indicators the programmatic team uses to track progress on the knowledge-worker gap

• Feed product activation learnings back into the Success motion , creating the intelligence loop between population-level data and account-level execution

Requirements:

• 8+ years in PLG, growth PM, product marketing, or CS strategy with direct ownership of activation or adoption metrics

• Experience designing and running product-led onboarding or activation programs at enterprise SaaS or AI companies , not just contributing to them

• Deep understanding of how product telemetry translates into adoption signals and how to trigger the right human and automated interventions

• Strong cross-functional fluency: you’ve worked embedded with Product teams while maintaining a GTM orientation and commercial accountability

• Track record of building programmatic motions that generate scale across a large customer base , not one-off account customizations

• Real perspective on what drives knowledge workers to build habits around new tools, backed by experience

Salary: The annual compensation range for this role is $315,000-$350,000 USD.

Logistics:

• Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

• Required field of study: A field relevant to the product management role

• Minimum years of experience: 8+ years

• Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time

• Visa sponsorship: We do sponsor visas!

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This role sits at the intersection of startup ecosystem development and hands-on technical activation. Your primary mandate is driving adoption across the startup funnel , turning ecosystem touchpoints into active, building developers on Anthropic's platform. You'll work closely with the Startups GTM team to convert ecosystem relationships , with VCs, accelerators, and founder communities , into active, building developers.

Responsibilities

• Drive Net New Logo Acquisition Through Developer Enablement

• Lead hands-on developer onboarding experiences at ecosystem events that convert startup founders and their engineers from first API interaction to committed platform adoption

• Build scalable enablement programs , hands-on workshops, build-a-thons, and technical office hours , that activate developers at VC and accelerator partner events

• Develop a playbook for turning ecosystem touchpoints (builder summits, founder days, VC partnerships) into measurable developer sign-ups and active usage

• Partner closely with the Startups GTM team to create seamless handoffs from relationship → activation → retention

• Create Compelling Technical Content

• Create high-quality technical content , tutorials, demo apps, and blog posts , that showcase how to build real products on Anthropic's API, with a focus on common startup use cases

• Develop code demos and working prototypes that showcase Claude's capabilities in ways that resonate with technical founders, particularly at ecosystem events and webinars

• Partner with the Product team to stay current on platform capabilities and ensure content reflects the latest developer tooling and best practices

• Lead Developer Programming at Startup Events

• Own developer-facing programming at Anthropic's builder summits and global startup activations

• Design and run hands-on technical sessions that move developers from curiosity to active building within a single event

• Build relationships with key technical communities , developer platforms, open-source contributors, and startup accelerator cohorts , to grow Anthropic's developer mindshare

• Represent Anthropic as a trusted technical resource in the startup ecosystem

• Partner Across GTM and Ecosystem

• Surface market signal and developer sentiment from the startup ecosystem back to internal teams

• Partner with GTM, Sales, and Marketing to create developer-focused activation campaigns and messaging for the startup ecosystem

• Work with the Startups Partnerships team to ensure VC and accelerator relationships translate into real developer engagement and usage metrics

• Collaborate closely with the Product team to stay aligned on platform strategy, content, and developer programs

• Define Success and Scale

• Define and track success metrics , tied to net new logos, developer activation, and ecosystem engagement , and build reporting that connects evangelist activity to business outcomes

• Create scalable processes and grow the team as the startup ecosystem expands

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You will be the subject matter expert and product owner for all enrichment tools, data sources, and processes,including platforms like Clay, Dun & Bradstreet, ZoomInfo, and other third-party providers. You will design and operate the systems that power account hierarchies, firmographic enrichment, contact discovery, and signal detection, ensuring our GTM teams have the accurate, complete data they need to identify, prioritize, and close business.

This is a hands-on, technically-oriented role that requires deep experience working with large datasets, complex system integrations, and Salesforce data modeling. You will collaborate closely with Sales, Marketing, Data Science, Data Engineering, and Revenue Operations to ensure our enrichment strategy supports both near-term GTM execution and long-term data infrastructure goals.

Responsibilities:

• Own the end-to-end enrichment strategy and roadmap, serving as the product owner for all enrichment tools, vendors, and data sources including Clay, Dun & Bradstreet, ZoomInfo, and emerging providers

• Build and maintain a unified enrichment master,a reliable source of truth for company and person data including parent-child account hierarchies, firmographics, technographics, and contact intelligence across domestic and international markets

• Design and implement waterfall enrichment workflows that orchestrate multiple data providers to maximize coverage, accuracy, and cost efficiency while minimizing redundancy

• Architect enrichment data models within Salesforce, making strategic decisions about how enrichment data is stored, related, and surfaced (e.g., custom objects vs. direct field integration, parent account structures, enrichment audit trails)

• Hands-on data manipulation and transformation,write queries, build data pipelines, and work directly with data warehouses (e.g., Snowflake, BigQuery) to clean, transform, match, and deduplicate enrichment data at scale

• Lead international enrichment strategy, addressing the unique challenges of enriching company and contact data across global markets with varying data availability, provider coverage, and regulatory requirements

• Partner with Data Science and Data Engineering to define enrichment schemas, resolve entity matching challenges, and build scalable infrastructure that supports both real-time and batch enrichment processes

• Collaborate with Sales, Marketing, and Revenue Operations to understand GTM data needs, translate business requirements into enrichment solutions, and ensure enrichment outputs directly support pipeline generation, territory planning, lead routing, and account scoring

• Define and track enrichment KPIs including match rates, data completeness, freshness, accuracy, and downstream GTM impact,using metrics to continuously improve the enrichment ecosystem

• Evaluate and onboard new enrichment vendors and data sources, conducting proof-of-concept testing and negotiating contracts in partnership with procurement

• Explore and implement AI-powered enrichment capabilities, including prompt-based enrichment using LLMs to supplement traditional data providers for emerging companies, startups, and hard-to-enrich segments

You may be a good fit if you have:

• 10+ years of experience in data enrichment, data operations, or revenue/marketing operations with hands-on ownership of enrichment tools and strategy in a B2B SaaS or enterprise technology environment

• Deep expertise with enrichment platforms such as Clay, Dun & Bradstreet (D-U-N-S, Data Blocks, hierarchies), ZoomInfo, Clearbit, People Data Labs, or comparable providers, including experience building waterfall enrichment workflows and enrichment masters

• Strong Salesforce experience (required),including data modeling for enrichment (custom objects, account hierarchies, parent-child relationships), integration architecture, and understanding of how enrichment data flows through the CRM to support GTM processes

• Hands-on technical skills for data manipulation including SQL proficiency, experience with data warehouses (Snowflake, BigQuery, or similar), and comfort working with ETL/reverse ETL pipelines, APIs, and data transformation tools

• Strong product ownership mindset with experience managing roadmaps, backlogs, and stakeholder priorities,able to translate business needs into technical requirements and drive execution across cross-functional teams

• Dual data + RevOps mindset,equally comfortable working with Data Science and Data Engineering on infrastructure and schema design as you are partnering with Sales and GTM teams on pipeline and territory optimization

• Excellent communication skills to bridge technical and business audiences, lead stakeholder discovery sessions, and present enrichment strategy and impact to leadership

Strong candidates may have:

• Experience building or leveraging AI-powered enrichment prompts (e.g., using LLMs to research and enrich company data, identify signals, or fill gaps where traditional providers lack coverage)

• Familiarity with data quality and MDM (Master Data Management) frameworks and tools

• Experience with routing and scoring tools such as LeanData, and marketing automation platforms

• Background in startup signal detection,identifying high-potential early-stage companies through funding, hiring, technographic, and intent signals

The annual compensation range for this role is listed below.

For sales roles, the range provided is the role’s On Target Earnings ("OTE") range, meaning that the range includes both the sales commissions/sales bonuses target and annual base salary for the role.

Annual Salary: $190,000-$270,000 USD

Logistics

Minimum education: Bachelor’s degree or an equivalent combination of education, training, and/or experience

Required field of study: A field relevant to the role as demonstrated through coursework, training, or professional experience

Minimum years of experience: Years of experience required will correlate with the internal job level requirements for the position

Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.

Visa sponsorship: We do sponsor visas! However, we aren’t able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

We encourage you to apply even if you do not believe you meet every single qualification. Not all strong candidates will meet every single qualification as listed. Research shows that people who identify as being from underrepresented groups are more prone to experiencing imposter syndrome and doubting the strength of their candidacy, so we urge you not to exclude yourself prematurely and to submit an application if you’re interested in this work. We think AI systems like the one

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This is a highly operational, systems-driven role that also demands creativity, intuition, and deep curiosity about the AI research ecosystem. You will work closely with founders, research leaders, and hiring managers to translate ambitious research goals into exceptional hires.

Responsibilities:

• Design, build, and continuously improve recruiting and sourcing systems, processes, and tooling with an emphasis on rigor, accuracy, and scalability
• Proactively source researchers and engineers from top universities, AI labs, and leading technology companies across ML, robotics, computer vision, and related fields
• Maintain exceptionally high-quality candidate data, pipelines, and documentation across ATS and internal tracking systems
• Develop creative sourcing strategies using publications, citations, open-source work, conference participation, academic networks, and referrals
• Partner closely with research and engineering leaders to deeply understand technical needs, evolving skill requirements, and long-term talent strategy
• Own candidate experience end-to-end, ensuring thoughtful, timely, and highly professional communication
• Analyze recruiting metrics and pipeline data to identify gaps, improve efficiency, and inform hiring decisions
• Support interview coordination and hiring operations as needed to keep processes running smoothly and predictably

Key Qualifications:

• 3+ years of experience in technical recruiting or sourcing, with a strong focus on AI, ML, robotics, or adjacent deep-tech domains
• Demonstrated ability to build and maintain highly organized recruiting systems and processes
• Strong data discipline: comfortable working with pipelines, metrics, and structured tracking to drive decisions
• Solid understanding of the AI research landscape, including top universities, labs, conferences, and industry research teams
• Experience sourcing passive, highly competitive candidates
• Excellent written and verbal communication skills
• Ability to operate effectively in fast-moving, ambiguous environments

Preferred Qualifications:

• Experience in one or more of the following is a strong plus:

  • Recruiting or sourcing for research-heavy organizations or frontier AI labs
  • Familiarity with academic research signals (publications, citations, arXiv, conferences such as NeurIPS, ICML, ICLR, CVPR, RSS, etc.)
  • Experience hiring PhD-level researchers or highly specialized engineers
  • Background in startup environments or early-stage team building
  • Experience with advanced sourcing tools, automation, or custom workflows

Who You Are:

• Fearless Innovator: We need people who thrive on challenges and aren't afraid to tackle the impossible.
• Resilient Builder: Impacting Large World Models isn't a sprint; it's a marathon with hurdles. We're looking for builders who can weather the storms of groundbreaking research and come out stronger.
• Mission-Driven Mindset: Everything we do is in service of creating the best spatially intelligent AI systems, and using them to empower people.
• Collaborative Spirit: We're building something bigger than any one person. We need team players who can harness the power of collective intelligence.

Equal Opportunity & Pay Transparency

World Labs is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetic information, veteran status, or any other characteristic protected under applicable law. We welcome all qualified applicants and are committed to providing reasonable accommodations throughout the hiring process upon request.

In accordance with California law, we disclose the following:

• Pay Range: $180,000-$225,000 base salary (good-faith estimate for San Francisco Bay Area upon hire; actual offer based on experience, skills, and qualifications)
• Total Compensation: Base salary plus equity awards and annual performance bonus
• Salary History: We do not request or consider prior compensation in making offers

Compliance:

• Cal. Lab. Code §432.3 (pay scale disclosure & salary history ban); Cal. Lab. Code §1197.5 (Equal Pay Act); Cal. Gov. Code §12940 (FEHA); 42 U.S.C. §2000e (Title VII); 29 U.S.C. §621 (ADEA); 42 U.S.C. §12101 (ADA)
• Accommodations & inquiries: talent@worldlabs.ai

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Position Summary As a Senior iOS Engineer, you will be joining the recently acquired UnifyID team at Prove. This team is building the next generation of user authentication that combines behavioural biometrics from smartphone sensor data, machine learning modelling, and enterprise-grade cloud services. The result is an accurate, frictionless, and secure authentication service that defends against malicious attacks on mobile and web experiences.

Responsibilities

• Hands-on coding, systems analysis, design, and delivery of projects assigned
• Deliver new features, execute on the roadmap and plan for the future
• Enhance our existing iOS SDK for an optimal mobile experience
• Provide thought leadership on industry best practices around design, testing, and security
• Manage the iOS SDK API program and documentation
• Mentor other developers

What We Require

• 5+ years of professional software development experience, preferably in a fast-paced environment
• Strong software development principles, including scalable software and architectural design patterns
• Experience executing on complex features leveraging the power of native iOS SDKs
• Strong knowledge of iOS along with competency using standard libraries
• Experience with evaluating and optimising resource usage, including battery usage
• Bachelor’s degree in computer science or related field/experience preferred
• Experience with Android and/or SaaS a plus
• Experience with low-level system data collection from on-device sensors a plus
• Familiarity with Machine Learning and/or Signal Processing techniques a plus

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Our data analytics platform can translate mobile sensor data from real-world human activity into a “digital fingerprint” with no conscious action from the user, all in real-time, and in a way that respects user privacy.

This is an opportunity to be a part of something truly unique and game-changing.

Your day-to-day

• Be an early member of a high-performing team of full stack software engineers building a new human identity platform
• Take ownership, be creative, and think outside the box to invent and build solutions to real-world customer problems
• Understand how the entire system works end-to-end, and eventually become known as the expert in multiple areas
• Gain a working knowledge of machine learning and mobile sensor data to help solve problems related to real-time signals processing
• Wear many hats to make things happen in a dynamic startup environment
• Bring your own unique expertise to the team and learn from others
• Enjoy tight collaboration with your teammates

Ideal candidates will have...

• Spent at least 5 years in the trenches of the software industry, delivering quality software that matters to people that care
• Many “been there, done that” stories related to shipping and maintaining major software products for customers
• Excellent coding skills in at least two object-oriented languages
• Hands-on experience deploying services using Kubernetes on AWS
• The ability to argue fluently about security and scalability
• Experience working with high volumes of data, ideally with machine learning playing a critical role
• A breadth of technical skills and know how to use the right tool for the job
• High motivation and ability to learn new technologies and domains
• A positive can-do attitude and bring a passion for excellence to the workplace
• Excellent collaboration and communication skills
• Knowledge of cybersecurity, signals processing, or experience working with time-series data a bonus

Additional Information

Join us! As we continue to scale our company, we are looking for people who know how to make an impact. We’re talking self-starting professionals who thrive in a fast-paced environment, process information quickly, and make intelligent decisions. The work is challenging and requires not only smarts but natural curiosity and tenacity. Teamwork is also important to us – we work together and play together. Prove has big plans; we’re excited and optimistic about the future. If this sounds like a career for you – come check us out.

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Position Summary As a Lead iOS Engineer, you will be joining the recently acquired UnifyID team at Prove. This team is building the next generation of user authentication that combines behavioural biometrics from smartphone sensor data, machine learning modeling, and enterprise-grade cloud services. The result is an accurate, frictionless, and secure authentication service that defends against malicious attacks on mobile and web experiences.

Responsibilities

• Hands-on coding, systems analysis, code reviews, design, and delivery of projects assigned
• Set a good example by writing well-designed, testable, efficient code that meets coding standards
• Deliver new features, execute on the roadmap and plan for the future
• Enhance our existing iOS SDK for an optimal mobile experience
• Provide thought leadership on industry best practices around design, testing, and security
• Manage the iOS SDK API program and documentation
• Exercise creative thinking and imagination to find solutions to hard problems.
• Mentor other developers

Required Skills

• 5+ years of professional software development experience, preferably in a fast-paced environment
• Strong software development principles, including scalable software and architectural design patterns
• Experience executing on complex features leveraging the power of native iOS SDKs
• Strong knowledge of iOS along with competency using standard libraries
• Experience with evaluating and optimising resource usage, including battery usage
• Bachelor’s degree in computer science or related field/experience preferred
• Experience with Android and/or SaaS a plus
• Experience with low-level system data collection from on-device sensors a plus
• Familiarity with Machine Learning and/or Signal Processing techniques a plus

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This role is an exciting opportunity to be responsible for integrating avionics systems, sensors, actuators, and payloads onto the XBAT and Launch and Recovery vehicle ensuring from concept through production.

Responsibilities:

• Lead end-to-end integration of avionics systems across aircraft and launch/recovery platforms
• Define avionics architecture, harnessing, and system integration documentation for avionics systems
• Own integration of COTS and custom hardware onto the platform - including compute, radios, sensors, actuators, and power systems
• Drive system-level debugging and root cause analysis across electrical, mechanical, and software domains
• Develop integration plans, verification strategies, and qualification test approaches to relevant standards and requirements
• Oversee harness architecture and electrical interface control documentation (ICDs)
• Lead hardware bring-up, HIL and flight test integration, and production transition
• Mentor junior engineers and raise overall technical standards within the team
• Proactively identify design risks and drive mitigation early in development

Requirements:

• Bachelor’s degree in Electrical, Aerospace, Mechanical, Systems Engineering or equivalent technical degree
• 6+ years of industry experience in avionics or complex embedded system integration
• Proven experience integrating flight-critical or mission-critical hardware systems
• Deep understanding of power distribution, signal integrity, grounding, EMI/EMC considerations
• Experience with hardware/software integration and cross-functional technical leadership
• Demonstrated ownership of systems from concept through production
• Strong troubleshooting skills across electrical and embedded domains
• Ability to operate effectively in fast-paced development environments with flight schedules

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This is a full-time, onsite position with a competitive salary range of $115,527 - $173,291 per year, plus bonus, benefits, and equity. The ideal candidate will have a Bachelor's degree in electrical engineering, a minimum of 3+ years of experience as an Electrical Engineer, and strong technical fundamentals.

XML job scraping automation by YubHub

Navigation System Architecture & Design:

Establish navigation performance requirements and error budgets for safety-critical applications. Support decomposition of navigation requirements into allocations for sensors, estimation algorithms, and software components. Design detailed software architecture for state estimation implementations, including module interfaces and data flow.

Algorithm Development & Implementation:

Design and implement Extended Kalman Filter algorithms for navigation applications, with broad understanding of state estimation theory and alternative filtering approaches. Implement tightly-coupled and loosely-coupled GNSS/INS integration algorithms. Integrate diverse sensing modalities (vision, RF, celestial etc.) into multi-sensor fusion framework for GPS-degraded environments. Develop fault detection, isolation, and recovery (FDIR) strategies for navigation systems. Implement integrity monitoring and protection level calculations for safety-critical operations.

Certification & Verification:

Develop verification and validation test plans for navigation algorithms. Conduct performance analysis including Monte Carlo simulation, covariance analysis, and flight test data evaluation. Document navigation system design, requirements allocation, and compliance evidence. Support safety assessment activities including failure modes and effects analysis.

Technical Leadership:

Provide technical guidance on navigation architecture and state estimation approaches. Support trade studies evaluating navigation sensor suites and fusion strategies. Mentor junior engineers on state estimation theory and implementation.

Required qualifications:

• MS or PhD in Computer Science, Software Engineering, Electrical Engineering, Aerospace Engineering, Mechanical Engineering, Applied Mathematics, or related field
• 15+ years of experience developing state estimation algorithms for aerospace navigation applications
• Demonstrated experience implementing GNSS/INS integration solutions
• Experience with safety-critical system development and certification processes
• Deep understanding of state estimation theory
• Experience implementing multi-sensor fusion algorithms in production systems
• Strong background in inertial navigation, GNSS positioning, and sensor error modeling
• Strong programming skills in C/C++ and Python/MATLAB for algorithm development and analysis
• Understanding of integrity monitoring, protection levels, and safety assessment methods
• Experience with requirements management and verification/validation processes for certifiable systems
• Understanding of GPS/GNSS signal structure, error sources, and performance characteristics
• Knowledge of IMU error models, calibration, and Allan variance analysis
• Familiarity with alternative navigation sensors (camera, RF ranging, celestial, etc.)
• Understanding of navigation performance metrics (accuracy, integrity, continuity, availability)

Preferred qualifications:

• PhD in relevant field with focus on state estimation or navigation
• Direct involvement in certified navigation system development from requirements through flight test
• Experience with specialized navigation approaches (vision-aided navigation, terrain-referenced navigation, celestial navigation, etc.)
• Publications or patents in navigation or state estimation
• Experience with GPS/GNSS jamming and spoofing mitigation techniques
• Clearance eligible or active security clearance

The salary for this position is $270,000 - $400,000 a year.

XML job scraping automation by YubHub

The ideal candidate has extensive experience in RF system design, testing, and benchmarking, with a strong foundation in wireless communications, spectrum management, and signal propagation in marine environments. This is a technically demanding, research-focused position with opportunities to influence system architecture and future platform capabilities.

Key Responsibilities:

• Lead R&D efforts in RF communications, radar, and electronic sensing technologies for autonomous surface vessels.
• Evaluate and benchmark RF hardware and subsystems, including radios, antennas, and signal processing modules across multiple frequency bands (VHF/UHF, L/S/C/X bands).
• Conduct trade studies and comparative analyses of commercial and military-grade RF solutions to inform system selection and integration strategies.
• Design, prototype, and test RF systems and supporting electrical architectures, including cabling, shielding, and power interfaces.
• Model and analyze RF propagation and link performance in maritime and littoral environments.
• Collaborate cross-functionally with autonomy, software, and mechanical teams to ensure seamless integration of communication and sensing systems.
• Develop test procedures, perform validation trials, and analyze system performance under operational and environmental conditions.
• Author detailed R&D documentation, including technical reports, design specifications, and performance evaluations.
• Mentor junior engineers and contribute to Saronic’s RF technology roadmap and internal knowledge base.
• Support field testing and vessel trials, including setup and troubleshooting of communication and radar systems.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, RF Engineering, or related discipline.
• 7+ years of professional experience in RF system design, testing, and integration -preferably in maritime, automotive, aerospace, or defense applications.
• Deep understanding of RF theory, antenna design, and signal propagation, including real-world marine effects (multipath, reflection, attenuation).
• Hands-on experience with RF instrumentation (spectrum analyzers, network analyzers, signal generators, power meters, etc.).
• Proven ability to conduct trade studies and technology benchmarking for RF components and systems.
• Familiarity with communications protocols such as Ethernet, CAN, and serial interfaces, and with wireless standards (LTE, SATCOM, mesh networking).
• Strong documentation and communication skills; able to translate test results into actionable design insights.
• Ability to work effectively in both lab and field test environments (dockside, at-sea, and range conditions).

Physical Requirements:

• Prolonged periods of sitting at a desk and working on a computer.
• Occasional standing and walking within the office.
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.
• Visual acuity to read screens, documents, and reports.
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

XML job scraping automation by YubHub

You will collaborate cross-functionally with other electrical, firmware/software, mechanical, and manufacturing/quality teams to design, validate, and deliver robust electronic solutions.

Key Responsibilities:

• Primarily digital and power-based designs, but analog design is a possibility.
• Own the entire PCB design lifecycle, including requirements, major component selection, block diagrams, schematic, circuit analysis, placement, routing, DFA/DFM review, prototype testing, and documentation.
• Create and maintain BOMs, design files, netlists, and manufacturing documentation.
• Work closely with mechanical engineers to integrate PCBs into enclosures and assemblies.
• Lead or support prototype bring-up, debugging, and testing with support from the firmware/software teams (Capability to write firmware/software for bring-up is a plus).
• Perform signal integrity, power budgeting, and thermal analysis as needed.
• Review and optimize designs for EMC/EMI compliance and environmental robustness.
• Interface with fabrication and assembly vendors, addressing build issues and driving quality improvements.
• Participate and cross-collaborate in design reviews and peer reviews to ensure high standards.
• Contribute to and improve engineering processes, libraries, and design guidelines.
• Support ITAR/export compliance and follow relevant standards such as MIL-STD’s, IPC-610/6012, etc.

Required Qualifications:

• Bachelor’s degree in Electrical Engineering or related field.
• 3+ years of professional experience in PCB schematic and layout design.
• Proficiency with Altium Designer (or other equivalent EDA tools).
• Experience with multi-layer board design and high-speed or mixed-signal circuitry.
• Strong understanding of electronic components, circuit theory, and board-level design principles.
• Ability to interpret datasheets, standards, and mechanical constraints.
• Proven experience with design for manufacturing (DFM) and design for test (DFT).

Preferred Qualifications:

• Experience in defense, aerospace, or other safety/mission-critical industries.
• Familiarity with ruggedized systems, high-temperature settings, water-intrusion protection, and other environmental requirements.
• Knowledge of MIL-STD, IPC standards, or similar frameworks.
• Experience with SPICE simulations, Signal Integrity Analysis, or reliability engineering.
• Ability to work with firmware, FPGA, or embedded teams.
• Active or previous security clearance (or ability to obtain one).
• Ownership mentality and attention to detail.
• Ability to work both independently and in multidisciplinary teams.
• Strong organizational and time management skills.
• Comfortable working in a fast-paced, product-focused environment.

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Physical Demands:

• Prolonged periods of sitting at a desk and working on a computer.
• Occasional standing and walking within the office.
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.
• Visual acuity to read screens, documents, and reports.
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Additional Information:

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

XML job scraping automation by YubHub

Our team is focused on making boats go and perform tasks with no human involvement. This job is available at multiple levels, including entry, senior, and staff.

Responsibilities:

• Develop algorithms and models which allow boats to sense and navigate
• Develop metrics which allow quantitative analysis of improvements and regressions in boat performance
• Analyze and work with large data systems to enable model training and evaluation

Requirements:

• Strong programming fundamentals
• Extensive programming experience and demonstrated ability to work on large systems
• Computing Fundamentals
• A general understanding of operating systems and or similar large scale systems
• An understanding of basic computer architecture
• A demonstrated willingness to learn and pivot based on new information

Useful Skills:

• Familiarity with deep learning frameworks (e.g., TensorFlow, PyTorch)
• Understanding of various filters and their applications
• Proficiency in Rust
• Experience with maritime or autonomous vehicle projects
• Experience with signals processing or sensor fusion
• Experience with low latency inference and tracking pipelines
• Experience with path planning algorithms
• Experience training and deploying multi modal models
• Experience with various sensors including radar, cameras, and lidar
• Experience developing and optimizing deployed ML systems

Physical Demands:

• Prolonged periods of sitting at a desk and working on a computer
• Occasional standing and walking within the office
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment
• Visual acuity to read screens, documents, and reports
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages)

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Additional Information:

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

XML job scraping automation by YubHub

This individual will be responsible for evaluating, benchmarking, and integrating cutting-edge navigation and sensor technologies across Saronic's fleet of autonomous vessels.

Key responsibilities include leading R&D initiatives, designing and executing benchmarking tests, performing trade studies, and developing system architectures.

The ideal candidate brings deep experience in electrical systems design, system-level trade studies, and technology evaluation, and thrives at the intersection of hardware innovation and applied research.

Responsibilities:

• Lead R&D initiatives focused on next-generation navigation and positioning solutions for autonomous vessels.

• Design and execute benchmarking tests of commercial and prototype systems (GNSS, INS/IMU, radar, LiDAR, Doppler velocity logs, etc.), including lab, dockside, and sea-trial environments.

• Perform trade studies and comparative analyses of current and emerging market offerings to inform system selection, integration paths, and performance improvements.

• Develop system architectures and interface specifications for integrating navigation sensors with vessel control, autonomy, and data processing subsystems.

• Prototype, test, and validate new electrical configurations supporting advanced sensing and positioning.

• Author technical reports and white papers summarizing benchmarking results, performance metrics, and recommendations.

• Collaborate with autonomy, software, and mechanical teams to ensure seamless sensor fusion and data pipeline integrity.

• Mentor junior engineers and contribute to internal R&D roadmaps for navigation system evolution.

• Contribute to IP generation, system qualification, and design standardization for future vessel platforms.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or related discipline.

• 7+ years of professional experience in electrical systems engineering, preferably within marine, aerospace, automotive or defense domains.

• Demonstrated expertise with navigation and positioning systems: GNSS, INS/IMU, radar, LiDAR, or sensor fusion.

• Proven experience in system-level benchmarking, R&D experimentation, and trade study development.

• Strong understanding of signal integrity, timing synchronization, and sensor data acquisition.

• Proficiency with schematic and wiring design tools (e.g., Altium, AutoCAD Electrical, or SolidWorks Electrical).

• Experience with communication interfaces such as CAN, Ethernet, and serial protocols.

• Excellent technical writing and presentation skills , capable of producing concise, data-driven R&D documentation.

• Ability to operate effectively in both lab and field environments, including vessel trials.

Preferred Qualifications:

• Experience in autonomous or unmanned system development, particularly maritime platforms.

• Familiarity with sensor fusion algorithms and real-time data processing pipelines.

• Working knowledge of relevant industry standards (ABS, USCG, MIL-STD, IEC).

• Background in environmental testing, EMI/EMC compliance, and system reliability analysis.

• Experience supporting hardware-in-the-loop (HITL) or model-based system simulations.

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services

• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care

• Saronic pays 100% of the premium for employees and 80% for dependents

• Time Off: Generous PTO and Holidays

• Parental Leave: Paid maternity and paternity leave to support new parents

• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses

• Retirement Plan: 401(k) plan

• Stock Options: Equity options to give employees a stake in the company’s success

• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage

• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Physical Demands:

• Prolonged periods of sitting at a desk and working on a computer.

• Occasional standing and walking within the office.

• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.

• Visual acuity to read screens, documents, and reports.

• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.

• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Additional Information:

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

XML job scraping automation by YubHub

This role focuses on the research, evaluation, and development of underwater acoustic sensing technologies - including sonar transducers, hydrophones, acoustic modems, and signal processing subsystems - supporting navigation, detection, and situational awareness capabilities for autonomous surface vessels.

The ideal candidate has extensive experience in acoustic system design, integration, and testing within marine or defense environments, and a strong background in hardware evaluation, data analysis, and system trade studies.

Key Responsibilities:

• Lead R&D initiatives in maritime acoustic sensing and underwater signal systems for autonomous vessel applications.

• Evaluate and benchmark acoustic sensors and subsystems (e.g., sonar arrays, hydrophones, acoustic modems, Doppler sensors) across commercial and defense-grade offerings.

• Design and execute experiments for acoustic performance testing, calibration, and environmental validation in laboratory and sea-trial conditions.

• Develop and analyze trade studies comparing acoustic hardware and architectures to inform system selection, performance optimization, and integration paths.

• Design and document system architectures for acoustic data acquisition, amplification, filtering, and digital conversion.

• Collaborate with autonomy, software, and mechanical teams to integrate acoustic systems into vessel control and perception frameworks.

• Develop and validate signal conditioning and analog front-end circuitry for low-noise, high-fidelity acoustic measurements.

• Author detailed R&D documentation, including test reports, design specifications, and performance assessments.

• Contribute to system safety, reliability, and environmental qualification efforts, including compliance with applicable maritime and defense standards.

• Mentor junior engineers and contribute to Saronic’s acoustic sensing roadmap and experimental methodologies.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, Acoustics, or related discipline.

• 7+ years of experience in acoustic system design, integration, or testing - preferably in commercial marine, defense, or undersea applications.

• Expertise with underwater acoustics, including sonar, hydrophones, and acoustic communication systems.

• Experience in hardware benchmarking, R&D testing, and performance analysis of acoustic sensors and electronics.

• Strong understanding of signal processing concepts, analog front-end design, and data acquisition systems.

• Familiarity with marine environmental factors affecting acoustic propagation (temperature, salinity, depth, and noise).

• Proficiency in schematic design and documentation tools (e.g., Altium, AutoCAD Electrical, or SolidWorks Electrical).

• Hands-on experience with lab instrumentation (oscilloscopes, spectrum analyzers, data loggers, acoustic test equipment).

• Strong technical writing and presentation skills, with ability to produce rigorous R&D and evaluation documentation.

• Comfortable working in laboratory, dockside, and sea-trial environments.

Preferred Qualifications:

• Experience developing or integrating active and passive sonar systems for maritime platforms.

• Familiarity with acoustic transducer design, impedance matching, and waterproofing methods.

• Knowledge of marine and defense standards (MIL-STD-167, MIL-STD-461, IEC 60529, etc.).

• Experience with acoustic modeling software (e.g., COMSOL, MATLAB, BELLHOP, or equivalent).

• Background in sensor fusion and data analysis pipelines for multi-sensor acoustic systems.

• Experience supporting hardware-in-the-loop (HITL) or real-time signal processing systems.

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services

• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care

• Saronic pays 100% of the premium for employees and 80% for dependents

• Time Off: Generous PTO and Holidays

• Parental Leave: Paid maternity and paternity leave to support new parents

• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses

• Retirement Plan: 401(k) plan

• Stock Options: Equity options to give employees a stake in the company’s success

• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage

• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Physical Requirements:

• Prolonged periods of sitting at a desk and working on a computer.

• Occasional standing and walking within the office.

• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.

• Visual acuity to read screens, documents, and reports.

• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.

• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Additional Information:

• This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

XML job scraping automation by YubHub

Our team is focused on making boats go and perform tasks with no human involvement. This job is available at multiple levels, including entry, senior, and staff.

The successful candidate will develop algorithms and models which allow boats to sense and navigate, as well as develop metrics which allow quantitative analysis of improvements and regressions in boat performance.

Responsibilities:

• Develop algorithms and models which allow boats to sense and navigate
• Develop metrics which allow quantitative analysis of improvements and regressions in boat performance
• Analyze and work with large data systems to enable model training and evaluation

Requirements:

• Strong programming fundamentals
• Extensive programming experience and demonstrated ability to work on large systems
• Computing Fundamentals
• A general understanding of operating systems and or similar large scale systems
• An understanding of basic computer architecture
• A demonstrated willingness to learn and pivot based on new information

Useful Skills:

• Familiarity with deep learning frameworks (e.g., TensorFlow, PyTorch)
• Understanding of various filters and their applications
• Proficiency in Rust
• Experience with maritime or autonomous vehicle projects
• Experience with signals processing or sensor fusion
• Experience with low latency inference and tracking pipelines
• Experience with path planning algorithms
• Experience training and deploying multi modal models
• Experience with various sensors including radar, cameras, and lidar
• Experience developing and optimizing deployed ML systems

Physical Demands:

• Prolonged periods of sitting at a desk and working on a computer
• Occasional standing and walking within the office
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment
• Visual acuity to read screens, documents, and reports
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages)

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Additional Information:

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

XML job scraping automation by YubHub

You'll collaborate closely with embedded software engineers, mechanical engineers, and physicists to deliver cutting-edge quantum control solutions. We're looking for someone who will deepen our team's expertise in low-noise mixed-signal board design , including specifying and designing critical circuit components such as low-noise power supply rails, precise clock distribution, and high-speed transceivers.

We're seeking an experienced Electrical Engineer with a proven track record of leading projects across diverse teams and driving technical excellence in fast-paced, high-growth environments. The ideal candidate combines deep technical expertise with exceptional communication and leadership skills, effectively translating complex concepts for diverse audiences and influencing key design and delivery decisions. This individual fosters a culture of innovation, accountability, and rigorous engineering design, while mentoring others to achieve their highest potential.

Responsibilities:

• Collaborate with internal and external team members to generate system requirements
• Capture circuit board schematic and layout for designs containing digital, analog, and RF components
• Create and execute test plans using oscilloscopes, spectrum analyzers, and VNAs (also qubits!)

Required Qualifications:

• Previous experience working in startups or dynamic work environments
• BS or MS degree in EE, or equivalent, with 10+ years experience
• Ability to operate standard lab equipment (oscilloscopes, spectrum analyzers, and VNAs)
• Excellent communication skills and an ability to interact across different disciplines
• Demonstrated success taking designs from conception through the full design cycle, including manufacturing and test

Preferred Qualifications:

• Experience with analog design and simulation (SPICE or equivalent)
• Knowledge of signal processing concepts: Nyquist zones, convolution, cross-correlation, numerically-controlled oscillators
• Focus on supporting other teams and a desire to jump in and help
• Exposure to Verilog/VHDL and digital hardware design and FPGA development
• Familiarity with Python scripting (especially scientific Python libraries like numpy and scipy)
• Understanding of RF design and test

Additional Information:

As engineering leaders, we value diversity and are committed to building a culture of inclusion to attract and engage innovative thinkers. Our technology, meant to serve all of humanity, cannot succeed if those who built it do not mirror the diversity of the communities we serve. Applications from women, minorities, and other under-represented groups are encouraged.

XML job scraping automation by YubHub

In this role, you will define FPGA architectures, implement high-performance digital logic, and collaborate closely with hardware, firmware, and quantum engineering teams to build scalable, low-latency control systems.

Key responsibilities include: Developing and improving a custom microprocessor responsible for waveform generation and critical logic to operate a quantum computer Working closely with hardware, firmware, and software teams to define architecture, data flow, and interfaces Implementing, simulating, and verifying designs including DSP pipelines, control logic, and high-speed I/O Optimizing designs for latency, resource utilization, and robustness in production environments Developing and maintaining testbenches, verification flows, and CI Supporting bring-up, lab validation, and debugging in collaboration with Quantum Engineering on actual quantum computers Contributing to the long-term roadmap for the architecture of Rigetti’s control systems.

XML job scraping automation by YubHub

As the portfolio grows, this role is expected to evolve into team leadership. You'll play a key role in shaping how risk decisions translate into customer experience, product growth, and long-term portfolio performance.

Key responsibilities include:

• Building and operationalizing the credit strategy

• Translating underwriting vision into formal credit policy and decision frameworks

• Defining approval logic, segmentation strategy, and limit-setting methodology

• Establishing portfolio guardrails aligned to loss targets and unit economics

• Designing account management strategies across the customer lifecycle

• Developing early portfolio management approaches including exposure adjustments, servicing strategies, and input into collections processes as the portfolio matures

• Defining portfolio monitoring frameworks and escalation triggers for emerging credit risk trends

• Building the data-driven risk engine

• Implementing credit policy in our underwriting platform

• Evaluating and integrating key data sources (bureau, income, debt signals)

• Ensuring decision logic is structured, testable, and scalable

• Partnering with Engineering and Data to build monitoring and feedback loops

• Owning portfolio performance post-launch

• Defining and tracking core KPIs (approval rate, early delinquency, loss rate, exposure, utilization, etc.)

• Monitoring vintage performance and segment behavior

• Recommending and implementing strategy adjustments based on observed risk trends

• Presenting risk performance, insights, and recommendations to senior leadership

• Driving data-informed risk and growth decisions

• Using SQL to independently evaluate underwriting decisions and trade-offs

• Analyzing drivers of credit performance and portfolio outcomes

• Partnering with Finance on forecasting and risk-adjusted economics

• Driving cross-functional execution

• Partnering with Compliance to ensure the underwriting program is well-documented and built to scale

• Working with Partnerships, Procurement, and Legal on evaluating and onboarding credit data providers

• Supporting broader risk initiatives across our business charge card portfolio during the build phase

Requirements include:

• 6+ years of experience in consumer credit risk
• Experience launching or materially redesigning a consumer lending product
• Experience implementing credit policy within a decisioning or underwriting platform is strongly preferred
• Demonstrated experience owning risk strategy and monitoring portfolio performance
• Deep familiarity with bureau data and core credit risk metrics (approval rate, loss rate, vintage curves, etc.)
• Experience presenting risk insights and strategy recommendations to senior stakeholders
• Experience translating policy into production decision logic
• Strong SQL skills and comfort working directly with data
• Comfortable building in ambiguity and operating in a 0→1 environment

Total rewards package includes base salary, equity, and benefits. Salary and equity ranges are highly competitive within the SaaS and fintech industry.

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This role is based full-time in our Vancouver, BC office.

Responsibilities:

• Own full-cycle recruiting for technical roles across LayerZero: sourcing, screening, coordinating, and closing
• Partner directly with hiring managers and engineers to define role profiles, build pipelines, and calibrate signal
• Craft bespoke outbound strategies tailored to high-caliber candidates (think Principal Engineers, Compiler Experts, Core Infra Builders)
• Deliver high-quality candidate experiences at pace,speed matters, but quality matters more
• Run structured, signal-rich interviews and guide interviewers through calibration and debriefs
• Become a system builder: help scale and improve how we run recruiting, not just run reqs

About You:

• You've recruited for deeply technical roles before (backend, infra, systems, protocol, Rust)
• You know how to write compelling outbound that gets replies,and understand how to tailor messaging across profiles
• You're comfortable assessing resumes, probing for signal, and escalating red flags early
• You care about candidate experience, but not at the expense of rigor
• You're motivated by impact: you want to help define the DNA of an engineering org at the frontier

Bonus Points:

• You've hired in early-stage environments before (0→1 recruiting muscle)
• You're fluent in Web3, or technical enough to ramp quickly
• You've run debriefs, driven interviewer training, or contributed to rubric design

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Key Responsibilities

• Design, develop, and optimize FPGA-based digital systems for real-time defense applications
• Implement RTL designs (VHDL, Verilog, SystemVerilog) for high-speed data processing
• Perform simulation, synthesis, timing analysis, and timing closure
• Develop and integrate DSP algorithms in hardware (e.g., FFTs, filters, modulation)
• Interface with high-speed ADCs/DACs, RF front ends, and embedded processors
• Support hardware bring-up, debugging, and validation in lab environments
• Collaborate with RF, systems, and software engineers to ensure system performance
• Document designs, requirements, and verification results

Required Qualifications

• Bachelor’s degree in Electrical or Computer Engineering (or related field)
• Minimum of 2 years' professional experience within the aerospace & defense industry
• Minimum 2 years' experience using FPGA toolchains (Xilinx Vivado, Intel Quartus)
• Proficiency in HDLs (VHDL, Verilog, or SystemVerilog)
• Strong understanding of digital design fundamentals (timing, clock domains, pipelining)
• Experience with simulation/verification tools (ModelSim, Questa, etc.)
• Ability to obtain and maintain a U.S. security clearance

ITAR Regulations

• To conform to U.S. Government technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicant must be a US Citizen, Green Card holder, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

Bonus Points

• Experience with defense systems (radar, EW, communications)
• Knowledge of digital signal processing (DSP) implementation and fixed-point math
• Proficient in scripting languages (Tcl, bash, Python)
• Familiarity with embedded software integration on SoCs
• Experience with high-speed interfaces (JESD204, PCIe, Ethernet, DDR)
• Familiarity with SoC platforms (e.g., Xilinx Zynq, RFSoC)
• Understanding of RF signal chains and systems

Additional Information

CX2 is a next-generation defense technology company securing spectrum dominance for the United States and its allies. We build AI-enabled hardware and software platforms to detect, disrupt, and defend the electromagnetic spectrum across land, air, sea, and space. Our systems are deployed in the most contested operational environments in the world. We’re backed by leading venture investors in the defense ecosystem and led by founders with track records at Meta, SpaceX, Epirus, and the U.S. Department of Defense.

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Key responsibilities include:

• Supporting system integration of RF hardware, software, and platform-level components (air, land, sea, or space)
• Planning and executing test & evaluation (T&E) activities, including lab and field testing
• Generating and maintaining technical documentation, requirements, and verification artifacts
• Meeting with clients and stakeholders to identify, gather, and document technical requirements
• Analyzing project technical features, creating diagrams, and building models to define system behavior
• Ensuring that requirements are correct (validation) and that the final system meets those requirements (verification)
• Maintaining traceability of requirements from design to testing to prevent scope creep
• Working with software, RF, hardware, and project management teams to align design with user needs

Required qualifications include:

• A bachelor's degree in Systems Engineering, Computer Sciences, Physics, or a related field
• Experience with simulation tools, modeling tools, and requirements management software
• A strong understanding of signal processing fundamentals (FFT, filtering, detection theory)
• Experience with modeling and simulation tools (e.g., MATLAB, Simulink, Python)
• Familiarity with RF test equipment (spectrum analyzers, signal generators, network analyzers)
• The ability to obtain and maintain a U.S. security clearance

To conform to U.S. Government export regulations, applicants must be a U.S. citizen, green card holder, or be eligible to obtain the required authorizations from the U.S. Department of State.

What we offer includes:

• A competitive salary, stock options, and benefits, including health, vision, and dental
• 401K enrollment at 90 days
• Generous PTO + most federal holidays observed
• A collaborative and inclusive work environment
• Access to the latest tools and technologies
• High levels of responsibility and autonomy
• Professional growth and development opportunities
• Access to the hardest problems in electronic warfare

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Key responsibilities include designing, developing, and testing electronic hardware for drone detection and mitigation systems, working on RF systems including signal detection, jamming, and communication modules, and integrating sensors (radar, EO/IR, acoustic, RF) into defense platforms.

The ideal candidate will have a strong background in electrical engineering, experience with analog and digital circuit design, PCB design tools, embedded systems, and microcontrollers, as well as familiarity with RF systems, antennas, and signal processing.

In addition to technical skills, the successful candidate will be able to work in fast-paced, mission-driven environments, collaborate with cross-functional teams, and communicate effectively with stakeholders.

As an Electrical Engineer at CX2, you will have the opportunity to work on high-priority projects, contribute to the development of cutting-edge technologies, and make a meaningful impact on national security.

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Responsibilities:

• Design, characterize, and deliver algorithms such as channelizers, frequency agile detection, adaptive filters, MIMO, wideband detectors, and other algorithms related to signal sorting
• Write and contribute to existing Python repositories using CUDA and PyTorch
• Own requirements, ICDs, and verification from concept through delivery
• Stay current: Track and insert advances in signal processing techniques and associated technologies, adaptive beamforming, RF machine learning, and resilient PNT for GPS-denied ops.

Required Qualifications:

• Masters Degree in Electrical, Computer or Systems Engineering or related field with Graduate study emphasis in Signal Processing; OR a Bachelor’s Degree in an Engineering discipline with 3-5 years relevant working Signal Processing Experience
• Intermediate to advanced proficiency in Python
• Willingness to support critical test events that occasionally require extended hours/weekends.
• Ability to obtain and maintain a security clearance. Learn more about Security Clearances here.
• Must be a U.S. Person (see ITAR Regulations below) due to required access to U.S. export-controlled information or facilities

Bonus Points:

• PhD in Electrical Engineering, Computer Engineering, or related field
• 5+ years’ experience with EW subsystems and payloads.
• EA/ECM technique design (deception, Digital RF Memory, coherent/non-coherent techniques).
• Comms system design (LPI/LPD, Waveform-of-Interest exploitation)
• RF machine learning for emitter ID, modulation/classification, anomaly detection, PDW creation
• Tools Experience: ADS/AWR/SystemVue, MATLAB/Simulink, Python (NumPy/SciPy), GNU Radio/SDR (USRP/RFSoC), VITA-49; HDL/firmware experience also helpful (Vivado/Quartus/Libero).
• Clearance: Active Secret or ability to obtain and maintain; TS/SCI eligibility preferred. ITAR/EAR-controlled work.
• Field work: supporting periodic travel for flight tests and customer demonstrations/support
• Mindset: Builder-tester who loves first-principles RF, rapid lab iteration, and getting hardware flying fast.

What We Offer:

• Competitive salary, stock options and benefits, including health, vision and dental.
• 401K enrollment at 90 days.
• Generous PTO + most Federal Holidays observed.
• Collaborative and inclusive work environment.
• Access to the latest tools and technologies.
• High levels of responsibility and autonomy.
• Professional growth and development opportunities.
• Access to the hardest problems in electronic warfare.

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This role requires an onsite presence in our El Segundo, CA HQ; a remote work environment is not considered for this opportunity.

Key Responsibilities:

• Design, validate & deliver RF payload subsystems: Design, Integration and Testing of Antennas, RF front ends, SDRs and provide validation of operation. Support development and analysis of RF performance metrics.

• Own requirements, ICDs, and verification from concept through delivery

• Stay current: Track and insert advances in relevant technologies, SDRs, RF Systems, RF machine learning, and PNT.

Qualifications:

• BS/MS in Electrical Engineering, Computer Engineering, or related field

• Antenna and receiver design across analog/RF/mixed-signal domains: mixers, PLLs/LOs, gain/linearity/noise trades; ability to turn simulations into reality.

• Channelizers & wideband architectures: filter banks, analog/digital down conversion, sample-rate planning, clocking/synchronization.

• Willingness to support critical test events that occasionally require extended hours/weekends

• Ability to obtain and maintain a security clearance

• Must be a U.S. Person (see ITAR Regulations below) due to required access to U.S. export-controlled information or facilities

Bonus Points:

• PhD in Electrical Engineering, Computer Engineering, or related field

• 5+ years’ experience with EW subsystems and payloads

• EA/ECM technique design (deception, Digital RF Memory, coherent/non-coherent techniques)

• Digital Signal processing: Design characterize and deliver channelizers, wideband detection/classification, MIMO/digital-arrays, and algorithms in MATLAB/Python/C++

• Communication / Waveform system design

• RF machine learning for emitter ID, modulation/classification, anomaly detection, PDW creation

• Tools Experience: ADS/AWR/SystemVue, MATLAB/Simulink, Python (NumPy/SciPy), GNU Radio/SDR (USRP/RFSoC), VITA-49; HDL/firmware experience; also helpful (Vivado/Quartus/Libero).

• Clearance: Active Secret or ability to obtain and maintain; TS/SCI eligibility preferred. ITAR/EAR-controlled work. Learn more about Security Clearances here.

• Field work: supporting periodic travel for flight tests and customer demonstrations/support

• Mindset: Builder-tester who loves first-principles RF, rapid lab iteration, and getting hardware flying fast

What We Offer:

• Competitive salary, stock options and benefits, including health, vision and dental.

• 401K enrollment at 90 days.

• Generous PTO + most Federal Holidays observed.

• Collaborative and inclusive work environment.

• Access to the latest tools and technologies.

• High levels of responsibility and autonomy.

• Professional growth and development opportunities.

• Access to the hardest problems in electronic warfare.

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We are seeking an accomplished architect with expertise in high-speed analog and mixed-signal IC design. You will thrive on solving complex challenges and leading teams to deliver innovative transceiver solutions for silicon photonics.

Key responsibilities include:

Architecting 224G & 448G analog transceiver solutions for silicon photonics. Collaborating across engineering teams to drive integration and innovation. Mentoring engineers and supporting technical growth. Representing Synopsys in industry forums. Shaping technical roadmaps for emerging markets. Ensuring designs meet stringent performance and reliability standards.

As an Analog Design Architect, you will advance Synopsys' leadership in silicon photonics and high-speed analog design. You will enable next-generation data center and cloud connectivity, drive technical excellence and innovation, promote collaboration and knowledge sharing, influence industry standards, and open new business opportunities.

Requirements include:

Deep experience in high-speed analog/mixed-signal IC and transceiver design. Expertise in 224G & 448G architectures and silicon photonics integration. Proficiency with EDA tools and IC layout. Strong grasp of signal integrity and power management. Ability to translate technical needs into scalable solutions.

Ideal candidates are innovative and collaborative leaders with a clear communication style, detail-oriented and adaptable, and passionate about advancing technology.

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You are a passionate engineer with a solid foundation in electrical and electronic engineering, specializing in electromagnetics and high-frequency domains. With 5–7 years of industry experience, you thrive in customer-facing roles and enjoy solving real-world engineering problems. Your deep technical expertise in simulation tools, especially Ansys HFSS, SIwave, or Q3D Extractor, is matched by your ability to communicate complex concepts in an accessible way.

As a Signal & Power Integrity Staff Engineer, you will lead and assist in coordinating technical activities throughout the sales opportunity lifecycle, including technical discovery, product presentations, demonstrations, and evaluations. You will provide best-in-class solutions involving PCB/system interactions for signal and power integrity flows, EMI/EMC, collaborating across regions and functions.

Key responsibilities include:

• Lead and assist in coordinating technical activities throughout the sales opportunity lifecycle
• Provide best-in-class solutions involving PCB/system interactions for signal and power integrity flows, EMI/EMC
• Participate in external and internal events to enhance SI/PI/EMI simulation solutions and contribute to professional growth and marketing efforts
• Act as a product expert for Ansys products, engaging with customers to understand their design needs and workflows, highlighting Ansys’ value proposition
• Work closely with product development teams to translate customer requirements into innovative product features and test new releases on industrial problems
• Deliver consulting services and conduct introductory or intermediate training classes to empower customers and colleagues

In this role, you will drive customer success by integrating advanced simulation tools into their engineering workflows, enabling efficient and accurate design outcomes. You will enhance Synopsys’ reputation for technical excellence and customer-centric innovation through tailored solution delivery. You will accelerate the adoption of high-frequency simulation technologies, supporting the development of next-generation products in automotive, communications, and IoT industries.

To be successful in this role, you will need:

• MS/PhD in Electrical/Electronic Engineering or equivalent, with specialization in electromagnetics
• 5–7 years of experience in the high-frequency domain, using simulation tools for real-world applications
• Expertise with Ansys HFSS, SIwave, Q3D Extractor, or comparable industry simulation software
• Familiarity with RF and Microwave concepts. Basic-intermediate level of understanding of signal and power integrity
• Ability to research, debug, and resolve software-related issues efficiently

Added advantages include experience building automation workflows for RF/Signal/Power Integrity/EMC simulation flows, knowledge of commercial packages such as ADS, MATLAB, Python, and CST, measurement & lab skills, analysis and problem-solving skills, hardware / system knowledge.

As a member of the Electronics High Frequency team within the Ansys Customer Excellence group, you will work collaboratively across disciplines and regions to deliver innovative solutions. The team is dedicated to advancing engineering capabilities, supporting customer success, and driving business growth through technical leadership and continuous learning.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a High Frequency Electromagnetics Application Engineer, you will be part of the Electronics High Frequency team within the Ansys Customer Excellence group. This team is comprised of experts in RF, signal integrity, and simulation technologies, working collaboratively across disciplines and regions to deliver innovative solutions.

Your primary responsibilities will include:

• Leading and assisting in coordinating technical activities throughout the sales opportunity lifecycle, including technical discovery, product presentations, demonstrations, and evaluations.
• Providing best-in-class solutions involving RF, antenna flows, and PCB/system interactions for signal and power integrity flows, EMI/EMC, collaborating across regions and functions.
• Participating in external and internal events to enhance RF/SI/PI/EMI simulation solutions and contribute to professional growth and marketing efforts.
• Acting as a product expert for Ansys products, engaging with customers to understand their design needs and workflows, highlighting Ansys' value proposition.
• Working closely with product development teams to translate customer requirements into innovative product features and test new releases on industrial problems.
• Delivering consulting services and conducting introductory or intermediate training classes to empower customers and colleagues.

In this role, you will drive customer success by integrating advanced simulation tools into their engineering workflows, enabling efficient and accurate design outcomes. You will also enhance Synopsys' reputation for technical excellence and customer-centric innovation through tailored solution delivery.

Requirements:

• MS/PhD in Electrical/Electronic Engineering or equivalent, with specialization in electromagnetics.
• 5–7 years of experience in the high-frequency domain, using simulation tools for real-world applications.
• Expertise with Ansys HFSS, SIwave, Q3D Extractor, or comparable industry simulation software.
• Understanding of high-frequency, microwave, and antenna concepts, including S-parameters, wave propagation, and radiation patterns.
• Ability to research, debug, and resolve software-related issues efficiently.

Preferred qualifications include familiarity with signal and power integrity simulation, experience building automation workflows for RF/Signal/Power Integrity/EMC simulation flows, knowledge of commercial packages such as ADS, SystemVue, Simulink, AWR, CST, FEKO, and awareness of 5G systems, phased array, digital beamforming, microwave components, communication, and radar systems.

If you are a logical problem-solver with strong interpersonal and communication skills, highly organized and adept at time management, professional, business-oriented, and driven to succeed in fast-paced environments, we encourage you to apply.

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We are seeking a skilled Firmware Design Engineer to join our team. As a Firmware Design Engineer, you will be responsible for designing, implementing, and validating firmware for embedded microprocessors in advanced SerDes and PHY IP.

Key Responsibilities:

• Architect, implement, and validate firmware for embedded microprocessors in advanced SerDes and PHY IP.
• Lead silicon bring-up and debug cycles, supporting lab triage, instrumented root-cause analysis, and cross-functional closure with design, DV, validation, and applications teams.
• Apply mixed-signal debugging expertise to isolate HW/FW boundary issues, leveraging knowledge of analog behavior, clocks/resets, power states, and link training.
• Develop high-quality embedded code in C/C++, ensuring robust design reviews, code reviews, unit testing, and disciplined defect prevention practices.
• Scale automation through CI/CD pipelines using Jenkins and test frameworks to improve coverage, reliability, and release confidence.
• Define validation strategies, create automated test cases, and drive coverage analysis across multiple firmware projects.
• Build and maintain AI-assisted firmware workflows using tools such as Cursor, focusing on prompt/trace hygiene, guardrails, and verification practices.
• Operationalize agentic AI patterns for firmware development, including planning, code generation, refactoring, test creation, log triage, and regression analysis with explicit human review points.
• Author and curate reusable rules, skills, and commands to standardize AI usage (coding standards, spec templates, “definition of done,” test expectations, and safety checks).
• Lead process maturity initiatives, driving adoption of coding standards, branching/release hygiene, documentation quality, and review discipline, making adherence measurable.
• Operationalize status and quality tracking via JIRA dashboards and Confluence, providing clear, repeatable reporting on best-practice and AI-workflow adoption.
• Mentor and provide technical leadership, elevating team capability through coaching, review guidance, and hands-on problem solving in critical debug cycles.

Requirements:

• Embedded firmware experience: 5+ years building and debugging embedded firmware for silicon products (bring-up, lab debug, sustained maintenance).
• Programming: Expert in C/C++; strong scripting proficiency in Python (plus Bash and/or Tcl).
• Debug: Demonstrated strength in silicon bring-up, lab instrumentation, and HW/FW boundary root-cause analysis.
• Mixed-signal systems: Practical experience debugging systems involving analog and digital behavior (SerDes/PHY, clocking, resets, power, signal integrity impacts).
• Validation and automation: Proven ability to build automation, test frameworks, and coverage strategy; experience with Jenkins CI/CD.
• AI tooling: Hands-on experience using Cursor (or equivalent) in production engineering workflows, including building reusable prompts/workflows and enforcing verification/quality gates.
• Agentic workflows: Experience defining agentic workflows with clear boundaries, review points, and safety rails (including when not to use AI).
• Process leadership: Track record of scaling best practices across a team (reviews, test discipline, release hygiene, documentation standards).
• Collaboration: Strong cross-functional communication across firmware, hardware/design, DV/validation, and multi-site teams.
• Education: BSEE/MSEE (or equivalent practical experience).

We offer a competitive salary and benefits package, as well as opportunities for professional growth and development.

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We currently have 614 open roles

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are a talented engineering professional with a deep passion for leveraging simulation software to solve complex challenges. You thrive in dynamic environments, demonstrating strong technical acumen and the ability to build trusted relationships with customers. Your experience spans across electrical engineering and advanced simulation tools, and you possess a comprehensive understanding of industry applications, including IC and 3DIC design, power integrity, signal integrity, and EMI.

What You’ll Be Doing:

• Lead and assist in coordinating technical activities throughout sales opportunities, including customer meetings, product presentations, demonstrations, and evaluations.

• Analyze customer technical needs, infrastructure, operations, and engineering workflows to identify optimal solutions.

• Create and demonstrate simulation solutions that streamline workflows and support the software sales process.

• Participate in internal initiatives to enhance solution suites, presales/sales enablement, and personal professional development.

• Articulate Synopsys' value proposition across its portfolio of products, tailoring messaging to varied customer requirements.

• Instruct introductory and intermediate training classes on Synopsys product usage, fostering knowledge and adoption among customers.

• Develop elegant, practical solutions for complex business problems by collaborating with cross-functional teams.

• Build technical credibility with customers and translate their needs into actionable product development requests.

• Deliver hands-on deployment services, ensuring customer success metrics are achieved and exceeded.

• Perform other duties as assigned to support customer engagement and product excellence.

The Impact You Will Have:

• Drive adoption of Synopsys software solutions, enabling customers to solve engineering challenges efficiently.

• Facilitate successful sales outcomes by providing expert technical support and guidance throughout the opportunity lifecycle.

• Enhance customer satisfaction and loyalty by delivering tailored, high-impact simulation solutions.

• Contribute to product innovation by translating real-world customer needs into development requests.

• Support cross-team collaboration, enriching the solution suite and enabling continuous improvement.

• Elevate Synopsys’s reputation as a trusted partner in engineering simulation and product development.

• Empower customers to deliver radically better products through advanced simulation and technical expertise.

What You’ll Need:

• Master’s degree in Electrical Engineering or a related technical discipline.

• Minimum of 5 years’ experience in an engineering software environment; 3 years is a plus.

• Demonstrated proficiency with Synopsys software or similar commercial CAE, CAD, EDA packages.

• Strong knowledge of Power Integrity (PI), Signal Integrity (SI), and EMI simulation and measurement.

• Exceptional interpersonal and communication skills, including webinar and presentation facilitation.

• Fluent English writing and presentation skills.

• Logical problem-solving approach with clear communication of solutions to customers.

• Professional image and business acumen in customer interactions.

• Organizational and follow-up skills with a sense of urgency.

• Python programming skills and IC/3DIC design knowledge are a plus.

• Ability to travel up to 60% as required.

Who You Are:

• Customer-focused and service-oriented, always striving for excellence.

• Self-motivated with a passion for technical innovation and continuous learning.

• Collaborative, able to work effectively across teams and disciplines.

• Adaptable and resilient, comfortable handling multiple projects and changing priorities.

• Detail-oriented and organized, delivering high-quality solutions on time.

• Strong communicator, capable of engaging diverse audiences and fostering technical credibility.

• Professional, projecting confidence and expertise in all customer interactions.

The Team You’ll Be A Part Of:

You will join an energetic, collaborative team of engineering professionals focused on driving customer success with ANSYS software solutions. The team is committed to continuous innovation, professional growth, and delivering exceptional value to regional accounts. Together, you will tackle complex engineering challenges, support sales initiatives, and contribute to the development and enhancement of industry-leading simulation products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Job Description:

As an intern in the Analog Design Engineering team, you will design, verify, and validate high-performance, high-speed analog circuits, focusing on next-generation Phase Lock Loops (PLLs) and related blocks for world-leading SOCs in advanced CMOS technologies. You will participate in the design of Delay Locked Loops (DLL), phase mixers, and custom digital blocks used in SERDES interfaces. You will contribute to test bench creation, specification generation, analog circuit design, and layout optimization. You will assist with documentation, design debugging, and silicon evaluation to ensure robust and reliable circuit performance. You will engage with cross-functional teams, sharing ideas and collaborating to solve complex engineering challenges.

Requirements:

• Currently pursuing a university degree in Electronics Engineering or related field.
• Understanding of CMOS technologies; experience with analog and mixed-signal IC design is a plus.
• Strong written and verbal communication skills, problem-solving ability, and organizational skills.
• Ability to work collaboratively and build relationships within a team environment.

Program Facts:

• Program Length: 8 weeks
• Location: Gdansk, Poland
• Working Model: Onsite working
• Full-Time
• Start Date: July 2026

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We currently have 613 open roles

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are a dedicated and detail-oriented engineer with a passion for unraveling the complexities of high-speed, mixed-signal circuits. You thrive in collaborative environments, working seamlessly with diverse teams to overcome technical challenges and achieve shared goals. Your strong theoretical foundation is complemented by extensive hands-on experience in silicon validation, and you excel in both designing and implementing test methodologies that push the boundaries of what’s possible.

You are adaptable and resourceful, eager to tackle new problems and continually expand your technical repertoire. Your curiosity drives you to stay up-to-date with the latest advancements in validation technologies, and you are comfortable navigating the fast-paced, ever-evolving landscape of semiconductor innovation. Whether you’re analyzing intricate data sets, designing custom test hardware, or troubleshooting in the lab, you approach each task with meticulous attention to detail and an unwavering commitment to quality and reliability.

You communicate effectively, translating complex technical findings into actionable insights for colleagues and customers alike. Your organizational skills ensure that your projects run smoothly from conception through to completion, and your enthusiasm for hands-on lab work is matched by your drive to mentor and share knowledge with others. If you’re eager to make a tangible impact on the next generation of high-speed silicon solutions, we want you on our team.

Collaborating with cross-functional teams,including analog and systems designers, applications engineers, and customers,to resolve technical challenges and demonstrate leading-edge product performance.

Analyzing and characterizing circuit behavior and limitations in both silicon validation and characterization environments.

Developing and executing comprehensive test plans to ensure products meet rigorous standards and protocol specifications.

Specifying, sourcing, and implementing advanced test equipment and components to support innovative test methodologies.

Generating detailed test reports, meticulously documenting results, methodologies, and recommendations for internal and external stakeholders.

Designing and developing custom test boards and hardware solutions to facilitate robust product validation and evaluation.

Debugging and troubleshooting electronic circuits, investigating and resolving product non-conformance issues to ensure top-tier quality.

Ensuring the delivery of high-performance, reliable silicon IP solutions that power next-generation technologies.

Driving continuous improvement in product quality and compliance with industry standards.

Accelerating time-to-market for cutting-edge mixed-signal IP by streamlining validation and verification processes.

Strengthening Synopsys’ reputation as an industry leader through exceptional technical execution and customer support.

Identifying and resolving critical bottlenecks in product development, leading to more robust and scalable solutions.

Contributing to a culture of innovation and knowledge sharing within the R&D team.

Master’s degree in Electrical or Electronics Engineering (or equivalent field).

Minimum 5 years of hands-on experience in post-silicon validation, lab instrumentation, characterization, and debug.

Strong knowledge of analog and mixed-signal circuit design and operation, including familiarity with ADC/DAC and SerDes architectures.

Proficiency in software programming (such as MatLab and Python) for test automation and comprehensive data analysis.

Demonstrated expertise in using advanced lab equipment (BERTs, oscilloscopes, VNAs, TDRs) for high-speed circuit validation.

Experience in schematic entry, PCB design, and layout as well as data analysis, data review, and data mining for test results.

Knowledge of signal integrity and power integrity principles, and familiarity with PAM-4 signaling test and debug.

An analytical thinker with a passion for hands-on problem solving and continuous learning.

Proactive, adaptable, and eager to take on new challenges in a fast-paced, innovative environment.

Excellent communicator, capable of conveying complex technical details to both technical and non-technical audiences.

Collaborative team player who thrives on cross-functional teamwork and knowledge sharing.

Detail-oriented, with a commitment to delivering high-quality results and driving process improvements.

You’ll join a high-performing R&D team based in Mississauga, renowned for its expertise in high-speed, mixed-signal IP development and validation. Our team is dedicated to technical excellence, continuous innovation, and collaborative problem-solving. Working closely with analog and systems designers, applications engineers, and customers, you’ll play a pivotal role in shaping the next generation of advanced silicon solutions. Our culture emphasizes mentorship, knowledge sharing, and professional growth, ensuring that every team member has the support and resources needed to thrive.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Sr Staff Engineer in ASIC Digital Design, you will be responsible for architecting and designing embedded RISC microprocessor IP at both architectural and RTL levels. You will write comprehensive high-level architecture and micro-architecture specifications for processor designs, optimize designs for performance, speed, area, and power, and develop standalone Verilog testbenches to verify modules and ensure robust functionality.

You will also debug design issues and collaborate closely with verification teams to resolve bugs and improve quality. Additionally, you will maintain existing processor product lines and derivative products, ensuring ongoing reliability and innovation.

You will work closely with multi-site, multi-time zone, and multi-cultural teams on aspects like design, implementation, physical design, and verification. You will also develop and manage project plans, working closely with program managers to align deliverables and timelines.

As a member of the Synopsys ARC Processor hardware team, you will contribute to the advancement of processor technology and work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will join a team of passionate engineers dedicated to advancing processor technology and collaborate with global teams to deliver innovative solutions. You will work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will be responsible for driving improvements in design methodology and verification processes, raising the bar for quality and speed of delivery. You will also facilitate seamless collaboration across global teams, fostering a culture of shared knowledge and success.

You will support the growth and maintenance of Synopsys' processor product portfolio, ensuring market competitiveness. You will enable customers to build smarter, faster, and more energy-efficient devices by delivering optimized processor designs.

You will contribute to the evolution of silicon chip technology that powers intelligent systems worldwide.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You Are:

You are an accomplished engineering professional with a strong background in analog and mixed-signal circuit design. With over 12 years of industry experience, you have a deep understanding of circuit design fundamentals, device physics, and technology effects. You have successfully managed projects from specifications to silicon, and you are comfortable interfacing with both internal and external stakeholders. You are a proactive team player with excellent problem-solving skills and a knack for managing complex projects. Your high energy and flexible personality allow you to go the extra mile, fostering collaboration and driving projects to successful completion. You are adept at conflict resolution and possess strong customer-facing skills, making you an invaluable asset to any high-performing team.

What You’ll Be Doing:

Managing analog and mixed-signal IP projects from specifications to silicon. Interacting with customers to guide them and help adapt our solutions to their needs. Handling customer queries and debugging problems efficiently. Aligning with and improving established design processes. Interfacing with internal and external stakeholders to ensure high engagement levels. Collaborating with a global team to co-develop Analog Full Custom IPs such as GPIOs, I2C, I3C, SMBUS, eMMC, SVID, Quad SPI, JTAG, and more.

The Impact You Will Have:

Driving the integration of advanced capabilities into System on Chips (SoCs). Enabling customers to meet unique performance, power, and size requirements. Accelerating the time-to-market for differentiated products with reduced risk. Enhancing the design and development of high-performance silicon IP. Improving customer satisfaction through efficient problem-solving and support. Contributing to the continuous innovation and technological advancements at Synopsys.

What You’ll Need:

Bachelor's or Master's degree in Electrical Engineering or a related field from a reputed institution. 12+ years of industry experience in analog and mixed-signal circuit design. Proven experience in managing projects from specifications to silicon. Strong understanding of circuit design fundamentals, device physics, and technology effects. Proficiency in spice simulations and various sub-micron design methodologies.

Who You Are:

A proactive team player with strong written and verbal communication skills. High energy individual with the ability to go the extra mile. Creative and flexible personality with excellent customer-facing skills. Demonstrates good analysis and problem-solving skills. Adept at conflict resolution and fostering collaboration among team members.

The Team You’ll Be A Part Of:

You will be part of a strong development team specializing in GPIOs, Specialty IOs, and General Purpose Analog IPs. The team is distributed globally, bringing together experienced professionals from various sites. Together, you will co-develop high-performance analog full custom IPs and work on projects that push the boundaries of technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your key responsibilities will include driving product adoption through competitive benchmarking, customer evaluations, and articulating product advantages to design teams and management. You will also deliver customer training, technical presentations, and hands-on workshops to maximize user proficiency and satisfaction.

In addition, you will provide tape-out support, troubleshoot complex timing issues, and ensure successful project completion. You will collaborate with R&D, marketing, and sales to relay customer feedback and influence product enhancements.

To succeed in this role, you will need expertise in Synopsys PrimeTime STA tool, with hands-on experience and deep knowledge of its features. You will also require strong understanding of timing corners, process variations, and signal integrity-related issues.

If you are a collaborative team player who values diverse perspectives and fosters inclusive environments, we encourage you to apply.

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As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.

You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.

You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.

You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.

You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.

To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.

You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.

You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.

Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You will be a part of a fast-growing analog and mixed-signal R&D team, dedicated to developing high-speed analog integrated circuits in the most advanced FinFET/GAA process nodes. You'll interact with a global, dynamic, multi-cultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.

As a Staff Engineer, you will be responsible for:

Developing and/or validating analog circuits considering electrical specifications and reliability constraints. Documenting simulation results and analyzing performance. Evaluating the impact of parasitic effects related to layout implementations and working with the layout team to minimize such effects, improving performance, power, and area. Defining and planning analog design activities for high-speed SerDes products. Collaborating with a global team of engineers to integrate and verify design solutions. Continuously learning and applying the latest advancements in FinFET/GAA process nodes to enhance design efficiency.

You will contribute to the development of high-speed SerDes products that enable high-performance chip-to-chip communications. You will enhance the performance, power efficiency, and reliability of analog integrated circuits in advanced CMOS technologies. You will support the integration of more capabilities into System-on-Chip (SoC) designs, accelerating time-to-market for innovative products.

You will be a part of a dynamic, multicultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.

The ideal candidate will have a good understanding of CMOS technologies and analog circuit design principles. They will have strong analysis, problem-solving, and organizational skills. They will have experience in analog and mixed-signal block design, with a focus on high-speed SERDES. They will be proficient in documenting and analyzing simulation results. They will be familiar with IC design packages and UNIX operating systems.

You will be a collaborative team player who thrives in a global, multicultural environment. You will be an effective communicator with strong written and verbal skills in English. You will be a proactive and self-motivated individual with a passion for innovation and continuous learning. You will be an analytical thinker with the ability to tackle complex design challenges and find creative solutions. You will be a detail-oriented engineer who values precision and accuracy in their work.

You will be rewarded with a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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As a High-Speed Interface Digital Design Manager, you will be responsible for managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement. You will drive architecture specification, digital design, and verification activities for current and next-generation products, engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met.

Key responsibilities include:

• Leading a high-performing digital and verification engineering team focused on the design and delivery of advanced SerDes IP
• Managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement
• Driving architecture specification, digital design, and verification activities for current and next-generation products
• Engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met

Requirements include:

• Bachelor's or Master's degree in Electrical Engineering or related field
• 10+ years of hands-on digital design and verification experience in the semiconductor industry
• 5+ years of proven leadership and people management experience, preferably in ASIC or IP development environments
• Deep knowledge of the ASIC development flow, including architecture specification, digital design, and verification methodologies
• Experience with high-speed interface protocols (e.g., PCIe, Ethernet, USB) and digital signal processing techniques
• Expertise in managing customer escalations and facilitating technical discussions during pre- and post-sales phases
• Proficiency with industry-standard EDA tools, scripting, and project management platforms

Benefits include:

• Comprehensive medical and healthcare plans
• Time away programs
• Family support
• ESPP
• Retirement plans
• Competitive salaries

If you are a strong leader with excellent team-building and mentoring skills, a customer-focused and results-oriented individual with sound decision-making abilities, a collaborative communicator able to build strong cross-functional alliances, organized, detail-oriented, and adept at managing multiple priorities efficiently, adaptable, proactive, and committed to continuous improvement, we encourage you to apply.

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As a Layout Design Engineer, you will be designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces. You will collaborate with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.

Responsibilities:

• Designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces.
• Collaborating with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.
• Performing floor planning, layout entry, and comprehensive verification to ensure design quality and compliance with foundry rules.
• Applying advanced techniques to mitigate signal integrity issues, ESD, and latch-up risks, including differential routing, shielding, and substrate biasing.
• Optimizing layouts for reliability, matching, and minimizing parasitic effects such as EM and IR drop.
• Supporting design porting activities to enable seamless migration of layouts across multiple foundry nodes and technology platforms.
• Documenting layout methodologies, best practices, and validation results to support knowledge sharing and continuous improvement.

Requirements:

• Bachelor or advanced degree in Electrical or Computer Engineering (or equivalent) with a solid background in transistor-level design.
• 5+ years of experience in analog and mixed-signal CMOS layout design, including complex integrated circuits.
• Expertise in deep submicron CMOS technologies and layout effects (matching, reliability, proximity, EM, IR, etc.).
• Proficiency in layout floor planning, verification, and quality validation using industry-standard EDA tools.
• Strong knowledge of signal integrity, ESD, and latch-up mitigation techniques.
• Familiarity with UNIX operating systems and scripting languages (TCL, Python) is a plus.
• Experience with Synopsys EDA tools is highly desirable.

Who You Are:

• Detail-oriented and quality-focused, with a commitment to delivering robust and reliable designs.
• Excellent communicator, able to articulate technical concepts clearly to diverse audiences.
• Collaborative team player who builds productive relationships and networks effectively.
• Self-motivated, organized, and able to manage multiple priorities in a dynamic environment.
• Strong problem-solving skills and critical judgment, with a proactive approach to overcoming challenges.
• Adaptable and eager to learn new technologies and methodologies.

The Impact You Will Have:

• Accelerate the development of cutting-edge silicon IP, enabling faster integration of advanced capabilities into SoCs.
• Enhance the performance, reliability, and manufacturability of high-speed interface solutions for next-generation applications.
• Reduce time-to-market and risk for customers by delivering high-quality, validated layout designs.
• Contribute to the innovation of analog and mixed-signal design methodologies within a global team.
• Support the creation of differentiated products that power the Era of Smart Everything, from AI to IoT and beyond.
• Foster a culture of collaboration, knowledge sharing, and technical excellence within the team and across the organization.

The Team You'll Be A Part Of:

You will join a dynamic, international team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoC solutions. Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As an Analog Design Engineer at Synopsys, you will be designing DDR I/O circuits for high-performance silicon IP, ensuring compliance with industry standards and customer requirements. You will also develop and optimize analog/mixed-signal circuit architectures, focusing on performance, power, and area efficiency.

Key responsibilities include:

• Designing DDR I/O circuits for high-performance silicon IP
• Developing and optimizing analog/mixed-signal circuit architectures
• Executing circuit design tasks using advanced CMOS processes and state-of-the-art layout methodologies
• Collaborating with internal development teams to integrate analog blocks into ASIC and SoC designs
• Assessing and resolving issues related to deep submicron process technologies

The ideal candidate will have a BTech/MTech in Electrical Engineering or related field, with strong knowledge of CMOS processes and deep submicron technology challenges. You should also have hands-on experience with analog/mixed-signal circuit design and layout methodologies, as well as familiarity with ASIC design flow and integration of analog blocks.

At Synopsys, we offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a passionate and detail-oriented engineer who thrives in the fast-paced world of advanced semiconductor layout. You possess a deep understanding of analog and mixed-signal CMOS design principles, with a particular focus on high-speed SerDes interfaces. Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.

What You’ll Be Doing:

• Drive layout development for high-speed SerDes physical interfaces and complex analog/mixed-signal CMOS blocks.

• Lead the complete layout design process, including floorplanning, verification, and quality assurance, with a strong emphasis on reliability and manufacturability.

• Port designs across multiple foundry nodes, ensuring optimal performance and compliance with technology-specific requirements.

• Implement advanced techniques for signal integrity, ESD, and latch-up mitigation, such as differential routing, shielding, and biasing.

• Collaborate closely with design, verification, and manufacturing teams to deliver robust and scalable layout solutions.

• Utilize Synopsys EDA tools and scripting languages (TCL, Python) to automate layout tasks and optimize workflow efficiency.

The Impact You Will Have:

• Enable Synopsys customers to achieve higher performance and reliability in their silicon designs.

• Accelerate the time-to-market for cutting-edge semiconductor products by delivering high-quality, manufacturable layouts.

• Enhance the robustness and scalability of Synopsys IP through meticulous attention to detail and innovative design solutions.

• Drive advancements in deep submicron CMOS technology adoption and integration.

• Foster a collaborative environment that supports knowledge sharing, mentorship, and professional growth.

• Support Synopsys’ leadership in chip design and verification by contributing to the development of industry-leading IP blocks.

What You’ll Need:

• MSc in Electrical/Computer Engineering (or equivalent).

• Minimum 3 years hands-on experience in analog and mixed-signal CMOS layout, including high-speed SerDes interfaces.

• Deep knowledge of deep submicron CMOS technologies and design for reliability (EM/IR, matching, proximity effects).

• Proficiency in layout floorplanning, porting designs across foundry nodes, and implementing signal integrity and ESD mitigation strategies.

• Experience with custom digital and high-speed digital layout, as well as Synopsys EDA tools.

• Strong skills in UNIX environments, including shell scripting and command-line operations.

• Familiarity with scripting languages such as TCL and Python.

Who You Are:

• Excellent problem-solving, organizational, and communication skills.

• Self-motivated and proactive, with the ability to work independently and as part of a team.

• Effective collaborator who values diverse perspectives and fosters inclusive teamwork.

• Adaptable and open to new challenges, with a commitment to continuous improvement.

• Detail-oriented with a strong sense of ownership and pride in delivering high-quality work.

The Team You’ll Be A Part Of:

You will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Your focus will be in the areas of design planning, floorplanning, place and route, parasitic extraction, signal integrity analysis and prevention, IR drop/EM analysis and physical verification (DRC/LVS).

A secondary focus will be in static timing analysis, Low Power Static check and formal verification. You will work as a member of the customer's IC design team, leveraging their experience and Synopsys' best practices to have immediate impact on their current project while transferring valuable knowledge for future projects.

You will interact regularly with customers to identify and eliminate barriers to project success. You will plan and manage delivery of own project-related tasks. You will leverage entire Synopsys team to ensure project success. You will provide feedback to R&D/AE on suggested tool enhancements or issues.

You will work with or as Project Leader to develop technical proposals, working through project life cycle and produce consistently high-quality technical solutions.

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big_They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Staff Engineer in our Analog Design team, you will be responsible for designing and developing full custom analog circuit macros for high-speed SERDES PHY IP.

Your responsibilities will include designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits.

You will also collaborate with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.

In addition, you will ensure analog sub-block performance adheres to SerDes standards and architecture specification documents.

You will lead verification strategies using advanced simulator features to guarantee the highest quality design outcomes.

You will oversee physical layout processes to minimize parasitic effects, device stress, and process variations.

You will present simulation data for peer and customer reviews, and document design features and test plans.

You will consult on electrical characterization and support the integration of your circuit within the SerDes IP product.

You will handcraft high-performance clock and data paths using digital/CMOS logic cells and verify timing margins with SPICE and STA tools.

You will address ESD and latch-up design verification, crosstalk coupling impacts, and ensure robust mixed-signal analog design.

The impact you will have includes accelerating development of high-performance silicon chips critical to emerging technologies like AI, IoT, and 5G.

You will optimize chip designs for power, cost, and performance, helping customers reduce project schedules by months.

You will advance Synopsys' leadership in high-speed interface IP and mixed-signal design innovation.

You will contribute to the creation of next-generation processes and models for manufacturing advanced chips.

You will support global collaboration, knowledge sharing, and technical excellence across teams and sites.

You will enhance customer satisfaction by delivering reliable, scalable, and high-quality analog IP solutions.

You will drive technical best practices and mentor junior engineers, strengthening the team's capabilities.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a UCIe Analog Design Senior Engineer at Synopsys, you will design circuit for Analog IPs like High Speed IOs, LCDL, Bandgap, High Speed macros for high speed PHY, Clock trees, Calibration circuits...

You will analyze and verify to make sure design meet all requirements of functionality, performance, area and reliability.

You will work closely with layout engineers to make sure layout quality. Perform post layout verifications.

You will perform design characterizations, functionality checks, EMIR analysis, Co-simulations for Logic-Analog full chip operations.

You will design analysis and solve problems of noise, margin, signal integrity, power integrity.

You will complete all design quality checks and data quality checks

You will do design reviews across global team

You will work with digital/system engineer to integrate analog designs into mixed signal system. Perform mixed signal verification which combining both analog and digital blocks.

You will train for fresh engineers and interns

The ideal candidate will have a BS/MS in Electronics Engineering, Electromechanics, Telecommunications.

They should have 0-3 years of experience in Analog, Mixed Signal, Memory or Custom logic Circuit design.

They should have solid knowledge of CMOS Analog design knowledge and techniques

They should have solid skill with circuit design tools: SNSP Custom Designer, Cadence Virtuoso

They should have solid understanding circuit simulation tools: Hspice or Spectre or Custom Sim...

They should have good understanding of layout effects on circuit performance.

They should have experienced with writing design review presentations and circuit verification reports

They should have good English communication both verbally and in writing

They should be a great team player, willing to support others.

They should be highly responsible, result oriented.

They should be self-motivated and highly enthusiasm in technology and solving problems

Leadership skill and experience is a plus

Familiar with high speed analog designs, IO designs, PLL/DLL is a plus

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, powering self-driving cars, cloud infrastructure, and learning machines.

You Are:

A Staff-level analog/MS engineer who owns complex designs end-to-end, influences architecture, and mentors others. You balance performance, reliability, and schedule in advanced CMOS and communicate clearly across teams.

If you are excited by the prospect of shaping high-speed connectivity in AI, cloud, automotive, and beyond - and you seek to empower some of the world's most advanced systems - this role is your opportunity to make a meaningful impact.

What You'll Be Doing:

• Taking end-to-end ownership of critical analog and mixed-signal blocks in high-speed SERDES designs
• Making architectural and circuit-level tradeoffs to optimize power, performance, area, and reliability
• Defining, verifying, and documenting testbenches for rigorous pre-silicon validation
• Leading custom analog layout coordination, ensuring parasitic awareness and post-layout optimization
• Driving robustness and quality sign-off processes, including PVT, mismatch, aging, reliability, and yield analysis
• Aligning system-level interfaces and usability considerations for seamless integration
• Executing silicon bring-up, characterization, and correlation against design specifications
• Providing technical leadership, mentorship, and guidance within a collaborative, multidisciplinary team

What You'll Need:

• MS/PhD in Electronics/Computer Engineer or equivalent; typically 7+ years or equivalent Staff-level impact
• Deep analog/MS in deep sub-micron CMOS; signal integrity/noise/jitter
• Proven architecture tradeoffs and production silicon experience
• Strong custom analog layout collaboration; post-layout optimization
• Excellent communication; ability to influence across teams

The Team You'll Be A Part Of:

You will join the IP and System Solutions Group, a cornerstone of Synopsys' mission to enable the industry's most advanced silicon. The SERDES team is renowned for developing high-speed interface IP, deployed across a wide range of applications and technology nodes. This multidisciplinary group collaborates closely to deliver high-performance, power-efficient chips, optimizing power, performance, and area (PPA) while accelerating time-to-market. You'll work alongside experts in architecture, circuit design, layout, and system integration, fostering innovation and excellence in every project.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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RF Software QA Engineer

Athens, Attica, Greece

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Category: EngineeringHire Type: Employee

Job ID 16582Date posted 03/26/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate engineer eager to make a tangible impact in the world of electronics and semiconductor technology. With a foundation in engineering or computer science and a strong understanding of high-frequency principles, you thrive in environments where precision and quality are paramount. You possess a keen analytical mind, able to dissect complex systems, spot potential flaws, and devise robust testing strategies that ensure products exceed customer expectations. Your experience with software testing, combined with technical proficiency in scripting, enables you to automate and streamline verification processes efficiently.

You enjoy collaborating with multidisciplinary teams, communicating technical insights, and contributing to a culture of continuous improvement. Adaptable and quick to learn, you embrace new technologies and computing environments, from Windows and Linux to cloud platforms. Your attention to detail and commitment to quality drive you to pursue excellence in every aspect of your work. You are motivated by the opportunity to work with cutting-edge tools like Ansys HFSS and HFSS 3D Layout, and you are excited to help shape products that advance the industry. If you value teamwork, innovation, and the pursuit of technical excellence, Synopsys offers you a place to grow and make a difference.

What You’ll Be Doing:

• Designing, specifying, and writing comprehensive test cases to validate software functionality and performance.

• Developing, updating, and maintaining test scripts for both manual and automated test environments.

• Conducting functional, regression, application, and performance testing to ensure product reliability and quality.

• Creating detailed test plans, participating in defect management processes, and tracking testing metrics.

• Collaborating closely with developers and technical specialists to understand, reproduce, and resolve product defects.

• Working across diverse computing environments, including Windows, Linux, virtual machines, compute clusters, and cloud platforms.

• Ensuring that product releases meet feature specifications and quality standards before approval for deployment.

The Impact You Will Have:

• Elevate the quality and reliability of Synopsys’ industry-leading engineering software, directly impacting customer satisfaction and trust.

• Accelerate product development cycles by identifying and resolving defects early in the process.

• Ensure that new features and enhancements meet rigorous standards, supporting the success of advanced technology solutions in the market.

• Contribute to the successful deployment of products used in high-impact industries, such as electronics, semiconductors, and communications.

• Enhance collaboration between development and quality assurance teams, driving continuous process improvement.

• Support Synopsys’ reputation for technical excellence and innovation, helping to maintain our leadership position in the industry.

What You’ll Need:

• BS in Engineering or related field with at least 3 years of experience, or MS with at least 1 year of experience.

• Technical background in high-frequency principles and applications, including RF and microwave electronics, antennas, signal integrity, and EMI/EMC.

• Proficiency in programming and scripting languages, particularly Python.

• Experience with software testing methodologies, including functional, regression, and performance testing.

• Familiarity with computing environments such as Windows, Linux, virtual machines, compute clusters, and cloud platforms.

• Experience with EDA/CAE software and analysis tools (Ansys HFSS experience is a plus).

• Strong attention to detail and the ability to create, modify, and maintain complex test scripts.

Who You Are:

• Detail-oriented, analytical, and committed to delivering high-quality work.

• Quick learner who adapts easily to new technologies and processes.

• Effective communicator and collaborator, able to work across distributed teams.

• Open-minded and eager to contribute innovative ideas.

• Proactive problem solver with strong interpersonal skills.

The Team You’ll Be A Part Of:

You will join the Electronics, Semiconductor and Optics Business Unit (ESOBU), a dynamic team dedicated to advancing Synopsys’ industry-leading products. Our team focuses on developing and verifying software applications that enable customers to design, simulate, and optimize complex electronic systems. We foster a collaborative environment where technical specialists, developers, and verification engineers work together to deliver excellence and drive innovation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#AnsysJob, #LI-Hybrid

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are an expert in high-speed analog design, with hands-on experience in wireline or optical SerDes above 200GBaud. You excel with PLLs, ILOs, DLLs, and phase mixers, as well as transmitters, serializers, optical drivers, receiver analog front ends, TIAs, and data converters.

Designing advanced SerDes and clocking circuits for ultra-high-speed data. Developing transmitters, serializers, and optical drivers. Creating receiver analog front ends and TIAs. Optimizing signal integrity and power usage. Collaborating across global teams. Mentoring junior engineers.

Enable next-gen connectivity solutions. Strengthen Synopsys' technology leadership. Accelerate product innovation and time-to-market. Improve reliability and performance of industry-leading chips. Foster technical growth across teams. Influence industry standards.

Our ideal candidate has a BSEE with at least 8+ years of direct industry experience. They must have extensive analog/SerDes IC design experience above 200GBaud, expertise with PLLs, DLLs, ILOs, phase mixers, and related circuits, proficiency in EDA tools and advanced process technologies, strong signal integrity and layout skills, and lab validation and debugging experience.

Collaborative and proactive leader. Detail-oriented problem solver. Effective technical communicator. Innovative and curious. Supportive mentor.

Join an elite analog design team focused on high-speed connectivity and SerDes IP, collaborating globally to deliver breakthrough solutions.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a seasoned hardware engineering professional with a passion for advanced silicon package design and a proven track record in delivering innovative solutions for complex semiconductor challenges. With more than a decade of hands-on experience in package and interposer design, you possess a deep understanding of the latest advancements in 3DIC and multi-physics analysis.

Collaborating with cross-functional teams during early design stages to optimize and define SIPI (Signal Integrity/Power Integrity) performance requirements, including bump mapping and power estimation.

Designing and developing advanced silicon package solutions such as silicon interposers, RDL fanout packages, and silicon bridge packages.

Modeling and analyzing advanced package designs to ensure optimal electrical, thermal, and mechanical performance.

Representing Synopsys on business unit projects as a technical leader and subject matter expert in advanced packaging.

Resolving a wide range of design and integration issues using creative, data-driven approaches.

Supporting customer engagements in exploring and implementing advanced package solutions with Synopsys IPs.

Collaborating with global teams to share best practices and drive innovation in advanced packaging methodologies.

Empowering Synopsys and its customers to deliver next-generation, high-performance silicon solutions.

Accelerating the adoption of advanced packaging technologies that enable new levels of integration and energy efficiency.

Enhancing the performance, reliability, and manufacturability of Synopsys IP test chip packages.

Driving technical excellence and innovation in business unit projects that define Synopsys' leadership in the semiconductor industry.

Mentoring and guiding engineering peers, fostering a culture of knowledge sharing and continuous improvement.

Setting new industry standards for quality, performance, and innovation in advanced package design.

Building and strengthening customer relationships through expert support and collaboration.

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ASIC/SoC Presales Applications Engineer - 16648

Sunnyvale, California, United States

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Category: EngineeringHire Type: Employee

Job ID 16648Base Salary Range $184000-$276000Date posted 03/31/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned ASIC, SoC, or Chiplet Architect, Manager, or Design Engineer, bringing extensive expertise in IC Digital, Mixed Signal, or Analog Design. Your technical prowess is matched by your ability to engage and inspire customers, translating complex engineering concepts into clear, impactful solutions. You thrive in fast-paced, dynamic environments and are adept at navigating competitive landscapes. Your organizational skills and self-motivation ensure you deliver on ambitious goals, while your creative approach to problem-solving enables you to overcome challenges with finesse. You build trust and rapport quickly, fostering long-lasting relationships with both internal teams and external stakeholders. With a Bachelor’s (15+ years) or Master’s (11+ years) degree in a relevant field, you understand industry protocols such as SerDes, UCIe, PCIe, DDR, USB, MIPI, or Ethernet, bringing added value to each engagement. You are passionate about driving technology forward and contributing to customer success, ready to make a significant impact at Synopsys.

What You’ll Be Doing:

• Presenting Synopsys solutions to senior managers and technical stakeholders, showcasing the value and capabilities of our IP portfolio.

• Engaging with customers to understand their unique requirements and challenges, proposing tailored technical solutions that meet their needs.

• Positioning Synopsys competitively in technical discussions, articulating differentiators and advantages in the marketplace.

• Liaising between technical, marketing, and sales teams to ensure seamless communication and alignment on project objectives.

• Driving strategy and execution for technical solution design, influencing customer architectures and product adoption.

• Supporting sales and business unit negotiations with expert insight into technical feasibility, solution fit, and value proposition.

The Impact You Will Have:

• Lead customer engagements, ensuring Synopsys solutions align perfectly with client requirements and goals.

• Collaborate across global teams to deliver innovative, winning solutions that drive business growth.

• Accelerate adoption of Synopsys products and platforms within key customer accounts.

• Provide critical technical insight, shaping the design and success of customer chip projects.

• Drive customer and business success by enabling efficient, high-performance SoC and ASIC design.

• Ensure successful delivery of complex SoC projects across multiple regions, supporting Synopsys' reputation as a market leader.

What You’ll Need:

• Deep expertise in IC design, including Digital, Mixed Signal, or Analog domains.

• Experience in customer-facing roles, technical sales, or sales support within the semiconductor industry.

• Exceptional communication skills, able to convey complex technical concepts to diverse audiences.

• Strong organizational and project management abilities, driving multiple projects to completion.

• Solid understanding of major semiconductor IP product lines and industry protocols (SerDes, UCIe, PCIe, DDR, USB, MIPI, Ethernet).

Who You Are:

A creative problem solver and strategic thinker, you excel at collaborating with diverse teams and stakeholders. You are driven by a passion for technology, innovation, and customer success, bringing a positive, solutions-oriented mindset to every challenge. Your adaptability and leadership enable you to thrive in high-pressure situations, while your integrity and commitment build trust across all levels of the organization.

The Team You’ll Be A Part Of:

You’ll join a collaborative group dedicated to delivering groundbreaking chip design solutions using Synopsys IP. The team works closely with Sales, R&D, and Marketing, fostering a supportive and innovative environment where your ideas and expertise will help shape next-generation semiconductor products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

As a Senior ASIC Physical Design Engineer, you will be responsible for implementing and integrating state-of-the-art DDR IPs at advanced technology nodes (10nm, 7nm, 6nm, and below).

You will drive timing closure for high-frequency designs (above ~4GHz), ensuring optimal performance and reliability.

You will collaborate with local and US-based teams, engaging in daily technical discussions to align on project goals and challenges.

You will integrate mixed-signal hard macro IPs and address unique integration requirements with innovative solutions.

You will design and build efficient clock trees, focusing on tight skew balancing and robust clock distribution.

You will participate in design reviews, debug issues, and contribute to continuous improvement of physical design methodologies.

You will support the implementation of best practices in floorplanning, placement, routing, and power optimization.

You will mentor junior engineers and contribute to team knowledge sharing initiatives.

Impact

You will enable delivery of high-performance DDR IPs that power next-generation consumer and enterprise products.

You will advance Synopsys' leadership in IP implementation at cutting-edge technology nodes.

You will champion best-in-class timing closure and integration practices, raising the bar for design excellence.

You will facilitate seamless cross-site collaboration, ensuring global project success.

You will drive innovation in clock tree synthesis and mixed-signal integration, contributing to differentiated product offerings.

You will accelerate time-to-market for customers by delivering robust, silicon-proven IP solutions.

Requirements

Bachelor's or Master's degree in Electronics, Electrical Engineering, or related field.

3+ years of experience in ASIC physical design, especially at advanced technology nodes (10nm, 7nm, 6nm or below).

Proficiency with physical design tools (such as Synopsys ICC2, PrimeTime, StarRC, etc.).

Solid understanding of timing closure, clock tree synthesis, and skew balancing for high-frequency designs.

Experience with DDR interface implementation and/or mixed-signal IP integration is highly desirable.

Familiarity with scripting languages (Tcl, Perl, Python) for automation and workflow optimization.

Strong analytical and debugging skills for addressing complex design challenges.

Team

You will join the Synopsys DDR IP implementation team, a group of passionate engineers focused on delivering world-class memory interface solutions at the leading edge of semiconductor technology.

The team fosters a culture of innovation, technical excellence, and collaboration, working closely with global counterparts to achieve ambitious project goals.

Together, you will help shape the future of high-performance silicon and enable the next wave of intelligent systems.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking a Senior High-Speed IO Architect to join our team. As a Senior High-Speed IO Architect, you will be responsible for driving integration and delivery of high-speed I/O designs from concept to production.

Responsibilities

• Drive integration and delivery of high-speed I/O designs from concept to production.
• Collaborate with architecture and design teams for optimal circuit performance.
• Lead cross-functional teams, aligning IP and SoC design groups.
• Recruit, train, and mentor engineering talent.
• Ensure designs meet performance, power, area, and reliability goals.
• Manage post-silicon verification and advanced interface development.

The Impact You Will Have

• Drive innovation in high-speed I/O solutions.
• Elevate Synopsys' leadership in silicon IP.
• Build and sustain a world-class engineering team.
• Ensure product quality and customer satisfaction.
• Enable seamless integration of advanced interfaces.
• Deliver scalable solutions for industry leaders.

What You’ll Need

• 15+ years engineering experience in high-speed mixed-signal IC design.
• Expertise across full product lifecycle.
• Leadership in managing engineering teams.
• Strong understanding of advanced technology nodes.
• Experience recruiting and mentoring staff.
• Excellent communication and project management skills.
• UCIe Die-to-Die PHY experience required.

Who You Are

• Strategic thinker and collaborative leader.
• Clear communicator and mentor.
• Adaptable, detail-oriented, and quality-driven.

The Team You’ll Be A Part Of

Join a world-class engineering team pioneering high-speed I/O and interface technologies, committed to innovation, collaboration, and technical excellence.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your primary responsibilities will include building and running CoSim simulations using established environments, integrating schematics and RTL, and adhering to procedures for reproducibility and traceability. You will also be responsible for debugging mixed-signal failures by collecting logs, waveforms, and reproducible steps, performing first-pass triage, and escalating issues with clear evidence to design and verification teams.

In this role, you will collaborate with analog and digital designers to confirm expected behaviors, review corner cases, and align verification needs for day-to-day activities. You will maintain and improve test content, scripts, and documentation to enhance verification quality and speed.

As a Mixed-Signal Verification Engineer, you will contribute to the overall reliability and performance of SERDES deliverables by surfacing system-level issues and supporting their resolution.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Collaborating with local and international teams to develop layouts for complex analog and mixed-signal designs in advanced technology nodes (3nm, 2nm, and beyond).

Utilizing Synopsys suite of tools and full custom analog layout design tools (e.g., Custom Compiler) to create and optimize circuit layouts.

Implementing and verifying designs using industry-leading verification tools such as ICV, Calibre and Star-RCXT...

Developing SERDES sub-circuit layouts (RX, TX, PLL, etc.) and optimizing for signal integrity, including clock/data routes, differential routing, and shielding.

Applying scripting techniques (TCL, Python, etc.) to automate layout processes and improve workflow efficiency.

Ensuring designs meet ESD constraints, mitigate latch-up risks, and optimize for reliability issues such as EM and IR drop.

Designing custom digital logic cell layouts and associated logic path routing for mixed-signal integration.

Refining layouts to minimize parasitic effects and enhance matching, reliability, and performance.

Delivering high-quality IP that powers next-generation semiconductor products for global customers.

Enabling Synopsys to maintain leadership in advanced technology node design and IP development.

Contributing to the creation of reliable, high-performance silicon chips used in communications.

Driving innovation in analog and mixed-signal layout methodologies and tools.

Enhancing cross-team collaboration and knowledge sharing to accelerate project timelines and improve outcomes.

Ensuring robust design practices that minimize risk and maximize reliability, meeting stringent industry standards.

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You are a seasoned analog architect with deep expertise in high-speed interface design. You enjoy leading technical coordination, collaborating with diverse teams, and driving innovation. Your communication skills and mentoring abilities help foster a positive, inclusive engineering environment. You’re ready to make an impact on our advanced 224G and future 448G products.

Responsibilities: Coordinating engineering efforts for 224G and 448G analog products Architecting high-speed SerDes solutions Collaborating with cross-functional teams Mentoring junior engineers Defining design standards and methodologies Managing project timelines and resources Interfacing with customers and key external partners on SerDes technical topics

The Impact You Will Have: Enable launch of industry-leading analog products Drive technical excellence and innovation Mentor and develop engineering talent Set new benchmarks power, latency, area, and performance Shape Synopsys’ future in high-speed connectivity Accelerate adoption of advanced SerDes IP

What You’ll Need: Experience in high-speed analog IC design (224G/448G) Strong technical coordination skills Proficiency with EDA tools Solid understanding of circuit architecture and signal integrity Knowledge of semiconductor manufacturing processes

Who You Are: Innovative and collaborative leader Excellent communicator Detail-oriented and quality-focused Adaptable and eager to learn

The Team You’ll Be A Part Of: Join a multidisciplinary engineering team dedicated to developing high-speed analog IP for next-generation silicon platforms.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more details during the hiring process.

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Our products will put artists and songwriters first, through four key principles:

• Partnerships with record labels, distributors, and music publishers: We’ll develop new products for artists and fans through upfront agreements, not by asking for forgiveness later.
• Choice in participation: We recognize there’s a wide range of views on use of generative music tools within the artistic community. Therefore, artists and rightsholders will choose if and how to participate to ensure the use of AI tools aligns with the values of the people behind the music.
• Fair compensation and new revenue: We will build products that create wholly new revenue streams for rightsholders, artists, and songwriters, ensuring they are properly compensated for uses of their work and transparently credited for their contributions.
• Artist-fan connection: AI tools we develop will not replace human artistry. They will give artists new ways to be creative and connect with fans.

As a Research Scientist, you will conduct groundbreaking research in music generation, run large-scale experiments, create practical applications, and collaborate with a cross-functional team to craft innovative solutions to complex challenges.

You will have a direct impact on Spotify’s products, tools, and services, working on projects that influence the entire organization. You will also engage with the broader research community by publishing your findings, delivering talks, and attending top conferences.

We offer a flexible work arrangement, allowing you to work where you work best, as long as you are within the EMEA region and operate within the Central European and GMT time zone for collaboration.

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Our products will put artists and songwriters first, through four key principles:

• Partnerships with record labels, distributors, and music publishers: We’ll develop new products for artists and fans through upfront agreements, not by asking for forgiveness later.

• Choice in participation: We recognize there’s a wide range of views on use of generative music tools within the artistic community. Therefore, artists and rightsholders will choose if and how to participate to ensure the use of AI tools aligns with the values of the people behind the music.

• Fair compensation and new revenue: We will build products that create wholly new revenue streams for rightsholders, artists, and songwriters, ensuring they are properly compensated for uses of their work and transparently credited for their contributions.

• Artist-fan connection: AI tools we develop will not replace human artistry. They will give artists new ways to be creative and connect with fans.

As a Staff Research Scientist, you will conduct groundbreaking research in music generation, run large-scale experiments, create practical applications, and collaborate with a cross-functional team to craft innovative solutions to complex challenges.

You will have a direct impact on Spotify’s products, tools, and services, working on projects that influence the entire organization. You will also engage with the broader research community by publishing your findings, delivering talks, and attending top conferences.

We offer you the flexibility to work where you work best! For this role, you can be within the North Americas region as long as we have a work location. This team operates within the Eastern Standard time zone for collaboration.

Core working hours are CET 3pm-6pm / EST 9am-12pm.

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Your primary responsibilities will include developing and integrating test flows, scripts, and automation to ensure robust SLT coverage and seamless communication between test controllers and peripherals. You will also partner with system architecture, chip design, and validation teams to define and deliver production-ready SLT and HVM test solutions.

In addition, you will drive custom SLT development to optimize system performance, power efficiency, and test coverage. You will oversee handler selection, enablement, and hardware integration, including PCB design, socket selection, and temperature control systems.

You will also improve manufacturing test quality by enhancing test correlation, yield, and reliability across NPI, HVM, and RMA processes. You will collaborate closely with Original Design Manufacturers (ODMs) on production enablement, sustaining, yield analysis, and DPPM reduction initiatives.

Finally, you will support silicon qualification and reliability testing (HTOL, Burn-in) at the system level.

To be successful in this role, you will need to have a strong understanding of electrical engineering principles, including signal integrity, data handling, and reporting. You will also need to have experience with lab equipment and measurement techniques for high-speed interfaces using high-speed scopes, probes, spectrum analyzers, BERTs, etc.

Additionally, you will need to have strong problem-solving skills, good communication skills, and the ability to work cooperatively in a team environment.

If you are a motivated and experienced Senior Post Silicon Validation Engineer looking for a new challenge, please apply today!

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At ADAM Audio, we're looking for a forward-thinking and experienced Electronics Engineer to join our team, who can own and deliver our control, DSP, and power amplifier PCB designs, as the team develops our next generation of studio monitors and headphones.

As an Electronics Engineer, you will be collaborating closely with cross-functional and multi-cultural teams across the company and external partners, to define, prototype and develop products from early sketches on to market introduction and maintenance.

Your day-to-day responsibilities will include delivering electronics hardware, including evaluation of new technologies, design of schematics and PCBs, ensuring your designs are suitable for mass production and comply with latest market regulations (CE, FCC etc.).

As part of the team, you'll be able to directly influence the products we build and have a high degree of autonomy and technical ownership. You will be planning your activities, estimating your work and collaborating to meet deadlines and product requirements.

You will work hands-on at functional prototypes and evaluation boards to debug and test your electronic hardware designs.

Individual and team development is important, and we'll support you as you look for ways to grow and improve your personal knowledge and skills. We'll also be looking for you to own and help improve our approach to electronic engineering and design knowledge, including best practices, processes, and tools.

There will also be opportunities to share knowledge and practices with all companies across the Focusrite group.

Responsibilities:

• Collaborate with cross-functional teams to define, prototype and develop products
• Deliver electronics hardware, including evaluation of new technologies and design of schematics and PCBs
• Ensure designs are suitable for mass production and comply with latest market regulations
• Work hands-on at functional prototypes and evaluation boards to debug and test electronic hardware designs
• Plan activities, estimate work and collaborate to meet deadlines and product requirements
• Own and help improve our approach to electronic engineering and design knowledge

Requirements:

• Expert design skills in analogue and digital audio electronics, power amplifiers, RF (e.g. Bluetooth, WiFi), microprocessor interfacing, and mixed-signal
• Expertise in using common CAD tools for PCB design, as well as tools for circuit simulation
• Mastering a range of test equipment: oscilloscopes, logic analysers, bus analysers and audio analysers (Audio Precision)
• Experience with meeting compliance regulations and standards (CE, FCC, EMC, RED, LVD etc.) for active amplification systems, USB-, wireless- and Ethernet-connectivity, and battery powered devices
• Strong ability to analyse and present trade-offs between cost, quality, and development time
• Hands-on problem-solving and debugging skills, including lab work (test equipment, SMT - soldering etc.)
• Excellent team working and communication skills in English, both written and spoken and ideally good German language skills
• Appetite for continuous improvement in all aspects of product discovery and delivery

Beneficial:

• A Bachelor's or Master's degree in Information Technology, Electronics Engineering (or other relevant technical disciplines)
• Experience with linear and switching PSU designs
• Familiarity with embedded software and loudspeaker technologies

What can you expect from us?

• Flexible working hours for a better work-life balance
• A healthy mix of remote and office work
• A harmonious and appreciative working atmosphere
• Work on exciting projects in a unique industry as part of an international brand group
• Employee discounts, including on Focusrite, Novation and Sequential products
• Opportunities for professional development
• ADAM Audio bonus programme – our employees share in the company's joint success!
• Company pension scheme, ADAM Audio health programme, mental health first aiders, FeelGood Manager, Business Bike programme, regular staff events and much more.

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Responsibilities

• Tracking through features from product management to software architecture, design and implementation on an embedded platform
• Developing features to support existing and new networked audio processing products
• Continuous improvement to maintain stability and performance of the product family
• Responsibility for bug tracking, software revision control and release process
• Interfacing, maintenance and adding to the control web app
• Selection and test of new support technologies such as embedded libraries to implement new features
• Implement new features in response to customer feedback and product support requests
• Develop new products on the platform and related technologies
• Maintain the platform for periodic feature releases
• Create a structured test framework and process

Job Scope

• Develop the software to support the existing and derived hardware platforms from driver level up to application features
• Become proficient with a good working knowledge of the underlying hardware to be able to create appropriate subsystems within the constraints of the platform

Skills and Experience Required

• Degree qualified in software engineering or related engineering subject
• Be strong in embedded development/debugging and problem solving
• Have good knowledge of embedded C and C++, experience with using a real-time operating system, and knowledge of common embedded processor peripherals
• Have a good detailed knowledge of Embedded TCP/IP networking

Benefits

• Life Assurance
• Income Protection
• Pension
• Bike2work scheme
• 25 days holiday (increasing with service)
• Medical Cash Plan and Private Healthcare options
• Substantial staff discount on company products
• Participation to company bonus scheme
• Opportunity to join our EV scheme

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We are seeking an experienced Project Engineering Manager to lead cross-functional teams in delivering Silicon IP projects globally. As a key member of our engineering team, you will be responsible for managing project scope, goals, and deliverables, aligning them with business objectives. You will also develop and manage comprehensive project plans, scheduling timelines, and tracking milestones using industry-standard tools.

Key Responsibilities:

• Lead cross-functional teams to deliver Silicon IP projects globally, from initial planning through successful completion.
• Represent the product line internally and externally, acting as the primary point of contact for stakeholders and customers.
• Report on project status to key customers and collaborate with R&D teams to plan new developments and enhancements.
• Facilitate the definition of project scope, goals, and deliverables, aligning them with business objectives.
• Develop and manage comprehensive project plans, scheduling timelines, and tracking milestones using industry-standard tools.
• Analyze project performance and ensure quality assurance, customer satisfaction, and adherence to budgetary constraints.
• Empower team members, resolve conflicts, and foster a collaborative environment to achieve project goals.
• Provide regular updates to management and stakeholders, ensuring transparency and alignment throughout the project lifecycle.

Impact:

• Deliver high-value Silicon IP solutions that enable next-generation technologies, such as AI, IoT, and autonomous vehicles.
• Strengthen Synopsys' reputation as a leader in chip design and semiconductor innovation.
• Drive operational excellence and efficiency across global projects, ensuring timely and successful delivery.
• Enhance customer satisfaction through proactive communication and quality assurance.
• Influence the development of new product features and improvements based on customer feedback and market trends.
• Build strong relationships with internal teams and external partners, fostering a culture of collaboration and innovation.
• Mentor and empower team members, contributing to their professional growth and the overall success of the organization.

Requirements:

• Degree in Engineering or Applied Science (or equivalent) with 10+ years of relevant experience in semiconductor or related fields.
• Proven experience managing customer expectations and communications.
• Background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments.
• Strong knowledge of project management principles, tools, and methodologies.
• Experience with quality management system processes and procedures.
• Ability to navigate and utilize tools in a Linux environment.

Who You Are:

• Exceptional communicator, able to connect with individuals at all levels and across functions.
• Inspirational leader, motivating teams to achieve their best and drive positive outcomes.
• Decisive and strategic thinker, quickly assessing situations and guiding teams toward optimal solutions.
• Empathetic and inclusive, understanding and valuing diverse perspectives and needs.
• Calm under pressure, maintaining focus and composure in challenging situations.
• Effective negotiator and conflict resolver, maintaining team harmony.
• Quick to learn new tools and processes, adapting rapidly in a dynamic environment.

The Team You’ll Be A Part Of:

You will join a vibrant, collaborative engineering team focused on delivering innovative Silicon IP solutions for global customers. Our team thrives on tackling complex challenges, leveraging diverse skills and backgrounds to drive technological advancement. We value open communication, mutual support, and continuous learning, ensuring every member is empowered to contribute and grow. Together, we are shaping the future of smart technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15231

Remote Eligible

No

Date Posted

02/15/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

• An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.

• You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.

• Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.

• You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.

• You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.

• You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.

What You’ll Be Doing:

• Leading NRZ/PAM4 Serdes analog design transceiver solutions.

• Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.

• Collaborating with silicon test and debug experts for Sim2Sil correlation.

• Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.

The Impact You Will Have:

• Driving innovation in mixed-signal advanced analog serdes design.

• Enhancing the performance and efficiency of high-speed physical interfaces.

• Contributing to the development of cutting-edge technology in High Speed PHY IP.

• Improving quality and robustness of design through collaboration and Sim2Sil correlation.

What You’ll Need:

• BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.

• Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.

• Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .

• Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters

Who You Are:

• Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.

• Experience with PLL designs and high-speed digital circuit design.

• Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.

• Familiarity with digitally assisted analog circuit techniques.

• Capable to drive technical decision and tradeoff with customer focus

The Team You’ll Be A Part Of:

Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.

You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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Defining and deploying advanced layout methodologies that accelerate execution, enhance quality, and promote standardized best practices across global teams.

Gathering customer requirements, translating them into clear technical specifications, and ensuring these specifications drive methodology and workflow development.

Developing end-to-end workflows that enhance quality, consistency, and efficiency across Synopsys IP development.

Collaborating closely with cross-functional teams—including Circuit Design, Physical Design, CAD, Product Engineering, and Quality—to enable adoption of methodologies for advanced technology nodes.

Providing technical leadership across distributed teams, aligning planning and execution to meet project goals.

Defining, tracking, and analyzing performance metrics to drive continuous improvement and influence future methodology strategy.

Creating and maintaining comprehensive documentation to ensure clarity, scalability, and long-term usability.

Engaging with internal partners and external customers as a trusted technical representative of the Methodology Team.

Leading innovation in analog/mixed-signal layout flows, combining industry-standard tools and internal automation to validate and evolve methodologies.

Mentoring and supporting junior engineers, enabling skill growth and knowledge sharing across the organization.

Accelerating and improving the reliability of analog/mixed-signal IP development at advanced nodes.

Driving alignment and quality across global design teams through standardized workflows and strong technical leadership.

Strengthening collaboration and knowledge transfer across engineering disciplines.

Influencing organizational and product strategy through methodology innovation and customer insights.

Increasing transparency and maintainability of workflows through high-quality documentation.

Contributing to reinforcing Synopsys’ position as a leader in semiconductor design technology.

5+ years in analog/mixed-signal layout or ASIC physical design, with experience in FinFET and advanced nodes strongly preferred.

Deep knowledge of analog and mixed-signal CMOS layout, device-level considerations, and chip-level integration.

Strong expertise with industry tools such as Synopsys Custom Compiler, Cadence Virtuoso, ICV, Calibre, and related verification flows.

Proven ability to gather customer requirements and convert them into technical specifications.

Demonstrated experience building workflows that improve IP quality, efficiency, and consistency.

Strong organizational skills, attention to detail, and ability to manage multiple complex initiatives simultaneously.

Excellent communication, leadership, and mentoring abilities.

Innovative and proactive in solving complex engineering challenges.

Collaborative, with a talent for working across interdisciplinary teams.

Strategic thinker who balances technical depth with big-picture vision.

Effective communicator, able to convey technical concepts to diverse audiences.

Mentor and coach, dedicated to supporting the growth of others.

Adaptable and resilient in fast-paced and evolving environments.

You will join the Mixed Signal IP Technology and Methodology Team—an advanced physical design group focused on developing full-custom analog and ASIC layout solutions for high-speed integrated circuits. The team is known for its collaborative culture, cutting-edge tool ecosystem, and strong commitment to innovation. As a Staff Engineer, you’ll work closely with experienced layout engineers, CAD specialists, and circuit designers to help define best-in-class methodologies and deliver high-quality solutions for Synopsys’ global customers.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a skilled and passionate engineer with expertise in system design, embedded firmware, digital design, and verification with over 8+ years of experience. You are a skilled engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry. You value collaboration and mentorship, welcoming opportunities to both learn from and share knowledge with your peers. Your experience with memory interface protocols such as DDR, LPDDR and HBM enables you to quickly contribute to our next-generation solutions.

Technical knowledge in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results. You are passionate about right first-time development, ensuring traceability of all verification requirements and covering the whole ecosystem of Controller and PHY.

You bring knowledge of system, digital, firmware design, high-speed memory interface skills. Your experience includes delivering "best-in-class" solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows.

What You’ll Be Doing:

• Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs
• Contributing and collaborating with hardware teams to analyze and debug embedded firmware
• Optimizing and developing new PHY training algorithms using system level modeling tools
• Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity
• Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support
• Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals
• Reproducing silicon failures on FPGA/Emulation to identify root causes
• Fostering technical excellence and knowledge sharing across the organization.

The Impact You Will Have:

• Enhancing cross-functional collaboration to improve product quality and end customer satisfaction.
• Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up
• Standardizing and optimizing workflows to increase efficiency and compliance.
• Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration.
• Directly impact customer success by providing guidance, technical support, and innovative solutions.
• Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.

What You’ll Need:

• 8+ years of experience in Firmware, ASIC design, verification, system validation, and technical roles.
• Be results driven
• Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment.
• Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.
• In-depth knowledge of system-level validation for high-speed interface PHY
• Proven track record of working cross-functionally and driving issues to closure
• Knowledge of mixed-signal design
• Experience in working in cross-functional collaborations
• Be an excellent communicator and a beacon for change

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity:

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15391

Remote Eligible

No

Date Posted

02/23/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned analog design professional with a passion for pushing technology boundaries. With over a decade of hands-on experience in analog IC design, you thrive in fast-paced, collaborative environments and are motivated by technical challenges. Your expertise in Multi-Gbps NRZ & PAM4 SERDES IP and familiarity with the latest FinFET and gate-all-around process nodes set you apart as a leader in the field. You are adept at translating complex SerDes standards into innovative, high-performance circuit architectures and are comfortable navigating the intricacies of transistor-level design, system-level budgeting, and analog/digital co-design.

You excel at mentoring peers, sharing knowledge, and advocating for design excellence. Your strong analytical skills allow you to quickly identify architectural bottlenecks and propose effective solutions. You are detail-oriented, balancing deep technical focus with a strategic view of project goals and timelines. Communication is one of your strengths—whether presenting simulation data, documenting design features, or collaborating across multidisciplinary teams, you articulate complex ideas clearly to both technical and non-technical audiences.

Beyond your technical expertise, you are committed to continuous learning and growth, staying abreast of industry trends and emerging technologies. You value diversity and inclusion, recognizing that great ideas come from a variety of perspectives. Your proactive and adaptable approach ensures you thrive in dynamic, innovative environments where your contributions drive meaningful impact.

What You’ll Be Doing:

• Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.

• Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.

• Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.

• Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.

• Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews.

• Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements.

• Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates.

The Impact You Will Have:

• Drive innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions.

• Shape the architectural direction of SERDES IP, influencing industry standards and future product offerings.

• Enhance the performance, power efficiency, and reliability of Synopsys’ silicon IP portfolio.

• Mentor and elevate the technical capabilities of team members, fostering a culture of excellence and continuous learning.

• Directly contribute to successful customer deployments by addressing post-silicon challenges and ensuring robust field performance.

• Strengthen Synopsys’ market leadership in advanced process nodes and high-speed communication technologies.

What You’ll Need:

• MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).

• Proven expertise with FinFET technologies and CMOS tape-outs.

• Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.

• Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).

• Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.

• Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).

• Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.

• Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.

• Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).

• Excellent communication and documentation skills.

Who You Are:

• Collaborative and open-minded, eager to share knowledge and learn from others.

• Detail-oriented and thorough, with a commitment to delivering high-quality results.

• Analytical thinker with strong problem-solving abilities and a proactive approach.

• Excellent communicator, able to convey complex technical concepts clearly.

• Adaptable and resilient in fast-paced, dynamic environments.

• Committed to fostering an inclusive, innovative, and supportive workplace.

The Team You’ll Be A Part Of:

You’ll join a world-class analog and mixed-signal R&D team at Synopsys, working alongside experts in high-speed IC design, verification, and CAD tool development. The team is collaborative, diverse, and passionate about innovation, with a focus on developing cutting-edge SERDES IP for advanced process nodes. You’ll have access to best-in-class design tools, mentorship, and opportunities for professional growth as you help shape the future of connectivity technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

What is it like to be an Analog Design Engineer at Synopsys?

Arman Shahmuradyan

Analog Design, Manager

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and patern

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a skilled and passionate engineer with deep expertise in system design, embedded firmware, digital design, and verification with over 15 years of impactful experience. You are a highly accomplished engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry.

A technical powerhouse as well as subject matter expert in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results.

You bring a deep understanding of system, digital, firmware design, high-speed memory interface architectures. Your experience includes leading multi-disciplinary teams, driving technical roadmaps, and mentoring engineers to deliver best-in-class solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows.

What You'll Be Doing:

• Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs
• Contributing and collaborating with hardware teams to analyze and debug embedded firmware
• Optimizing and developing new PHY training algorithms using system level modeling tools
• Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity
• Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support
• Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals
• Reproducing silicon failures on FPGA/Emulation to identify root causes
• Mentoring and coaching engineering teams, fostering technical excellence and knowledge sharing across the organization.
• Collaborating with cross-functional groups and customers to resolve challenges, ensure quality design, and meet aggressive project milestones.
• Driving continuous improvement in functional and performance testing on hardware and test-chips, and leading architectural refinements based on analysis.

The Impact You Will Have:

• Enhancing cross-functional collaboration to improve product quality and end customer satisfaction.
• Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up
• Standardizing and optimizing workflows to increase efficiency and compliance.
• Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration.
• Driving cross-team synergy, technical mentorship, and a culture of continuous learning and inclusivity.
• Directly impact customer success by providing expert guidance, technical support, and innovative solutions.
• Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.

What You'll Need:

• 15+ years of experience in Firmware, ASIC design, verification, system validation, and technical leadership roles.

• Be results driven

• Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment.

• Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.

• In-depth knowledge of system-level validation for high-speed interface PHY

• Proven track record of working cross-functionally and driving issues to closure

• Knowledge of mixed-signal design

• Experience in working in cross-functional collaborations

• Be an excellent communicator and a beacon for change

• Excellent debugging, analytical, and problem-solving skills

• Working knowledge of scripting in languages such as Python and/or Perl

• Good understanding of DFT, ATPG, and design for debug techniques and their application in testing of silicon

• Good interpersonal skills, ability & desire to work as a standout colleague

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity:

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

#LI-DP1

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.

Benefits:

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• Health & Wellness
• Time Away
• Family Support
• ESPP
• Retirement Plans
• Compensation

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We are seeking an experienced Project Engineering Manager to lead cross-functional teams in delivering Silicon IP projects globally. As a key member of our engineering team, you will be responsible for managing project scope, goals, and deliverables, aligning them with business objectives. You will also develop and manage comprehensive project plans, scheduling timelines, and tracking milestones using industry-standard tools.

Key Responsibilities:

• Lead cross-functional teams to deliver Silicon IP projects globally, from initial planning through successful completion.
• Represent the product line internally and externally, acting as the primary point of contact for stakeholders and customers.
• Report on project status to key customers and collaborate with R&D teams to plan new developments and enhancements.
• Facilitate the definition of project scope, goals, and deliverables, aligning them with business objectives.
• Develop and manage comprehensive project plans, scheduling timelines, and tracking milestones using industry-standard tools.
• Analyze project performance and ensure quality assurance, customer satisfaction, and adherence to budgetary constraints.
• Empower team members, resolve conflicts, and foster a collaborative environment to achieve project goals.
• Provide regular updates to management and stakeholders, ensuring transparency and alignment throughout the project lifecycle.

###_scene

• Deliver high-value Silicon IP solutions that enable next-generation technologies, such as AI, IoT, and autonomous vehicles.
• Strengthen Synopsys' reputation as a leader in chip design and semiconductor innovation.
• Drive operational excellence and efficiency across global projects, ensuring timely and successful delivery.
• Enhance customer satisfaction through proactive communication and quality assurance.
• Influence the development of new product features and improvements based on customer feedback and market trends.
• Build strong relationships with internal teams and external partners, fostering a culture of collaboration and innovation.
• Mentor and empower team members, contributing to their professional growth and the overall success of the organization.

Requirements:

• Degree in Engineering or Applied Science (or equivalent) with 10+ years of relevant experience in semiconductor or related fields.
• Proven experience managing customer expectations and communications.
• Background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments.
• Strong knowledge of project management principles, tools, and methodologies.
• Experience with quality management system processes and procedures.
• Ability to navigate and utilize tools in a Linux environment.

Who You Are:

• Exceptional communicator, able to connect with individuals at all levels and across functions.
• Inspirational leader, motivating teams to achieve their best and drive positive outcomes.
• Decisive and strategic thinker, quickly assessing situations and guiding teams toward optimal solutions.
• Empathetic and inclusive, understanding and valuing diverse perspectives and needs.
• Calm under pressure, maintaining focus and composure in challenging situations.
• Effective negotiator and conflict resolver, maintaining team harmony.
• Quick to learn new tools and processes, adapting rapidly in a dynamic environment.

The Team You’ll Be A Part Of:

You will join a vibrant, collaborative engineering team focused on delivering innovative Silicon IP solutions for global customers. Our team thrives on tackling complex challenges, leveraging diverse skills and backgrounds to drive technological advancement. We value open communication, mutual support, and continuous learning, ensuring every member is empowered to contribute and grow. Together, we are shaping the future of smart technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15195

Base Salary Range

$181000-$272000

Remote Eligible

No

Date Posted

02/16/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an accomplished engineering leader with a passion for advancing the frontiers of analog mixed-signal technology. With a deep understanding of memory and die-to-die interfaces, you thrive in environments where innovation meets real-world impact. You have a proven track record of architecting high-performance solutions, particularly in the realm of High Bandwidth Memory (HBM) interface design. You are committed to continuous learning, keeping pace with evolving technologies and industry trends. Your communication skills enable you to articulate ideas clearly and work effectively across sites and disciplines. Above all, you are driven by the opportunity to contribute to critical components powering AI systems, knowing your work has a lasting impact on the future of technology.

What You’ll Be Doing:

• Reviewing and integrating the latest multichip and interposer technologies from various foundries into Synopsys’ HBM PHY products.

• Defining bump maps and top-level floorplans for HBM PHY products to ensure optimal performance, power, and area (PPA).

• Collaborating with layout teams to deliver top metal covercells optimized for performance and reliability in HBM PHY designs.

• Working with layout and SIPI teams to design interposer geometries that maximize performance and signal integrity.

• Mentoring junior engineers and providing technical guidance across multi-site teams.

The Impact You Will Have:

• Elevate the performance and reliability of Synopsys’ HBM PHY products, directly contributing to the advancement of AI and high-performance computing systems.

• Enable successful integration of cutting-edge multichip and interposer technologies, ensuring Synopsys remains at the forefront of semiconductor innovation.

• Improve manufacturability and scalability of memory interface IPs, supporting the needs of leading semiconductor companies worldwide.

• Drive technical excellence across cross-functional teams, fostering collaboration and knowledge sharing.

• Enhance customer satisfaction by delivering robust, high-quality solutions that meet demanding market requirements.

• Support Synopsys’ reputation as a trusted IP provider through leadership, innovation, and problem-solving.

What You’ll Need:

• MS or PhD in Electrical Engineering or related field.

• 15+ years of experience in memory or die-to-die interface design.

• Expertise in floorplan optimization for IPs integrating full-custom analog and synthesized digital blocks.

• Strong experience with power grid design and EMIR analysis.

• Proficiency in interposer design and implementation.

• Solid understanding of analog principles and designs (bandgaps, LDO regulators, current mirrors, DLL/PLLs).

• Deep knowledge of signal-integrity and power integrity principles.

• Experience with layout impact on circuit performance and reliability.

• Ability to troubleshoot and debug memory interfaces effectively.

• Excellent communication and collaboration skills across multi-site teams.

Who You Are:

• A collaborative leader who inspires and guides teams to technical excellence.

• Detail-oriented, analytical, and able to balance multiple priorities.

• Innovative thinker, open to new approaches and emerging technologies.

• Effective communicator, capable of translating complex technical concepts for diverse audiences.

• Resilient and proactive in addressing challenges and driving solutions.

• Committed to continuous learning and professional growth.

The Team You’ll Be A Part Of:

You’ll join our High Bandwidth Memory interface design team, a group of passionate engineers dedicated to developing best-in-class IP for the world’s most advanced computing systems. Our team collaborates across multiple sites and disciplines, leveraging expertise in analog mixed-signal design, layout, and signal integrity to deliver innovative solutions that power the next generation of AI and high-performance devices.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You will have the opportunity to work in a dynamic R&D Centre, collaborating with expert teams to create great products in video conference cameras. Passion for design and development is the key, this includes creating and testing solutions to meet design goals.

Your Contribution:

• Contribute to the development of cutting-edge camera image processing algorithms, including Noise Reduction, Sharpening, Tone Mapping, and Scaling.
• Collaborate on the subjective assessment of image and video quality, leveraging your expertise to test, measure, and evaluate imaging and video outputs.
• Work closely with cross-functional teams to gather insights and enhance the overall visual quality of Logitech's video solutions.

Key Qualifications:

• Educational Requirements: Working towards an M.S. or Ph.D. degree in Computer Science, Electrical Engineering, or a related field with a concentration in Image Processing at the start of the internship.
• Have taken a Computational Imaging course, or possess solid understanding of Image signal processing fundamentals (Bayer pipeline, demosaic, noise reduction, color correction, sharpening, tone mapping, etc.) and theoretical foundations.
• Experience with C/C++ (or embedded C) for algorithm and systems development on Linux or embedded platforms.
• Knowledge and experience in image quality assessment techniques, including metrics for evaluating image fidelity, sharpness, and color accuracy.
• Curiosity and a hands-on mindset toward bridging software and hardware, with an eagerness to experiment and iterate.
• Strong communication and collaboration skills; comfortable working across hardware, firmware, and algorithm teams in a collaborative working environment.
• A strong curiosity, self-motivation, and a passion for solving complex, open-ended challenges.
• Comfortable navigating the uncertainties and dynamic nature of early-stage product development. Ability to adapt quickly and thrive in a fast-paced environment.

In addition, preferable skills and behaviours include:

• Experience with camera software development on Android platforms.
• Familiarity with Linux environments and the ability to work comfortably within them.
• A strong understanding of digital video technologies, including formats, and processing workflows.
• Experience in AI/ML, mainly computer vision techniques and algorithms.
• Exceptional organisational skills, with a keen attention to detail and the ability to manage tasks systematically.
• A personable and easy-going demeanour, with the ability to work comfortably in a collaborative team environment.
• A genuine passion for design and technology, with a keen interest in innovative solutions.
• A love for cameras/photography and an enthusiasm for advancing the field of imaging technology.

Compensation:

This position offers an hourly rate typically between $47.00 hourly- $49.00 hourly commensurate to the level of degree program in which an applicant is actively enrolled.

Logitech offers interns benefits of Paid Holidays, and access to Employee Product Discounts.

#LI-SN1

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As an audio programmer, you will use existing and emerging technologies to improve the realism and fidelity for drivers through spatial audio and haptic cues. You will have a passion for audio, gaming, programming, and simulation. You will also have a strong proficiency in designing and implementing real-time audio systems for racing games, including audio middleware integration, DSP fundamentals, performance optimization, and cross-platform support.

Responsibilities:

• Design, develop, and maintain the complete sound systems for multiple motor racing titles on PC and console
• Collaborate with recording artists and sound designers to provide authoring tools and support the implementation of complex sonic models into various middlewares
• Work closely with simulation engineers to provide a physics-driven soundscape, managing the performance and reliability of the audio system
• Use existing and emerging technologies to improve the realism and fidelity for drivers through spatial audio and haptic cues
• Have a strong proficiency in designing and implementing real-time audio systems for racing games, including audio middleware integration, DSP fundamentals, performance optimization, and cross-platform support

Qualifications:

• 5+ years professional C++ programming experience
• Experience developing and integrating sound engines in the gaming or simulation industries
• Experience integrating with audio middlewares and system APIs
• BS in computer science, or equivalent experience

Preferred skills:

• 3+ years professional Python experience in high performance applications (Cython)
• Experience with Digital Signal Processing, Acoustics, and Linear Systems e.g. filter design, granular synthesis, convolution, transfer functions, system identification and modeling
• Experience with spatial audio e.g. object-based rendering, wave propagation, occlusion, early reflections, reverberation, ambisonics, near field effects
• Experience with digital communication and protocols including data formats, speech processing, and psycho acoustics
• Knowledge of audio engineering and sound design
• Interest in motorsports and cars
• Passion for gaming or simulation
• Experience collaborating in a team with diverse skills and backgrounds.

Benefits & Compensation:

In addition to competitive pay and benefits, we offer the opportunity to be part of a talented team building high-quality, immersive games for players worldwide.

Benefits Include:

• Health, dental, vision, and life insurance
• 401(k) and discretionary employer match
• Paid time off (vacation, personal, sick, and holidays)

Location, Working Conditions, & Eligibility:

This position is a full time remote within the United States. Candidates must be legally authorized to work in the United States at the time of application. We are unable to sponsor visas, or work permits for this role.

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Anthropic is an AI safety and research company working to build reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our customers and society as a whole. As a Safeguards Analyst focusing on Account Abuse, you will play a critical role in building and scaling the detection, enforcement, and operational capabilities that protect our platform against scaled abuse.

Responsibilities:

• Develop and iterate on account signals and prevention frameworks that consolidate internal and external data into actionable abuse indicators
• Develop and optimize identity and account-linking signals using graph-based data infrastructure to detect coordinated and scaled account abuse
• Evaluate, integrate, and operationalize third-party vendor signals — assessing whether new data sources provide genuine lift in detection
• Expand internal account signals with new data sources and behavioural indicators to improve detection coverage
• Build and maintain processes that evaluate new product launches for scaled abuse risks, working closely with product teams to ensure enforcement readiness
• Operationalize and iterate on enforcement tooling — including appeals workflows, review processes, and user communications — to maintain quality and scale with growing volume
• Analyze enforcement performance through operational metrics, partnering with the team to keep detection accurate as abuse patterns evolve
• Manage payment fraud and dispute operations to protect revenue and maintain our standing with payment partners
• Coordinate enforcement efforts for policy compliance gaps across products, working with relevant teams to build scalable review processes
• Collaborate with cross-functional teams (Engineering, Product, Legal, Data Science) to surface new signals and translate detection capabilities into enforcement workflows
• Maintain detailed documentation of signal development, enforcement processes, and operational decisions

Qualifications:

• 2+ years of experience in risk scoring, fraud detection, trust and safety, or policy enforcement
• Hands-on experience building detection systems, risk models, or enforcement processes and workflows
• Experience evaluating and integrating third-party data sources into detection or scoring pipelines
• Strong SQL and Python skills — this role involves heavy data analysis across complex, multi-table data relationships
• Familiarity with identity signals such as device fingerprinting, account linking, or entity resolution, or experience with appeals processes and customer-facing enforcement communications
• Demonstrated ability to analyze complex data problems and translate findings into actionable improvements
• Strong written and verbal communication skills — ability to explain technical tradeoffs and navigate cross-functional stakeholder conversations
• Equivalent practical experience or a Bachelor's degree in Computer Science, Data Science, or related field

You might be a good fit if you:

• Have built risk scores, detection systems, signal pipelines, or enforcement processes in a previous role — identity verification, trust and safety, or similar
• Are comfortable working with ambiguous, noisy data and extracting meaningful signal
• Think critically about signal quality and enforcement performance — evaluating whether new detection signals or processes meaningfully improve outcomes
• Have experience with graph-based data, account-linking problems, or cross-functional process design
• Are proactive about identifying gaps in existing detection or enforcement and proposing new approaches
• Have experience leveraging generative AI tools to support analytical, detection, or enforcement workflows
• Can balance deep analytical work with cross-functional collaboration and stakeholder coordination
• Have a background or interest in cybersecurity or threat intelligence (a plus, not a requirement)

Logistics

• Education requirements: We require at least a Bachelor's degree in a related field or equivalent experience.
• Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.
• Visa sponsorship: We do sponsor visas! However, we aren't able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.

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