Senior ASIC Digital Designer · Synopsys

Mon, 09 Mar 2026 11:05:55 GMT
Engineering

Synopsys · Nepean · onsite
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a skilled and passionate engineer with expertise in system design, embedded firmware, digital design, and verification with over 8+ years of experience. You are a skilled engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry. You value collaboration and mentorship, welcoming opportunities to both learn from and share knowledge with your peers. Your experience with memory interface protocols such as DDR, LPDDR and HBM enables you to quickly contribute to our next-generation solutions. Technical knowledge in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results. You are passionate about right first-time development, ensuring traceability of all verification requirements and covering the whole ecosystem of Controller and PHY. You bring knowledge of system, digital, firmware design, high-speed memory interface skills. Your experience includes delivering "best-in-class" solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows. What You’ll Be Doing: - Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs - Contributing and collaborating with hardware teams to analyze and debug embedded firmware - Optimizing and developing new PHY training algorithms using system level modeling tools - Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity - Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support - Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals - Reproducing silicon failures on FPGA/Emulation to identify root causes - Fostering technical excellence and knowledge sharing across the organization. The Impact You Will Have: - Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. - Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up - Standardizing and optimizing workflows to increase efficiency and compliance. - Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration. - Directly impact customer success by providing guidance, technical support, and innovative solutions. - Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members. What You’ll Need: - 8+ years of experience in Firmware, ASIC design, verification, system validation, and technical roles. - Be results driven - Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment. - Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement. - In-depth knowledge of system-level validation for high-speed interface PHY - Proven track record of working cross-functionally and driving issues to closure - Knowledge of mixed-signal design - Experience in working in cross-functional collaborations - Be an excellent communicator and a beacon for change Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity: Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.