{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/serial"},"x-facet":{"type":"skill","slug":"serial","display":"Serial","count":14},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_157cb20b-6ad"},"title":"Senior System Architect, Analog Design","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 700 open roles</p>\n<p><strong>Innovation Starts Here</strong></p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Senior System Architect, Analog Design-13383</strong></p>\n<p>United States Off-siteSave</p>\n<p><strong>Remote Eligible</strong> Yes<strong>Hire Type</strong> Employee<strong>Job ID</strong> 13383<strong>Base Salary Range</strong> $166000-$249000<strong>Date posted</strong> 11/19/2025</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive innovations that shape the way we live and connect. Our Enterprise SerDes team leads in high-speed chip design, enabling tomorrow&#39;s connectivity for PCIe and Ethernet. Join us to create the future of pervasive intelligence.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an expert in system-level architecture for serial-link transceivers, with 15+ years of experience and a passion for pushing technology boundaries. You thrive in cross-functional teams, communicate complex ideas clearly, and have a track record of successful product development. Your deep knowledge of high-speed analog/digital design and strong leadership make you an ideal fit.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Architecture: definition of architecture and specifications for the transmitter and receiver</li>\n<li>Modelling: design and maintenance of the system level model</li>\n<li>Signal/Power Integrity: analyzing different signal and power integrity requirements</li>\n<li>Sign-off: system level simulation of the design performance across multiple protocols and channels</li>\n<li>Silicon: qualification and correlation of performance and algorithms in silicon</li>\n<li>Customers: assisting customers on system level performance and algorithmic issues</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>You have a MSc or PhD in Electrical or Computer Engineering with 15+ yrs of experience.</li>\n<li>Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool</li>\n<li>Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY</li>\n<li>Understanding of Tx/Rx equalization techniques.</li>\n<li>Knowledge of CDR architectures and CDR loop dynamics</li>\n<li>Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links</li>\n<li>Knowledge about common high-speed serial data protocols including Ethernet, OIF, JESD, CPRI</li>\n<li>Experience in lab testing of high-speed serial links</li>\n</ul>\n<p>Due to the cross disciplinary nature of this position, key qualifications include one or more of the following...</p>\n<ul>\n<li>Modelling - experience in Matlab/Simulink/C modeling of circuits and systems</li>\n<li>Communications theory - equalization, coding, noise/crosstalk filtering</li>\n<li>Digital - background in digital signal process (DSP)</li>\n<li>Analog - background in high-speed analog CMOS circuit design</li>\n<li>Hardware - awareness on per-protocol handing of RX and TX adaptation; hands on experience in measurement of transceiver performance</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Drive next-gen connectivity solutions.</li>\n<li>Advance Synopsys’ technical leadership.</li>\n<li>Enable superior performance for customers.</li>\n<li>Mentor and elevate team expertise.</li>\n<li>Contribute to industry standards.</li>\n<li>Promote collaboration and innovation</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Innovative, collaborative, and detail-oriented leader.</li>\n<li>Strong communicator and problem-solver.</li>\n<li>Committed to diversity and continuous learning.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a collaborative group of analog, digital, and hardware engineers driving enterprise connectivity innovation.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share details during the hiring process.</p>\n<p>#LI-NK4</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_157cb20b-6ad","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hillsboro/senior-system-architect-analog-design-13383/44408/88664321776","x-work-arrangement":"remote","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$166000-$249000","x-skills-required":["Matlab","SERDES transmitters and receivers","Circuit topologies","Tx/Rx equalization techniques","CDR architectures","CDR loop dynamics","Link budgets","High-speed serial data protocols","Lab testing"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:19:31.518Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"jobLocationType":"TELECOMMUTE","employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Matlab, SERDES transmitters and receivers, Circuit topologies, Tx/Rx equalization techniques, CDR architectures, CDR loop dynamics, Link budgets, High-speed serial data protocols, Lab testing","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":166000,"maxValue":249000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_089b279c-5da"},"title":"SystemC/ TLM Engineer - Virtual Prototyping","description":"<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You are an accomplished engineer with a passion for system-level design and a proven track record in virtual prototyping for complex SoCs, MCUs, or ECUs. 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Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to build and scale AI with confidence. Trusted by leading AI labs, startups, and global enterprises, CoreWeave combines superior infrastructure performance with deep technical expertise to accelerate breakthroughs and turn compute into capability.</p>\n<p>As the Global Logistics Data Center Operations Lead – (Americas or EMEA), you will:</p>\n<ul>\n<li>Lead end-to-end data center logistics operations for your region, spanning ramp and sustaining sites: dock-to-cage, storerooms, in-hall material flows, spares, and RMAs.</li>\n</ul>\n<ul>\n<li>Coordinate and develop Inventory Control Specialists (ICS) / Logistics Technicians, Regional Managers, and all DC logistics IC team members within your region.</li>\n</ul>\n<ul>\n<li>Translate build and M&amp;O plans into DC logistics capacity, coverage, and staffing (by site and by mode: ramp vs sustain).</li>\n</ul>\n<ul>\n<li>Own DC storeroom performance: inventory accuracy, pick accuracy, dock-to-stock, order-to-“ready for install”, chain-of-custody, and audit readiness.</li>\n</ul>\n<ul>\n<li>Standardize and enforce SOPs, playbooks, and visual management for data center logistics across your region, aligned to global GLO standards.</li>\n</ul>\n<ul>\n<li>Partner closely with the Global Logistics Warehouse &amp; FSL Operations Lead to ensure frictionless handoffs from warehouses/FSLs into DC logistics (crate handling, documentation, timing, and proof of delivery).</li>\n</ul>\n<ul>\n<li>Drive 3PL/4PL and white-glove performance at the DC interface (dock-to-cage, JIT deliveries, crate handling, returns) for your region.</li>\n</ul>\n<ul>\n<li>Lead regional cadence reviews with DC Ops, GLO, Security, and other stakeholders; publish KPI packs; own RCA/CAPA to closure for DC logistics issues.</li>\n</ul>\n<ul>\n<li>Act as the primary DC logistics point of contact for your region with Data Center Operations leadership, aligning site-level needs with global logistics capabilities.</li>\n</ul>\n<ul>\n<li>Mentor and grow frontline and regional DC logistics leaders and ICs, building a strong bench for future expansion.</li>\n</ul>\n<p>About the role:</p>\n<p>We are looking for a hands-on, operations-minded Global Logistics Data Center Operations Lead to standardize, coordinate, and continuously improve data center logistics execution across your region.</p>\n<p>In this role, you will own all in-data-center logistics functions in your region, including:</p>\n<ul>\n<li>ICS / Logistics Technicians and their managers (regional and site level).</li>\n</ul>\n<ul>\n<li>Storeroom operations (receiving, tagging, binning, cycle counts, replenishment).</li>\n</ul>\n<ul>\n<li>Data hall support logistics (kitting, pre-stage, JIT deliveries, crate handling, returns).</li>\n</ul>\n<ul>\n<li>Spares and RMA flows in partnership with warehouses, FSLs, and 3PLs.</li>\n</ul>\n<p>You will work in tight partnership with:</p>\n<ul>\n<li>The Global Logistics Warehouse &amp; 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As the Global Logistics Data Center Operations Lead – , you:</p>\n<ul>\n<li>Ensure materials, spares, and RMAs flow cleanly into and out of data centers.</li>\n</ul>\n<ul>\n<li>Tie day-to-day dock and storeroom work to measurable service outcomes for build and operations.</li>\n</ul>\n<ul>\n<li>Act as the single-threaded owner for DC logistics performance in your region, enabling scale through repeatable standards.</li>\n</ul>\n<p>Why CoreWeave?</p>\n<p>At CoreWeave, we work hard, have fun, and move fast! We’re in an exciting stage of hyper-growth that you will not want to miss out on. We’re not afraid of a little chaos, and we’re constantly learning. Our team cares deeply about how we build our product and how we work together, which is represented through our core values:</p>\n<ul>\n<li>Be Curious at Your Core</li>\n</ul>\n<ul>\n<li>Act Like an Owner</li>\n</ul>\n<ul>\n<li>Empower Employees</li>\n</ul>\n<ul>\n<li>Deliver Best-in-Class Client Experiences</li>\n</ul>\n<ul>\n<li>Achieve More Together</li>\n</ul>\n<p>We support and encourage an entrepreneurial outlook and independent thinking. We foster an environment that encourages collaboration and provides the opportunity to develop innovative solutions to complex problems. As we get set for take off, the growth opportunities within the organization are constantly expanding. You will be surrounded by some of the best talent in the industry, who will want to learn from you, too. Come join us!</p>\n<p>The base salary range for this role is $161,000 to $237,000. The starting salary will be determined based on job-related knowledge, skills, experience, and market location. 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This role will focus on the design, configuration, commissioning, and support of SEL-based protection and automation systems for high-reliability power infrastructure supporting our AI compute facilities.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Perform detailed configuration and programming of SEL protective relays (e.g., SEL-751, SEL-787, SEL-700G, etc.) using acSELerator QuickSet and SEL Grid Configurator.</li>\n<li>Develop and implement custom automation logic in SEL RTAC platforms using acSELerator Architect, IEC 61131-3 languages (Structured Text, Ladder Logic), and SEL Logic Engine.</li>\n<li>Design and test SCADA communication protocols including DNP3, Modbus, IEC 61850 GOOSE/MMS, and SEL protocols over Ethernet and serial interfaces.</li>\n<li>Conduct factory acceptance testing (FAT), site acceptance testing (SAT), relay setting validation, and end-to-end functional verification.</li>\n<li>Generate comprehensive documentation: one-line diagrams, logic diagrams, setting files, HMI screens, and commissioning reports.</li>\n<li>Provide technical support during system energization, troubleshooting, and post-commissioning maintenance.</li>\n<li>Collaborate with project managers, SCADA engineers, and field crews to ensure seamless integration and schedule compliance.</li>\n<li>Remain current with SEL firmware updates, NERC CIP cybersecurity requirements, and industry best practices.</li>\n</ul>\n<p>Basic Qualifications:</p>\n<ul>\n<li>Advanced proficiency in acSELerator QuickSet, Architect, and RTAC Web Interface.</li>\n<li>Demonstrated ability to develop complex automation sequences, synchrophasor applications, and remedial action schemes.</li>\n<li>Expertise in relay event analysis using SEL SynchroWAVE and Event Reporter.</li>\n<li>Familiarity with IEC 61850 configuration via SCL files (SCD, ICD, CID).</li>\n<li>SEL Authorized Training (e.g., SEL-5030, SEL-5033) preferred; PE license a plus but not required.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5f6e02d7-438","directApply":true,"hiringOrganization":{"@type":"Organization","name":"xAI","sameAs":"https://www.xai.com/","logo":"https://logos.yubhub.co/xai.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/xai/jobs/4965890007","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["acSELerator QuickSet","SEL Grid Configurator","acSELerator Architect","IEC 61131-3 languages","SEL Logic Engine","DNP3","Modbus","IEC 61850 GOOSE/MMS","SEL protocols","Ethernet","serial interfaces","factory acceptance testing","site acceptance testing","relay setting validation","end-to-end functional verification","comprehensive documentation","one-line diagrams","logic diagrams","setting files","HMI screens","commissioning reports","technical support","system energization","troubleshooting","post-commissioning maintenance","project managers","SCADA engineers","field crews","schedule compliance","SEL firmware updates","NERC CIP cybersecurity requirements","industry best practices"],"x-skills-preferred":[],"datePosted":"2026-04-18T15:49:02.628Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Memphis, TN"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"acSELerator QuickSet, SEL Grid Configurator, acSELerator Architect, IEC 61131-3 languages, SEL Logic Engine, DNP3, Modbus, IEC 61850 GOOSE/MMS, SEL protocols, Ethernet, serial interfaces, factory acceptance testing, site acceptance testing, relay setting validation, end-to-end functional verification, comprehensive documentation, one-line diagrams, logic diagrams, setting files, HMI screens, commissioning reports, technical support, system energization, troubleshooting, post-commissioning maintenance, project managers, SCADA engineers, field crews, schedule compliance, SEL firmware updates, NERC CIP cybersecurity requirements, industry best practices"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8f881f0c-d8f"},"title":"Materials Associate, Warehouse","description":"<p>As a Materials Associate, you will join our Supply Chain team at the Santa Ana, CA office. The Supply Chain team has a valuable impact for Anduril&#39;s business and mission, responsible for supporting our production and business growth through the material management and inventory flow. The right person for this role can demonstrate strong ownership and ability to solve operational challenges with creative solutions in a fast-paced, resource-limited environment. This person will be flexible to provide support wherever needed to ensure products are shipped and received under stringent quality standards to ensure.</p>\n<p>Key responsibilities include: Processing shipping and receiving at the Santa Ana and/or Costa Mesa locations as needed Preparing finished stock for shipment by identifying, pulling, packing, crating, labeling, loading, and securing product Ensuring material movement across sites is accurately transacted for each move Completing cycle counts and conducting all warehouse activities with inventory accuracy as a top priority Maintaining inventory by identifying, labeling, and keeping materials and supplies in stock, recording location of inventory, and reporting shortages Operating forklifts, pallet jacks, and other machinery to move items, or signaling machine operators to move materials onto and off trucks and loading docks Couriering inventory as needed between Anduril&#39;s sites in Santa Ana &amp; Costa Mesa Expediting the flow of material, parts, and assemblies within or between departments in accordance with production and shipping schedules</p>\n<p>Requirements include: 2+ years as a warehouse associate or equivalent role Must be able to work 1st or 2nd shift and overtime as needed Valid driver&#39;s license Ability to be onsite, local to Santa Ana, CA or Costa Mesa, CA</p>\n<p>Preferred qualifications include: 1+ years forklift experience and license Experience working in the defense/aerospace industry Familiarity with Enterprise Resource Planning (ERP) systems and/or other warehouse management and inventory control tooling Familiarity with Microsoft Office or equivalent office management tooling Familiarity with Inventory Management through lot/serial/batch tracking Experience packaging and handling hazardous shipments Excellent customer service skills Able to adapt in fast-paced environments Ability to flex as work shifts can be subject to change depending on the business need Ability to prioritize tasks efficiently and effectively Eligibility to obtain and maintain a U.S. clearance Active secret or top secret clearance within the last 5 years</p>\n<p>US Hourly Range $23-$31 USD The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full-time offers; and are considered part of Anduril&#39;s total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including: Healthcare Benefits Income Protection Generous time off Family Planning &amp; Parenting Support Mental Health Resources Professional Development Commuter Benefits Relocation Assistance Retirement Savings Plan</p>\n<p>The recruiter assigned to this role can share more information about the specific compensation and benefit details associated with this role during the hiring process.</p>\n<p>Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We&#39;ve observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information.</p>\n<p>To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates. Please always verify communications: Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency&#39;s authenticity by reaching out to contact@anduril.com. Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender&#39;s email domain is @anduril.com before providing any personal information or clicking on links. What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to contact@anduril.com. Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts.</p>\n<p>Data Privacy</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8f881f0c-d8f","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril","sameAs":"https://www.anduril.com/","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/4653024007","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"full-time","x-salary-range":"$23-$31 USD per hour","x-skills-required":["Warehouse management","Inventory control","Forklift operation","Cycle counting","Material handling","Shipping and receiving","Inventory management","Microsoft Office"],"x-skills-preferred":["Enterprise Resource Planning (ERP)","Warehouse management software","Inventory management through lot/serial/batch tracking","Hazardous materials handling","Customer service","Adaptability","Prioritization","U.S. clearance","Top secret clearance"],"datePosted":"2026-04-18T15:48:57.694Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Santa Ana, California, United States"}},"employmentType":"FULL_TIME","occupationalCategory":"Operations","industry":"Technology","skills":"Warehouse management, Inventory control, Forklift operation, Cycle counting, Material handling, Shipping and receiving, Inventory management, Microsoft Office, Enterprise Resource Planning (ERP), Warehouse management software, Inventory management through lot/serial/batch tracking, Hazardous materials handling, Customer service, Adaptability, Prioritization, U.S. clearance, Top secret clearance"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_cf714d40-de5"},"title":"Integration & Test Technician, Omen","description":"<p>Anduril is seeking an Integration and Test Technician to join the Omen team at our Costa Mesa HQ. Omen is an autonomous air vehicle (AAV) that packs the endurance, payload, and mission flexibility of much larger airplanes into a novel runway-independent Group 3 platform. You will work on new aircraft development, including propulsion systems, avionics, batteries, mechanisms, structures sensors and payloads, in a lean, high-ownership culture where you directly shape the product and operate at a velocity to fly new designs within months, not years.</p>\n<p>As an Integration and Test Technician, you will:</p>\n<ul>\n<li>Support the use of &#39;Test&#39; as a design tool to accelerate component, system and subsystem maturation from discrete bench tests to production representative Vehicle, Mission and Support Systems</li>\n<li>Assemble complex electro-mechanical subsystems, high quality wire harnesses, test racks, junction boxes, and associated components involving hand soldering and component assembly and integration</li>\n<li>Build, sustain and operate highly representative Hardware In the Lab (HIL) and Hardware In The Loop (HITL) physical integration environments, including high voltage, high power hybrid powertrain testbeds</li>\n<li>Integrate developmental subsystems into uncrewed surrogate platforms (Group 2 and 3 UAS), and support ongoing flight test and maintenance operations</li>\n<li>Act with a strong safety mindset (stop, think, do) to execute work safely in experimental environments with the aim of eliminating potential harm to team members</li>\n<li>Support Test Readiness Reviews (TRR), ensuring that tests can be safety and efficiently conducted</li>\n<li>Execute test procedures across integration environments, efficiently capturing and reporting learnings</li>\n<li>Maintain configuration control of integration environments</li>\n<li>Support build, ground and flight test of prototype and production representative Omen Systems</li>\n</ul>\n<p>The ideal candidate will have:</p>\n<ul>\n<li>Associate Degree (or similar) in Electrical/Electronics, Computer, Mechanical Technologies, or related fields</li>\n<li>5+ years of component, electrical and electronics build and test experience in an R&amp;D environment and exposure to manufacturing settings with rigorous quality systems (such as Aerospace, Electronics, or Medical industries)</li>\n<li>Participation in building and operating HIL/HITL/IRON BIRD environments for flight vehicles</li>\n<li>Experience in operating and maintaining Group 2 or 3 UAS (or larger)</li>\n<li>Competency in reading electrical system and component schematics, and capturing &#39;as-built&#39; configurations</li>\n<li>Proficiency with electronics test equipment such as power supplies, electronic loads, oscilloscope, function generators, data acquisition and diagnostic sensors</li>\n<li>Knowledge of electronics/communications/integration troubleshooting, experience in debug of common protocols such as CAN/Ethernet/Serial</li>\n<li>Experience with high voltage and high power testing such as propulsion inverters, batteries and hybrid powertrains</li>\n<li>Competency with Linux and command line interface as well as software debugging preferable</li>\n<li>Excellent written, verbal, interpersonal and communication skills</li>\n<li>A sincere commitment to a positive, inclusive, and collaborative culture</li>\n<li>Eligible to obtain and maintain a security clearance in United States, United Kingdom, or Australia desirable</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_cf714d40-de5","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril","sameAs":"https://www.anduril.com/","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/5006275007","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$146,000-$194,000 USD","x-skills-required":["Electrical/Electronics","Computer","Mechanical Technologies","Component assembly and integration","High voltage and high power testing","Linux and command line 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prototyping systems.\nCollaborating with IP, emulation, and prototyping teams to deliver comprehensive, end-to-end system-level validation solutions.\nDeveloping and debugging RTL, firmware, and system-level components for Speed Adapter products.\nSupporting seamless integration with ZeBu and HAPS platforms, including creating example designs and reference flows.\nParticipating in customer escalations, conducting root-cause analysis, and delivering solutions for complex system-level issues.\nContributing to roadmap planning, feature definition, and technical differentiation versus competitive solutions.</p>\n<p>Enable customers to connect pre-silicon designs to real devices, testers, and hosts with unmatched fidelity and performance.\nAdvance industry-leading system-level validation technology for top semiconductor and hyperscale customers.\nShape the adoption and implementation of next-generation protocols such as PCIe Gen6/Gen7 and CXL3.x/4.0.\nDrive innovation in hardware-assisted verification, influencing patent-pending technologies that differentiate Synopsys solutions.\nEnhance integration across IP, emulation, prototyping, and real-world connectivity to deliver robust validation platforms.\nSupport global teams and customers, fostering technical excellence and collaborative problem-solving.</p>\n<p>12 years+ relevant experience\nBachelor&#39;s or Master&#39;s degree in Electrical Engineering, Computer Engineering, or related field.\nStrong hands-on experience with PCIe and/or CXL protocols, including implementation and debugging.\nSolid understanding of digital design, RTL development, and FPGA-based systems.\nExperience with system-level validation, emulation, or prototyping environments.\nFamiliarity with high-speed serial interfaces and real-world I/O connectivity.\nStrong debugging skills across RTL, firmware, and hardware/software boundaries.\nAbility to work effectively in a cross-geography, cross-functional team.</p>\n<p>Innovative thinker with a strategic mindset.\nCollaborative team player who values diverse perspectives.\nExcellent communicator and technical mentor.\nResilient problem-solver, able to navigate ambiguity and complexity.\nCustomer-focused, with a commitment to delivering high-impact solutions.\nAdaptable and proactive, eager to stay ahead in a fast-evolving technology landscape.</p>\n<p>You&#39;ll join the Speed Adapter engineering team within Synopsys&#39; HW-Assisted Verification (HAV) organization.\nThis talented group is dedicated to developing and deploying industry-leading Speed Adapter solutions that bridge advanced protocols and real-world interfaces with ZeBu emulation and HAPS prototyping platforms.\nThe team collaborates globally across IP, emulation, and prototyping domains to deliver robust, high-performance system validation solutions, directly impacting the success of top semiconductor and hyperscale customers.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.\nOur total rewards include both monetary and non-monetary offerings.\nYour recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work.\nSynopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses.\nSynopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package.\nThe actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education.\nYour recruiter can share more specific details on the total rewards package upon request.</p>\n<p>At Synopsys, innovation is driven by our incredible team around the world.\nWe feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day.\nWe&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_ec579fde-89b","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/r-and-d-engineering-architect-fpga-design-pcie-protocol/44408/92655118112","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$208,000 - $312,000","x-skills-required":["FPGA design","Advanced protocol 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leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.</p>\n<p>You will specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores.</p>\n<p>You will perform verification tasks for IP cores, working closely with RTL designers and architects to ensure functional correctness.</p>\n<p>You will develop and implement advanced test plans and test environments at both unit and system levels.</p>\n<p>You will code and debug test cases, including the creation of complex checkers and assertions using System Verilog/UVM.</p>\n<p>You will extract and review functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.</p>\n<p>You will manage regressions and contribute to the continuous improvement of verification strategies and test environments.</p>\n<p>This role requires a deep understanding of verification methodologies, serial interface protocols, and the intricacies of IP core development.</p>\n<p>You should have demonstrated experience in technically leading a team for DDR IP projects, with a track record of successful collaboration and stakeholder management.</p>\n<p>You should have proven expertise in developing HVL (System Verilog/UVM) based test environments for complex ASIC designs.</p>\n<p>You should have advanced skills in developing and implementing rigorous test plans, checkers, and assertions.</p>\n<p>You should have strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.</p>\n<p>You should have experience with serial interface protocols and IP design/verification processes; knowledge of DDR/LPDDR is highly desirable.</p>\n<p>You should have hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.</p>\n<p>You will join the DesignWare IP Verification R&amp;D team, a group of talented and passionate engineers committed to advancing Synopsys&#39; leadership in semiconductor IP.</p>\n<p>The team focuses on delivering world-class verification solutions for a broad portfolio of synthesizable IP cores, leveraging the latest methodologies and technologies to ensure our products meet the most rigorous quality and performance standards.</p>\n<p>Collaboration, innovation, and a drive for excellence define our culture.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</p>\n<p>Our total rewards include both monetary and non-monetary offerings.</p>\n<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_2a58c59b-da1","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/asic-design-verification-sr-staff-engineer-ddr/44408/89681053968","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC verification","System Verilog/UVM","HVL","Serial interface protocols","IP core development","Verification methodologies","Test plans and test environments","Functional coverage and code coverage metrics","Regressions and continuous improvement"],"x-skills-preferred":["DDR/LPDDR","RTL designers and architects","Chip architecture and circuit design","Semiconductor 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As a Principal SerDes Systems Engineer, you will be responsible for developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards. You will also run comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.</li>\n<li>Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>M.Sc. or Ph.D. in Electrical or Computer Engineering.</li>\n<li>Strong experience modeling circuits and systems in MATLAB/Simulink.</li>\n<li>Expertise in designing high-speed analog CMOS circuits.</li>\n<li>Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.</li>\n<li>Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.</li>\n<li>Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).</li>\n<li>Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.</li>\n<li>Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_0b1006f8-b4f","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/eindhoven/principal-serdes-systems-engineer/44408/92341044576","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["M.Sc. or Ph.D. in Electrical or Computer Engineering","Strong experience modeling circuits and systems in MATLAB/Simulink","Expertise in designing high-speed analog CMOS circuits","Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering","Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links","Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR)","Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques","Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog"],"x-skills-preferred":["Innovative thinker with a passion for cutting-edge technology","Collaborative team player who thrives in a multidisciplinary environment","Analytical problem-solver with meticulous attention to detail","Effective communicator, able to translate complex concepts for diverse audiences","Adaptable and eager to learn, keeping pace with evolving industry trends","Customer-focused, dedicated to delivering exceptional support and results"],"datePosted":"2026-03-06T07:23:19.354Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Eindhoven, North Brabant, Netherlands"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"M.Sc. or Ph.D. in Electrical or Computer Engineering, Strong experience modeling circuits and systems in MATLAB/Simulink, Expertise in designing high-speed analog CMOS circuits, Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering, Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links, Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR), Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques, Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog, Innovative thinker with a passion for cutting-edge technology, Collaborative team player who thrives in a multidisciplinary environment, Analytical problem-solver with meticulous attention to detail, Effective communicator, able to translate complex concepts for diverse audiences, Adaptable and eager to learn, keeping pace with evolving industry trends, Customer-focused, dedicated to delivering exceptional support and results"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_600601e3-040"},"title":"Principal SerDes Systems Engineer","description":"<p>We are seeking a Principal SerDes Systems Engineer to join our team. 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We&#39;re looking for a talented R&amp;D Staff Engineer to join our team and contribute to the development of virtual prototypes for complex SoCs, MCUs, or ECUs.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Designing and developing virtual prototypes (simulation models) for advanced SoC, MCU, and ECU platforms across automotive, datacentre, AI, and mobile applications.</li>\n<li>Modeling, integrating, and testing various peripherals using SystemC-based platform modeling frameworks.</li>\n<li>Collaborating with stakeholders to define IP modeling requirements and creating ESL (Electronic System Level) model specifications.</li>\n<li>Driving effective closure of technical issues, ensuring high-quality deliverables and alignment with project goals.</li>\n<li>Guiding and mentoring junior engineers and consultants in system-level platform creation, validation, and software bring-up activities.</li>\n<li>Engaging in early software development and testing use cases, including bringing up Linux, Android, AutoSAR, and embedded software applications.</li>\n<li>Contributing to the continuous improvement of virtual prototyping methodologies, tools, and workflows.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Strong proficiency in C/C++ programming languages.</li>\n<li>Extensive experience in modeling and integrating SoC peripherals using C/C++, SystemC, or HDL.</li>\n<li>Solid problem-solving skills with the ability to analyze and resolve complex technical challenges.</li>\n<li>Experience developing applications in assembly or higher-level languages.</li>\n<li>Understanding of SoC architectures and serial bus protocols such as CAN, LIN, SPI, and I2C.</li>\n<li>Hands-on experience with Synopsys Virtualizer tool (preferred).</li>\n<li>Knowledge of multi-core platform development and GitHub Copilot/Curson-assisted flows (preferred).</li>\n</ul>\n<p><strong>Why this matters</strong></p>\n<ul>\n<li>Accelerate early software development and validation cycles for Synopsys&#39; customers by delivering high-fidelity virtual prototypes.</li>\n<li>Enable faster time-to-market for next-generation automotive, datacentre, AI, and mobile products through robust simulation models.</li>\n<li>Enhance the quality and reliability of software and hardware integration by facilitating early testing and debugging.</li>\n<li>Drive innovation in system-level modeling and contribute to the evolution of Synopsys&#39; virtual prototyping solutions.</li>\n<li>Support customer engagements and success stories by providing expert technical guidance and troubleshooting.</li>\n<li>Mentor and develop the next generation of engineering talent within the team and broader organization.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_11a88b06-32d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/r-and-d-staff-engineer-virtual-prototyping/44408/92167408592","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["C/C++ programming languages","SystemC-based platform modeling frameworks","SoC architectures and serial bus protocols","Synopsys Virtualizer tool"],"x-skills-preferred":["multi-core platform development","GitHub Copilot/Curson-assisted flows"],"datePosted":"2026-03-04T17:10:34.880Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C/C++ programming languages, SystemC-based platform modeling frameworks, SoC architectures and serial bus protocols, Synopsys Virtualizer tool, multi-core platform development, GitHub Copilot/Curson-assisted flows"}]}