Responsibilities:

• Perform detailed configuration and programming of SEL protective relays (e.g., SEL-751, SEL-787, SEL-700G, etc.) using acSELerator QuickSet and SEL Grid Configurator.
• Develop and implement custom automation logic in SEL RTAC platforms using acSELerator Architect, IEC 61131-3 languages (Structured Text, Ladder Logic), and SEL Logic Engine.
• Design and test SCADA communication protocols including DNP3, Modbus, IEC 61850 GOOSE/MMS, and SEL protocols over Ethernet and serial interfaces.
• Conduct factory acceptance testing (FAT), site acceptance testing (SAT), relay setting validation, and end-to-end functional verification.
• Generate comprehensive documentation: one-line diagrams, logic diagrams, setting files, HMI screens, and commissioning reports.
• Provide technical support during system energization, troubleshooting, and post-commissioning maintenance.
• Collaborate with project managers, SCADA engineers, and field crews to ensure seamless integration and schedule compliance.
• Remain current with SEL firmware updates, NERC CIP cybersecurity requirements, and industry best practices.

Basic Qualifications:

• Advanced proficiency in acSELerator QuickSet, Architect, and RTAC Web Interface.
• Demonstrated ability to develop complex automation sequences, synchrophasor applications, and remedial action schemes.
• Expertise in relay event analysis using SEL SynchroWAVE and Event Reporter.
• Familiarity with IEC 61850 configuration via SCL files (SCD, ICD, CID).
• SEL Authorized Training (e.g., SEL-5030, SEL-5033) preferred; PE license a plus but not required.

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The ideal candidate has extensive experience in RF system design, testing, and benchmarking, with a strong foundation in wireless communications, spectrum management, and signal propagation in marine environments. This is a technically demanding, research-focused position with opportunities to influence system architecture and future platform capabilities.

Key Responsibilities:

• Lead R&D efforts in RF communications, radar, and electronic sensing technologies for autonomous surface vessels.
• Evaluate and benchmark RF hardware and subsystems, including radios, antennas, and signal processing modules across multiple frequency bands (VHF/UHF, L/S/C/X bands).
• Conduct trade studies and comparative analyses of commercial and military-grade RF solutions to inform system selection and integration strategies.
• Design, prototype, and test RF systems and supporting electrical architectures, including cabling, shielding, and power interfaces.
• Model and analyze RF propagation and link performance in maritime and littoral environments.
• Collaborate cross-functionally with autonomy, software, and mechanical teams to ensure seamless integration of communication and sensing systems.
• Develop test procedures, perform validation trials, and analyze system performance under operational and environmental conditions.
• Author detailed R&D documentation, including technical reports, design specifications, and performance evaluations.
• Mentor junior engineers and contribute to Saronic’s RF technology roadmap and internal knowledge base.
• Support field testing and vessel trials, including setup and troubleshooting of communication and radar systems.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, RF Engineering, or related discipline.
• 7+ years of professional experience in RF system design, testing, and integration -preferably in maritime, automotive, aerospace, or defense applications.
• Deep understanding of RF theory, antenna design, and signal propagation, including real-world marine effects (multipath, reflection, attenuation).
• Hands-on experience with RF instrumentation (spectrum analyzers, network analyzers, signal generators, power meters, etc.).
• Proven ability to conduct trade studies and technology benchmarking for RF components and systems.
• Familiarity with communications protocols such as Ethernet, CAN, and serial interfaces, and with wireless standards (LTE, SATCOM, mesh networking).
• Strong documentation and communication skills; able to translate test results into actionable design insights.
• Ability to work effectively in both lab and field test environments (dockside, at-sea, and range conditions).

Physical Requirements:

• Prolonged periods of sitting at a desk and working on a computer.
• Occasional standing and walking within the office.
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.
• Visual acuity to read screens, documents, and reports.
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

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In this role, you will define FPGA architectures, implement high-performance digital logic, and collaborate closely with hardware, firmware, and quantum engineering teams to build scalable, low-latency control systems.

Key responsibilities include: Developing and improving a custom microprocessor responsible for waveform generation and critical logic to operate a quantum computer Working closely with hardware, firmware, and software teams to define architecture, data flow, and interfaces Implementing, simulating, and verifying designs including DSP pipelines, control logic, and high-speed I/O Optimizing designs for latency, resource utilization, and robustness in production environments Developing and maintaining testbenches, verification flows, and CI Supporting bring-up, lab validation, and debugging in collaboration with Quantum Engineering on actual quantum computers Contributing to the long-term roadmap for the architecture of Rigetti’s control systems.

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Designing, developing, and maintaining Speed Adapter solutions for advanced protocols, including PCIe and CXL. Implementing protocol functionality on FPGA-based platforms to bridge real-world I/O with DUTs running at reduced speeds on emulation and prototyping systems. Collaborating with IP, emulation, and prototyping teams to deliver comprehensive, end-to-end system-level validation solutions. Developing and debugging RTL, firmware, and system-level components for Speed Adapter products. Supporting seamless integration with ZeBu and HAPS platforms, including creating example designs and reference flows. Participating in customer escalations, conducting root-cause analysis, and delivering solutions for complex system-level issues. Contributing to roadmap planning, feature definition, and technical differentiation versus competitive solutions.

Enable customers to connect pre-silicon designs to real devices, testers, and hosts with unmatched fidelity and performance. Advance industry-leading system-level validation technology for top semiconductor and hyperscale customers. Shape the adoption and implementation of next-generation protocols such as PCIe Gen6/Gen7 and CXL3.x/4.0. Drive innovation in hardware-assisted verification, influencing patent-pending technologies that differentiate Synopsys solutions. Enhance integration across IP, emulation, prototyping, and real-world connectivity to deliver robust validation platforms. Support global teams and customers, fostering technical excellence and collaborative problem-solving.

12 years+ relevant experience Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. Strong hands-on experience with PCIe and/or CXL protocols, including implementation and debugging. Solid understanding of digital design, RTL development, and FPGA-based systems. Experience with system-level validation, emulation, or prototyping environments. Familiarity with high-speed serial interfaces and real-world I/O connectivity. Strong debugging skills across RTL, firmware, and hardware/software boundaries. Ability to work effectively in a cross-geography, cross-functional team.

Innovative thinker with a strategic mindset. Collaborative team player who values diverse perspectives. Excellent communicator and technical mentor. Resilient problem-solver, able to navigate ambiguity and complexity. Customer-focused, with a commitment to delivering high-impact solutions. Adaptable and proactive, eager to stay ahead in a fast-evolving technology landscape.

You'll join the Speed Adapter engineering team within Synopsys' HW-Assisted Verification (HAV) organization. This talented group is dedicated to developing and deploying industry-leading Speed Adapter solutions that bridge advanced protocols and real-world interfaces with ZeBu emulation and HAPS prototyping platforms. The team collaborates globally across IP, emulation, and prototyping domains to deliver robust, high-performance system validation solutions, directly impacting the success of top semiconductor and hyperscale customers.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

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