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      <externalid>157cb20b-6ad</externalid>
      <Title>Senior System Architect, Analog Design</Title>
      <Description><![CDATA[<p>Engineer the Future with Us</p>
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<p><strong>Senior System Architect, Analog Design-13383</strong></p>
<p>United States Off-siteSave</p>
<p><strong>Remote Eligible</strong> Yes<strong>Hire Type</strong> Employee<strong>Job ID</strong> 13383<strong>Base Salary Range</strong> $166000-$249000<strong>Date posted</strong> 11/19/2025</p>
<p><strong>We Are:</strong></p>
<p>At Synopsys, we drive innovations that shape the way we live and connect. Our Enterprise SerDes team leads in high-speed chip design, enabling tomorrow&#39;s connectivity for PCIe and Ethernet. Join us to create the future of pervasive intelligence.</p>
<p><strong>You Are:</strong></p>
<p>You are an expert in system-level architecture for serial-link transceivers, with 15+ years of experience and a passion for pushing technology boundaries. You thrive in cross-functional teams, communicate complex ideas clearly, and have a track record of successful product development. Your deep knowledge of high-speed analog/digital design and strong leadership make you an ideal fit.</p>
<p><strong>What You’ll Be Doing:</strong></p>
<ul>
<li>Architecture: definition of architecture and specifications for the transmitter and receiver</li>
<li>Modelling: design and maintenance of the system level model</li>
<li>Signal/Power Integrity: analyzing different signal and power integrity requirements</li>
<li>Sign-off: system level simulation of the design performance across multiple protocols and channels</li>
<li>Silicon: qualification and correlation of performance and algorithms in silicon</li>
<li>Customers: assisting customers on system level performance and algorithmic issues</li>
</ul>
<p><strong>What You’ll Need:</strong></p>
<ul>
<li>You have a MSc or PhD in Electrical or Computer Engineering with 15+ yrs of experience.</li>
<li>Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool</li>
<li>Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY</li>
<li>Understanding of Tx/Rx equalization techniques.</li>
<li>Knowledge of CDR architectures and CDR loop dynamics</li>
<li>Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links</li>
<li>Knowledge about common high-speed serial data protocols including Ethernet, OIF, JESD, CPRI</li>
<li>Experience in lab testing of high-speed serial links</li>
</ul>
<p>Due to the cross disciplinary nature of this position, key qualifications include one or more of the following...</p>
<ul>
<li>Modelling - experience in Matlab/Simulink/C modeling of circuits and systems</li>
<li>Communications theory - equalization, coding, noise/crosstalk filtering</li>
<li>Digital - background in digital signal process (DSP)</li>
<li>Analog - background in high-speed analog CMOS circuit design</li>
<li>Hardware - awareness on per-protocol handing of RX and TX adaptation; hands on experience in measurement of transceiver performance</li>
</ul>
<p><strong>The Impact You Will Have:</strong></p>
<ul>
<li>Drive next-gen connectivity solutions.</li>
<li>Advance Synopsys’ technical leadership.</li>
<li>Enable superior performance for customers.</li>
<li>Mentor and elevate team expertise.</li>
<li>Contribute to industry standards.</li>
<li>Promote collaboration and innovation</li>
</ul>
<p><strong>Who You Are:</strong></p>
<ul>
<li>Innovative, collaborative, and detail-oriented leader.</li>
<li>Strong communicator and problem-solver.</li>
<li>Committed to diversity and continuous learning.</li>
</ul>
<p><strong>The Team You’ll Be A Part Of:</strong></p>
<p>You’ll join a collaborative group of analog, digital, and hardware engineers driving enterprise connectivity innovation.</p>
<p><strong>Rewards and Benefits:</strong></p>
<p>We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share details during the hiring process.</p>
<p>#LI-NK4</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>remote</Workarrangement>
      <Salaryrange>$166000-$249000</Salaryrange>
      <Skills>Matlab, SERDES transmitters and receivers, Circuit topologies, Tx/Rx equalization techniques, CDR architectures, CDR loop dynamics, Link budgets, High-speed serial data protocols, Lab testing</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys drives innovations that shape the way we live and connect through high-speed chip design, enabling tomorrow&apos;s connectivity for PCIe and Ethernet.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/hillsboro/senior-system-architect-analog-design-13383/44408/88664321776</Applyto>
      <Location>Sunnyvale</Location>
      <Country></Country>
      <Postedate>2026-04-24</Postedate>
    </job>
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