{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/serdes-technology"},"x-facet":{"type":"skill","slug":"serdes-technology","display":"Serdes Technology","count":1},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_32c9fdc1-fd4"},"title":"Analog Design, Sr Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>We are seeking an expert analog design engineer with a passion for high-speed integrated circuits and a drive to push the boundaries of SERDES technology. As a Sr Staff Engineer, you will lead the design and development of high-performance analog and mixed-signal solutions in advanced process nodes.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Reviewing SERDES standards to develop innovative transceiver architectures and sub-block specifications for Multi-Gbps NRZ &amp; PAM4 SERDES IP.</li>\n<li>Investigating and architecting advanced circuit solutions to overcome bottlenecks, achieving breakthroughs in power efficiency, area reduction, and performance.</li>\n<li>Collaborating with cross-functional teams, including analog, digital, and layout engineers,to optimize design and verification strategies for superior quality and project efficiency.</li>\n<li>Presenting and critically reviewing simulation data within project teams and at external industry panels or customer meetings.</li>\n<li>Overseeing physical layout to minimize parasitics, device stress, and process variations, ensuring robust manufacturability and reliability.</li>\n<li>Documenting design features, creating comprehensive test plans, and ensuring traceability throughout the development lifecycle.</li>\n<li>Consulting on electrical characterization of SERDES IP, analyzing customer silicon data, and proposing enhancements or post-silicon updates as needed.</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Driving the next generation of high-speed data communication through pioneering SERDES architectures.</li>\n<li>Enabling Synopsys customers to achieve industry-leading performance, power efficiency, and reliability in their products.</li>\n<li>Fostering a culture of technical excellence and innovation within a diverse, high-caliber design team.</li>\n<li>Accelerating project timelines by streamlining design and verification methodologies.</li>\n<li>Enhancing the overall quality and competitiveness of Synopsys IP offerings through expert problem-solving and continuous improvement.</li>\n<li>Mentoring and developing junior engineers, strengthening the team&#39;s collective expertise and future leadership pipeline.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Ph.D. with 6+ years, or M.Sc. with 8+ years of practical analog IC design experience, preferably in Electrical Engineering, Computer Engineering, or a related field.</li>\n<li>Deep expertise in transistor-level circuit design and sound CMOS fundamentals.</li>\n<li>Hands-on design experience with one or more SERDES sub-circuits (e.g., receive equalizers, samplers, drivers, serializers/deserializers, voltage-controlled oscillators, PLLs, bandgap references, ADCs, DACs).</li>\n<li>Proficiency with schematic entry, physical layout, and design verification tools; familiarity with SPICE simulators and simulation methodologies.</li>\n<li>Experience with analog/digital co-design for performance optimization, including calibration, adaptation, and timing handoff.</li>\n<li>Knowledge of reliability and layout effects (EM, IR, aging, matching, proximity, ESD, etc.).</li>\n<li>Proficiency in Verilog-A for analog behavioral modeling, and experience with scripting languages such as TCL, Perl, C, Python, or MATLAB.</li>\n<li>Excellent communication, presentation, and documentation skills.</li>\n</ul>\n<p>Team:</p>\n<ul>\n<li>You will join a dynamic, growing analog and mixed-signal design team focused on developing cutting-edge Multi-Gbps SERDES IP.</li>\n<li>The team is composed of passionate engineers from diverse backgrounds, collaborating closely with digital designers, layout specialists, and software/CAD experts.</li>\n<li>Our culture emphasizes technical excellence, innovation, and continuous learning.</li>\n<li>With access to best-in-class design tools and in-house support, this team thrives on solving industry-defining challenges and delivering world-class IP to Synopsys&#39; global customers.</li>\n</ul>\n<p>Rewards and Benefits:</p>\n<ul>\n<li>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</li>\n<li>Our total rewards include both monetary and non-monetary offerings.</li>\n<li>Your recruiter will provide more details about the salary range and benefits during the hiring process.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_32c9fdc1-fd4","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ottawa/analog-design-sr-staff-engineer/44408/94257665728","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"Competitive salary and benefits package","x-skills-required":["Analog IC design","CMOS fundamentals","SERDES technology","Transistor-level circuit design","Schematic entry","Physical layout","Design verification tools","SPICE simulators","Simulation methodologies","Analog/digital co-design","Calibration","Adaptation","Timing handoff","Reliability and layout effects","Verilog-A","Scripting languages","Communication","Presentation","Documentation"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:08.755Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ottawa"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog IC design, CMOS fundamentals, SERDES technology, Transistor-level circuit design, Schematic entry, Physical layout, Design verification tools, SPICE simulators, Simulation methodologies, Analog/digital co-design, Calibration, Adaptation, Timing handoff, Reliability and layout effects, Verilog-A, Scripting languages, Communication, Presentation, Documentation"}]}