<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>84adbba8-30e</externalid>
      <Title>SerDes Analog Behavioral Modeling &amp; Validation Engineer</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.</p>
<p>They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>
<p><strong>Job Description</strong></p>
<p>We are seeking an experienced SerDes Analog Behavioral Modeling &amp; Validation Engineer to join our team.</p>
<p>As a key member of our engineering team, you will be responsible for developing and refining behavioral models for high-speed SerDes blocks, collaborating with analog teams for SPICE-vs-model correlation and sign-off, and working with digital verification teams on edge-case coverage.</p>
<p><strong>Responsibilities</strong></p>
<ul>
<li>Collaborate with analog teams for SPICE-vs-model correlation and sign-off.</li>
<li>Develop and refine behavioral models for high-speed SerDes blocks.</li>
<li>Capture calibration, adaptation, and impairments in models.</li>
<li>Work with digital verification teams on edge-case coverage.</li>
<li>Automate comparison flows and improve model fidelity.</li>
<li>Embed realistic non-idealities and verify behavioral netlists.</li>
</ul>
<p><strong>Impact</strong></p>
<ul>
<li>Deliver high-trust models, reducing mixed-signal bugs.</li>
<li>Enable realistic digital verification and improve coverage.</li>
<li>Strengthen Synopsys&#39; reputation for robust connectivity IP.</li>
<li>Catch issues early and accelerate debug cycles.</li>
<li>Foster collaboration between analog, modeling, and DV teams.</li>
</ul>
<p><strong>Requirements</strong></p>
<ul>
<li>BSc, MSc, or PhD in Electrical/Computer Engineering with 5+ years experience.</li>
<li>Expertise in SerDes analog blocks and modeling impairments.</li>
<li>Fluency with SPICE tools and waveform analysis.</li>
<li>Strong scripting/programming in Python, TCL, Perl, C/C++.</li>
<li>Experience automating comparisons and reporting.</li>
</ul>
<p><strong>Team</strong></p>
<p>You&#39;ll join a multidisciplinary group focused on modeling, validation, and verification of high-speed SerDes IP,bridging analog and digital domains for industry-leading solutions.</p>
<p><strong>Rewards and Benefits</strong></p>
<p>We offer a comprehensive range of health, wellness, and financial benefits.</p>
<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>SerDes analog blocks, modeling impairments, SPICE tools, waveform analysis, Python, TCL, Perl, C/C++</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) for the semiconductor industry.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/mississauga/serdes-analog-behavioral-modeling-and-validation-engineer-16514/44408/93247558000</Applyto>
      <Location>Mississauga</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
  </jobs>
</source>