As a Backend Engineer - API at xAI, you will play a crucial role in building the xAI API that serves our models to developers worldwide. You will own the end-to-end system responsible for high-throughput inference, handling billions of tokens per minute with low latency and high availability, including model serving infrastructure, request routing, SDK development, rate limiting, observability, and efficient scaling.

Responsibilities

• Build the xAI API that serves our models to developers worldwide
• Own the end-to-end system responsible for high-throughput inference, handling billions of tokens per minute with low latency and high availability, including model serving infrastructure, request routing, SDK development, rate limiting, observability, and efficient scaling

Basic Qualifications

• Expert knowledge of either Rust or C++
• Experience in designing, implementing, and maintaining reliable and horizontally scalable distributed systems
• Knowledge of service observability and reliability best practices
• Experience in operating commonly used databases such as PostgreSQL, Clickhouse, and MongoDB

Preferred Skills and Experience

• Experience with LLM inference engines and serving frameworks (e.g., SGLang, TensorRT, vLLM)
• Experience designing or building with agent SDKs and agent orchestration frameworks
• Experience with Docker, Kubernetes, and containerized applications
• Expert knowledge of gRPC (unary, response streaming, bi-directional streaming, REST mapping)

Compensation and Benefits

$180,000 - $440,000 USD

Base salary is just one part of our total rewards package at xAI, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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TruffleHog is a popular open source tool used by security researchers all over the world to find leaky API keys and responsibly disclose them to affected companies. This provides income through bug bounty platforms like HackerOne to individuals that may otherwise have a hard time finding employment. This also prevents breaches from occurring, which can be very costly for companies to resolve.

We’re looking for help supporting our mission to prevent leaking credentials and build the best products for machine identity protection. At Truffle, you’ll have the opportunity to join a fully remote, collaborative team contributing to meaningful advancements in cybersecurity.

About the role

We’re looking for our first Head of Sales Development to transform our outbound function into a scalable, high-velocity engine designed for rapid expansion. Historically, our SDR management has been embedded within broader sales leadership. As we enter a significant growth phase, we are carving out this dedicated leadership role to support a major expansion of our go-to-market team.

This isn’t just a “people management” role,this is a systems-design role. You will be the architect of our outbound strategy, moving us away from manual workflows toward an automation-first approach that prioritizes high-intent signals and AI augmentation.

What you’ll be working on

• Lead the hiring and onboarding of a new cohort of SDRs to support our aggressive AE growth targets
• Define what “good” looks like across cold calling, email, and LinkedIn, and build the playbooks to help your team get there
• Foster a “builder” mentality within the SDR team, encouraging experimentation and professional growth
• Deep dive into current processes to identify bottlenecks and manual friction points
• Build and manage sophisticated data enrichment workflows in Clay (or similar tools) to drive signal-based outbound efforts
• Use metrics to diagnose performance, track pipeline contribution, and tie SDR activity directly to revenue outcomes
• Work closely with RevOps to ensure our tech stack is integrated and our data models are actionable

What we’re looking for

• Proven track record of managing and scaling an SDR/BDR team in a high-growth environment
• You think in terms of systems and data, not just activity while using metrics to drive every decision
• Strong understanding of prospecting, sequencing, messaging and having built playbooks from scratch
• You are proficient with Clay (or equivalent enrichment tools) and have hands-on experience implementing AI-driven workflows
• You have led sales development teams selling into Security, DevOps, or IT sectors

Salary range

The target base salary range for this position is between $135,000 to $150,000 for candidates in the United States. This position spans multiple levels. The total compensation for this role includes sales commission, with on-target earnings of $180,000-$200,000. Starting salary will vary based on job-related skills, knowledge, and experience. Leveling will be determined during the interview process. You may also be offered a bonus, stock options, and benefits.

How we support our team

• Fully remote within the U.S. – We believe opportunity shouldn’t be limited by geography. Our remote-first approach lets us hire the best people across the United States and empowers them to do their best work from wherever they are.
• A culture of mentorship, equity, and psychological safety – We’re committed to fostering an environment where you can thrive, learn, and feel valued.
• Competitive salary & meaningful equity – Be rewarded for your contributions with a strong compensation package and a stake in our shared success.
• Flexible paid time off – We operate with a high level of autonomy and trust, giving you the flexibility to take time off as needed,no strict limits, just the expectation that you’re meeting your commitments and getting your work done.
• 14 paid holidays – Including Thanksgiving, Winter Break, and “Truffle Holidays” when the entire company takes a well-deserved day off together.
• Comprehensive health benefits – Medical, dental, and vision coverage with 80% of premiums covered for you and your dependents.
• Remote work stipend – Get set up for success with an $800 new hire stipend and $100/month to keep your workspace comfortable.
• Health & wellness stipend – $1,200/year to support your physical, mental, and emotional well-being, we believe that feeling good helps you do great work.
• Learning & development stipend – $2,000/year to invest in your growth, whether it’s courses, certifications, or industry conferences.
• 401(k) match – We match 100% of the first 6% of your contributions on every paycheck, helping you build financial security for the future.
• 100% remote + company off-sites – Twice a year, we come together in amazing locations like Hawaii, Cabo, and the Rocky Mountains to collaborate and connect.

We’re looking for folks who are interested in being part of the journey to make the internet more secure. The internet is for all, and we believe that diverse experiences and people from all walks of life can contribute to this mission.

That said, if what we’re doing resonates with your values, we’d love to have you apply even if you don’t check all of the boxes or match the job description to a tee. Truffle strives to promote an equitable, inclusive, and psychologically-safe workplace for all who are interested in working with us.

All job applicants will be considered throughout the employment process without regard to race, color, ethnicity, religion, sex, sexual orientation, gender perception/identity, age, pregnancy or parental status, disability status, or any other basis prohibited by law.

If you are an individual with disabilities and reasonable accommodation is needed throughout the interview process, or to perform essential job functions, please let your recruiter know.

Lastly, we ask that all applicants consider the opportunity to answer a few voluntary demographic questions on the job application. This helps us track the inclusivity of our recruiting initiatives.

Answering these questions is entirely optional and your answers will not be shared with the hiring team and will not impact the hiring decision.

Note: Our organization participates in the US federal E-Verify program. We will provide the Social Security Administration, and if necessary, the Department of Homeland Security, with information from each new employee’s Form I-9 to confirm work authorization. We do not use this information to pre-screen job applicants.

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Responsibilities: Create satellite network solutions for commercial pursuits all the way through deal closure and beyond. Model and analyze satellite networks using in-house network software. Interface with Commercial, US Government, Finance, Legal, Engineering, Operations, Regulatory, and Executive teams. Communicate satellite network designs and reports externally as solutions/sales engineers. Aid in regulatory efforts regarding spectrum use and coordination. Aid and influence the design of analysis software that enables us to excel in our role. Define product market fit for next-generation satellite communication systems. Dimension ground solutions for commercial pursuits by working with Earth Stations Engineering/Operations, Network Operations, and Hub teams. Building Astranis's profile with the international business community. Maintain healthy relationships with vendors and partners. Shaping our future product offering based on current trends, market insight, and customer feedback. Assisting in recruiting, interviewing, and hiring additional teammates. Willingness to travel (up to ~20%).

Requirements: 5+ years in satellite communications industry experience with High Throughput Satellite (HTS) systems. Bachelor of Science degree in Aerospace Engineering, Electrical Engineering, Computer Science, or Physics. Link budgeting/link analysis experience. Experience with regulatory affairs for space-based communications networks. Experience with satellite network hub management and operations. Proven track record in strategic technical sales environments. Scripting language experience in one of the following: Python, MATLAB, R, Julia, C++, or similar. Must be onsite in San Francisco.

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Key responsibilities include:

• Tracking, auditing, and managing inventory levels within the warehouse to ensure accuracy.
• Conducting regular stock & cycle counts, and reconciliation processes to maintain accurate inventory data.
• Analyzing inventory data to identify trends, track item usage, and forecast demand.
• Using findings to recommend adjustments in stock levels to meet operational requirements while minimizing excess inventory.
• Working closely with production teams to ensure timely and accurate product storage, retrieval, and consumption.
• Collaborating to resolve any inventory discrepancies or issues that arise.
• Updating and maintaining the inventory management system with real-time data on stock levels, item movements, and production consumption.

Requirements:

• High school diploma or equivalent required; associate degree in electronics, supply chain, or related field preferred.
• 2+ years of inventory experience, preferably in an electronics manufacturing or aerospace environment.
• Familiarity with electronic components, datasheets, and part numbering conventions.
• Experience with ERP systems and barcode scanning tools.
• Ability to interpret BOMs, work instructions, and engineering drawings.
• Strong attention to detail and high standards for accuracy.
• ESD certification or knowledge of ESD-safe handling practices required.
• Ability to lift up to 40 lbs and stand for extended periods.

What we offer:

• A compensation package that includes equity and robust benefits.
• Base pay is just one component of Astranis's total rewards package.
• Your compensation also includes a significant equity package via incentive stock options, high-quality company-subsidized healthcare, disability and life insurance, 401(k) retirement planning, flexible PTO, and free on-site catered meals.

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Key responsibilities include:

• Conduct EMI/EMC testing and analysis on electronic systems and components.
• Drive product maturity through rapid prototyping, design verification, and qualification activities.
• Develop and implement design strategies to mitigate EMI/EMC issues.
• Prepare test plans, reports, and documentation for compliance verification.
• Collaborate with product design teams to ensure EMC requirements are integrated during the design phase.
• Identify program EMI/EMC risks and define strategies for reducing risk through the definition of modeling, simulation, or experimental activities.
• Stay updated on relevant standards (e.g., MIL-STD-461G, MIL-STD-464D, DOD-160, FCC, CISPR, IEC) and regulatory requirements.
• Conduct field tests and assessments to evaluate product performance in real-world environments.
• Work in a fast-paced environment, having to juggle multiple concurrent projects and customers.

Required qualifications include:

• Bachelor’s degree in Electrical Engineering, Electronics, or a related field.
• 7+ years of experience in EMI/EMC design and testing.
• Familiarity with EMC/EMI standards and regulations (e.g., MIL-STD-461G, MIL-STD-464D, RTCA DOD-160, FCC, IEC, CISPR, SAE).
• Proven expertise in E3 design, analysis, testing and mitigation strategies. Specialized in HERO, HEMP, Lightning Protection, ESD, RF exposure limits and operational electromagnetic compatibility.
• Proficiency in using EMI/EMC testing equipment (e.g., spectrum analyzers, oscilloscopes, antennas, LISN etc.).
• Experience with simulation tools (e.g., ANSYS, CST Microwave Studio) for EMI analysis.
• Strong analytical and troubleshooting skills for identifying and resolving EMI/EMC issues.
• Excellent verbal and written communication skills for reporting findings and collaborating with teams.
• Ability to manage multiple projects and meet deadlines in a fast-paced environment.
• Full understanding of PCB Layout techniques to meet mechanical, electrical, EMI/EMC, and manufacturing requirements.
• Ability to read and interpret schematics and apply best practices appropriate for each design.
• Familiarity with standard interfaces such as MIPI, DP, I2C, SPI, PCIe, USB, etc.
• Must be able to obtain and maintain a DoD Secret Clearance

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Dialpad is the AI-native business communications platform. We unify calling, messaging, meetings, and contact center on a single platform - powered by AI that understands every conversation in real time.

More than 70,000 companies around the globe, including WeWork, Asana, NASDAQ, AAA Insurance, COMPASS Realty, Uber, Randstad, and Tractor Supply, rely on Dialpad to build stronger customer connections using real-time, AI-driven insights.

We’re now leading the shift to Agentic AI: intelligent agents that don’t just analyse conversations but take action by automating workflows, resolving customer issues, and accelerating revenue in real time.

Our DAART initiative (Dialpad Agentic AI in Real Time) is redefining what a communications platform can do.

Visit dialpad.com to learn more.

Being a Dialer

At Dialpad, AI isn’t just a feature; it’s how our teams do their best work every day. We put powerful AI tools in every employee’s hands so they can move faster, think bigger, and achieve more.

We believe every conversation matters. And we’ve built the platform that turns those conversations into insight and action, for our customers and ourselves.

We look for people who are intensely curious and hold themselves to a high bar. Our ambition is significant, and achieving it requires a team that operates at the highest level.

We seek individuals who embody our core traits: Scrappy, Curious, Optimistic, Persistent, and Empathetic.

Your role

At Dialpad, we are building the future of AI-driven communication. As a Software Development Engineer in Test (SDET), you will lead the charge in building scalable, world-class mobile test automation frameworks that empower our engineering teams to ship with confidence and speed.

We are looking for a quality advocate who bridges development and testing. You bring excellent written and verbal communication skills and the ability to collaborate with a geo-distributed team on a shared vision.

You will enhance and maintain mobile testing frameworks, lead design decisions, and work closely with other senior developers.

This position reports to a Quality Engineering Manager in the USA.

What you’ll do

• Design and optimise high-performance mobile automation frameworks (iOS/Android) that are fast, reliable, and scalable.

• Maintain performant and reliable CI/CD pipelines.

• Independently analyse test results and investigate failures to identify potential root causes and provide detailed reports.

• Build advanced reporting and tools to provide real-time visibility into product health and failure patterns.

• Develop and execute system performance testing against a variety of systems.

• Work closely with mobile engineers, QA partners, and product teams to ensure features are testable and automation-ready.

• Develop and execute a comprehensive test strategy.

• Perform functional, regression, and performance testing using automation tools.

• Lead the AI Frontier and integrate AI-powered tooling into the testing lifecycle to accelerate defect detection and script generation.

• Advocate for doing the right thing even if it’s difficult.

Skills you’ll bring

• 4+ years of experience as an SDET, Software Engineer, or Test Automation Engineer in SaaS environments.

• Strong programming experience in any top language, such as Python or Java.

• Experience with AI code generation, subagents, and modern code generation workflows.

• Deep, hands-on experience building scalable frameworks from scratch.

The ability to articulate complex technical trade-offs to both engineers and non-technical stakeholders across global time zones.

• Highly organised with excellent written and verbal communication skills.

• Experience with cloud-based mobile device testing platforms like LambdaTest, BrowserStack, etc.

• Direct experience applying testing methodologies, including regression, integration, and performance testing

• Extensive knowledge of cloud technologies, including the testing of REST services.

• Strong people skills, as you’ll work with other teams in different geographies.

• The ‘Plus’ Factor includes:

Experience with mobile programming languages Kotlin or Swift.

Application of UX/Accessibility standards and a proactive approach to using Generative AI to optimise development workflows.

For exceptional talent based in British Columbia, Canada the target base salary range for this position is posted below.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the target range for new hire salaries for the position.

Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in British Columbia role postings reflect the base salary only, and do not include bonus, equity, or benefits.

British Columbia, Canada Salary Range $128,150-$151,925 CAD

Why Join Dialpad

• Work at the centre of the AI transformation in business communications

• Build and ship agentic AI products that are redefining how companies operate

• Join a team where AI amplifies every employee’s impact

• Competitive salary, comprehensive benefits, and real opportunities for growth

We believe in investing in our people. Dialpad offers competitive benefits and perks, cutting-edge AI tools, and a robust training program that help you reach your full potential.

We have designed our offices to be inclusive, offering a vibrant environment to cultivate collaboration and connection.

Our exceptional culture, repeatedly recognised as a Great Place to Work, ensures that every employee feels valued and empowered to contribute to our collective success.

Don’t meet every single requirement? If you’re excited about this role and possess the fundamental traits, drive, and strong ambition we seek, but your experience doesn’t meet every qualification, we encourage you to apply.

Dialpad is an equal-opportunity employer. We are dedicated to creating a community of inclusion and an environment free from discrimination or harassment.

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Key responsibilities include:

• Designing combinations of high-speed digital, precision analog, RF, and high-power architectures
• Designing embedded electronics from concept to functional prototype, including hardware selection, schematic & PCB design, board bring-up, and system level integration
• Troubleshooting issues that span the electrical and software boundaries, with solid skills using both lab equipment (Oscilloscopes, DMM, etc.) and basic software debugging tools
• Working with modern SoCs and networking hardware to build Anduril platforms
• Collaborating with firmware/software engineers for processor/peripheral selection, board bring up, and troubleshooting
• Working closely with other electrical, mechanical, software, firmware, and test engineers to deliver fully functional products

Requirements include:

• Bachelor’s Degree in Electrical Engineering
• 8+ years of experience designing, testing, and troubleshooting complex hardware, embedded systems, and products
• Demonstrated experience with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C
• Experience with microprocessor and microcontroller selection, configuration, and interfacing
• Experience with component, schematic capture, high speed board design, and guiding PCB layout
• Competence with test equipment such as oscilloscopes, logic analyzers, debuggers, current-probes, sprectrum/network analyzers, and automation of tests
• Familiarity with product development processes and tools
• Knowledge of embedded software development, including use of timers, interrupts, hardware peripherals such as SPI controllers and ADCs
• Experience with signal integrity and power integrity rules and simulation
• Exceptional organization and communication skills (both written and oral)
• Proficient with Altium Designer or equivalent electronic design tools
• Familiar with common programming languages like Python for test automation

Preferred qualifications include:

• Familiarity with RF design and layout
• Past experience with placement and routing of PCBs
• Experience with JESD204 and PCIe
• Familiarity with military standards (MIL-STD-461/704/1275)
• Experience with high speed ADC/DAC's and software defined radios

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We're building the foundation models that power the next wave of visual intelligence, and pretraining is where that work begins. This role sits at the center of our research effort, shaping training objectives, architectures, data strategies, and systems behind our joint image, video, and audio foundation models.

Responsibilities

• Lead large-scale pretraining experiments for our multimodal (image, video, audio) foundation models (architecture, objective functions, scaling strategies)
• Develop and evaluate novel ideas across architecture, optimizers, and training algorithms
• Contribute across the full stack: low-level GPU and systems optimizations, research code, and high-level model design
• Lead focused research projects independently and drive larger cross-team initiatives

Requirements

• You've led or co-owned pretraining for a foundation model (image, video, LLM, or multimodal) that shipped to production or a major release
• Own architectural calls that move the model: attention patterns, modulation schemes, loss formulations, tokenization strategies
• Deep experience with large-scale distributed training: FSDP/TP/PP, multi-node runs at 500+ GPUs, debugging loss spikes, NaNs, throughput regressions, and silent correctness issues at scale
• Strong intuition for architecture and objective design , you've made calls on attention patterns, modulation schemes, or loss formulations that moved a real model
• Track record of shipping: top-venue publications (NeurIPS, ICML, ICLR, CVPR, ICCV, ECCV) paired with production impact, or unambiguous production wins at a frontier lab
• Deep Python and PyTorch proficiency; comfortable reading and modifying low-level training code
• Familiarity with visual generative models is a must

How We Work Together

We’re a distributed team with real offices that people actually use. Depending on your role, you’ll either join us in Freiburg or SF at least 2 days a week (or one full week every other week), or work remotely with a monthly in-person week to stay connected. We’ll cover reasonable travel costs to make this possible. We think in-person time matters, and we’ve structured things to make it accessible to all. We’ll discuss what this will look like for the role during our interview process.

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You will design robust test fixtures using NX CAD, considering manufacturability via processes like CNC machining, 3D printing, and waterjet cutting, and oversee their fabrication and assembly. You will perform rigorous multi-level testing, ranging from component (electric motor, geartrain) and actuator levels, up to integrated system level testing.

You will analyze complex test data, generate clear and concise test reports, and present findings to cross-functional engineering teams. You will collaborate closely with Design Engineers and cross-functional teams (e.g., manufacturing, quality, software) to validate and refine actuator designs, clearly communicating technical issues and recommendations to diverse audiences.

You will investigate root cause of failures through detailed analysis of performance data and some destructive testing, applying a basic understanding of electrical components for troubleshooting, to drive actuator design improvements. You will create and execute Design Validation Plans (DVPs) and test methods to rigorously validate performance requirements, including preparing for and conducting qualification testing.

This role requires a Bachelor's degree in Mechanical Engineering, Electrical Engineering, Robotics, or a related technical field, or equivalent practical experience. You should have 2+ years of hands-on experience with LabVIEW and other data acquisition (DAQ) systems for test automation and data collection, as well as 2+ years of experience in physical testing and analysis of mechanical, electrical, and electromechanical systems, with at least 1 year specifically focused on electric motors or electromechanical actuators.

You should be proficient with dynamometer testing and associated instrumentation (e.g., torque transducers, oscilloscopes, etc.), working understanding of servo control principles (torque, speed, and position control), and familiarity with motor controllers and embedded control systems. You should also be familiar with various communication protocols (e.g., CAN FD, RS232, RS485), strong experience with environmental testing methodologies (e.g., high/low temperature, thermal cycling, vibration, shock) and familiarity with MIL-STD-810 standards.

You should be proficient in CAD software, specifically NX, for test fixture design, with an understanding of design for manufacturability for various methods (e.g., CNC, 3D printing). You should also have proven ability to perform root cause analysis and apply a basic understanding of electrical components for troubleshooting.

Nice to have: experience with Python, MATLAB, C/C++, or other scripting languages for data analysis and test automation, familiarity with project and documentation management tools like Jira and Confluence, experience in the aerospace, defense, or robotics industry, and a strong sense of urgency and adaptability in a fast-paced, rapidly evolving environment.

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We currently have 700 open roles

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are a passionate product leader with a strong technical foundation in simulation, modeling, or digital twin workflows. You thrive in dynamic environments where innovation, customer-centricity, and cross-functional collaboration are essential. You have a proven track record of translating complex technical concepts into actionable product requirements, partnering closely with engineering, UX, and go-to-market teams to deliver impactful solutions.

You have experience gathering and synthesizing customer and partner insights, validating solutions through prototypes or beta feedback, and mapping use cases to milestones and releases. Your analytical mindset enables you to define and track success metrics, communicate roadmap decisions, and support developer enablement through clear documentation and demos.

You are adept at engaging both technical and business stakeholders, articulating the strategic value of your product area while ensuring high-quality delivery. Your organizational skills allow you to coordinate complex projects, manage dependencies, and mitigate risks, all while keeping customer outcomes at the forefront.

You value inclusion, collaboration, and continuous learning. You are comfortable leading cross-functional initiatives, supporting product positioning and customer onboarding, and sharing learnings to inform future roadmap decisions.

What You’ll Be Doing:

• Gather and synthesize customer, field, and partner inputs to define requirements and validate solutions through prototypes and beta feedback for USD-based workflows, connectors, and simulation-to-Omniverse data pipelines.

• Define and maintain a prioritized set of use cases,including synthetic data generation, virtual sensors, and digital twins,and map these to releases and milestones.

• Work with engineering to scope releases, clarify tradeoffs, and ensure timely delivery of committed features.

• Contribute to roadmap planning by providing customer insights, competitive context, and data on feature adoption and product performance.

• Support developer enablement and communications by producing product documentation inputs, reference workflows, sample configurations, release notes, and demos in partnership with engineering and technical marketing.

• Collaborate with program management to track delivery status, risks, dependencies, and release readiness, communicating roadmap and decisions to cross-functional stakeholders.

• Coordinate with internal platform teams to validate integration requirements, API needs, and end-to-end workflow quality.

• Define and report on success metrics for your features,such as adoption, activation, workflow completion, and customer feedback,and share learnings and customer wins to inform roadmap decisions.

• Partner with Field, Sales, and Customer Success to support product positioning, customer onboarding, and enablement for your product area.

The Impact You Will Have:

• Enable seamless integration between Synopsys simulation products and NVIDIA Omniverse, USD-based, and Physical AI workflows, expanding Synopsys’ reach into emerging engineering ecosystems.

• Drive adoption of synthetic data generation, virtual sensors, and digital twin capabilities, empowering customers to accelerate innovation.

• Enhance developer and partner enablement through clear documentation, reference workflows, and demos, increasing product adoption and satisfaction.

• Support the delivery of reliable, high-quality features by collaborating across engineering, program management, and go-to-market teams.

• Shape product strategy by providing actionable customer insights, competitive analysis, and performance metrics, ensuring Synopsys remains a leader in simulation and AI-driven workflows.

• Facilitate customer onboarding and enablement, improving time-to-value and supporting successful implementations.

• Influence cross-functional alignment and readiness, ensuring smooth launches and effective communication across the organization.

• Drive continuous improvement by sharing learnings, customer wins, and feedback to inform future roadmap decisions.

What You’ll Need:

• Bachelor’s degree in Engineering, Physics, Computer Science, or a related technical field; Master’s degree or Ph.D. preferred.

• 5+ years of experience in product management, program management, simulation software, platform engineering, or related customer-facing technical roles; 8+ years preferred for advanced roles.

• Solid technical understanding of simulation, modeling, or analysis workflows; experience with USD-based workflows, digital twins, or Physical AI ecosystems highly valued.

• Demonstrated ability to work across engineering, UX, and go-to-market teams,and directly with customers/field organizations,to develop, validate, and deliver product capabilities from concept through release.

• Ability to translate complex technical concepts into clear requirements and tradeoffs, and communicate status/decisions to cross-functional stakeholders.

• Strong analytical, planning, and organizational skills, with experience defining and tracking program success metrics.

• Experience driving cross-functional product delivery (requirements through launch) across multiple teams.

• Comfort engaging deeply with technical audiences and communicating strategic value to business stakeholders.

• Experience supporting demos, webinars, or industry events in partnership with engineering and marketing.

Who You Are:

• Collaborative, inclusive, and driven by customer outcomes.

• Detail-oriented and highly organized, able to manage complex projects and dependencies.

• Analytical thinker with a passion for continuous learning and innovation.

• Excellent communicator, comfortable engaging both technical and business stakeholders.

• Adaptable to fast-changing environments and emerging technologies.

• Proactive problem-solver who takes initiative and drives results.

The Team You’ll Be A Part Of:

You’ll join a dynamic, cross-functional team of product managers, engineers, program managers, and go-to-market specialists focused on advancing Synopsys’ simulation and Physical AI platform integration. The team is committed to delivering innovative solutions that empower customers to build, test, and deploy next-generation digital twins, synthetic data workflows, and virtual engineering environments. Collaboration, creativity, and customer-centricity are at the heart of the team’s culture, with a strong emphasis on learning, sharing, and continuous improvement.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits designed to support you throughout your career at Synopsys. Our benefits package includes medical, dental, and vision coverage, flexible paid time off, and a generous 401(k) matching program. We also offer a range of employee discounts and perks, including access to our on-site fitness center and free parking. In addition, we provide opportunities for professional development and growth, including training programs, mentorship, and career advancement opportunities.

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In this role, you will work at the intersection of client advisory, AI product engineering, and delivery execution, helping banks, insurers, and capital markets firms transition from GenAI pilots to production-grade, governed, multi-agent systems. You will apply leading GenAI frameworks and LLM platforms , including Anthropic, OpenAI, LangChain, LangGraph, DSPy, and vector databases,while operating across the full Agentic SDLC.

P&C Insurance knowledge and experience is a significant plus. Additionally, familiarity with core insurance platforms like Guidewire, DuckCreek or Majesco will be extremely helpful to succeed in this role.

We are looking for candidates across all levels of experience and expertise - junior through senior level AI Product Engineers.

Responsibilities

• Partner directly with Financial Services clients to identify, prioritize, and shape Agentic AI use cases across customer operations, underwriting, claims, risk, compliance, finance, and technology.
• Lead client workshops to define agent personas, responsibilities, autonomy boundaries, human-in-the-loop checkpoints, and escalation logic.
• Translate evolving business needs into agentic product backlogs, roadmaps, and MVP definitions.
• Support executive conversations around GenAI platform strategy, operating models, vendor selection, and scale-out approaches.

Agentic Platform & Architecture Design

• Design and implement multi-agent architectures using modern GenAI tooling, including:
• Planner, executor, reviewer/critic, and supervisor agents
• Tool-calling and function-calling agents
• Memory-enabled agents (conversation, semantic, episodic, and structured memory)
• Leverage LangChain and LangGraph for agent orchestration, workflows, and control flow.
• Apply DSPy and declarative prompt optimization techniques for repeatability, performance tuning, and regression control.
• Design agent interaction patterns such as hierarchical agents, collaborating agents, and event-driven agent workflows.
• Define standardized agent contracts, interfaces, and schemas to enable reuse and scale.

Agentic SDLC & Engineering Delivery

• Own delivery across the full Software Development Lifecycle (SDLC), extending it into a formal Agentic SDLC, including:
• Agent design specifications and behavior contracts
• Prompt, policy, and tool versioning
• Simulation environments and offline evaluation
• Automated testing of agent flows and guardrails
• Controlled rollout, telemetry-driven optimization, and continuous learning
• Build production-grade AI services primarily using Python, integrating:
• LLM providers such as Anthropic (Claude), OpenAI, and open-source models
• Retrieval-Augmented Generation (RAG) using vector databases (e.g., Pinecone, FAISS, Milvus, Weaviate)
• Implement CI/CD pipelines for agent code, prompts, and policies.
• Integrate GenAI agents with client systems via APIs, workflow engines, event streams, and data platforms.

Observability, Evaluation & Optimization

• Implement agent observability including tracing, decision logging, tool usage, and failure analysis.
• Apply evaluation frameworks for hallucination detection, consistency checks, and fitness scoring.
• Design feedback loops incorporating human-in-the-loop review and reinforcement.
• Monitor cost, latency, throughput, and behavioral drift across deployed agents.

Governance, Risk & Financial Services Compliance

• Design Agentic AI platforms aligned with Financial Services regulatory expectations, including:
• Auditability and traceability of agent decisions
• Model and prompt explainability
• Data privacy and security controls
• Resilience and fail-safe mechanisms
• Embed guardrails and policies addressing hallucination risk, bias, unauthorized actions, and escalation failures.
• Produce documentation supporting risk, compliance, internal audit, and regulator engagement.

Team Leadership & Firm Contribution

• Provide technical leadership and mentorship to consulting delivery teams.
• Contribute to internal GenAI accelerators, agent frameworks, and reusable assets.
• Support RFPs, proposals, and client solution designs with credible GenAI and agentic architectures.
• Participate in thought leadership on Agentic SDLC, GenAI engineering, and responsible autonomy.

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Job Description

We are seeking a highly skilled Layout Design Senior Engineer to join our team. As a Layout Design Senior Engineer, you will be responsible for developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below).

Responsibilities

• Developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below)
• Desining layout floorplans, routing, and conducting physical verifications to ensure compliance with industry standards and internal quality requirements.
• Performing DRC, LVS, ERC, Antenna checks, and ensuring timely completion of verification cycles.
• Applying layout matching techniques and addressing ESD, latch-up, EMIR, DFM, and LEF generation issues.
• Collaborating closely with cross-disciplinary teams to optimize layout for performance, power, and area
• Troubleshooting and debugging layout challenges, continually improving methodologies and design outcomes.
• Documenting design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement.

Impact

• Accelerating the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products.
• Ensuring robust and reliable IP performance through meticulous layout design and physical verification.
• Driving innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more.
• Contributing to the world’s broadest portfolio of silicon IP, enhancing Synopsys’ position as a technology leader.
• Reducing risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements.
• Fostering a culture of collaboration, accountability, and technical excellence within the team and across the organization.
• Helping shape the next wave of semiconductor advancements, powering smart devices and connected systems globally.

Requirements

• BTech/MTech degree in Electronics, Electrical, or related engineering discipline.
• 2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below).
• Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies.
• Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies.
• Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation.
• Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms.
• Ability to work independently and collaboratively, managing multiple tasks and priorities.

Team

You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR & HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world’s most advanced chips and devices.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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We are seeking an experienced and innovative AI Product Engineer – Agentic Platforms to join our Financial Services Artificial Intelligence & Business Lines (FS-ABL) practice. This role is ideal for a consulting technologist with deep expertise in modern GenAI tooling, agentic system design, and enterprise SDLC, who can partner directly with clients to envision, design, develop, and deploy Agentic AI platforms in regulated environments.

In this role, you will work at the intersection of client advisory, AI product engineering, and delivery execution, helping banks, insurers, and capital markets firms transition from GenAI pilots to production-grade, governed, multi-agent systems. You will apply leading GenAI frameworks and LLM platforms , including Anthropic, OpenAI, LangChain, LangGraph, DSPy, and vector databases,while operating across the full Agentic SDLC.

P&C Insurance knowledge and experience is a significant plus. Additionally, familiarity with core insurance platforms like Guidewire, DuckCreek or Majesco will be extremely helpful to succeed in this role.

We are looking for candidates across all levels of experience and expertise - junior through senior level AI Product Engineers.

Responsibilities

Client Advisory & Product Vision

Partner directly with Financial Services clients to identify, prioritize, and shape Agentic AI use cases across customer operations, underwriting, claims, risk, compliance, finance, and technology.

Lead client workshops to define agent personas, responsibilities, autonomy boundaries, human-in-the-loop checkpoints, and escalation logic.

Translate evolving business needs into agentic product backlogs, roadmaps, and MVP definitions.

Support executive conversations around GenAI platform strategy, operating models, vendor selection, and scale-out approaches.

Agentic Platform & Architecture Design

Design and implement multi-agent architectures using modern GenAI tooling, including:

Planner, executor, reviewer/critic, and supervisor agents

Tool-calling and function-calling agents

Memory-enabled agents (conversation, semantic, episodic, and structured memory)

Leverage LangChain and LangGraph for agent orchestration, workflows, and control flow.

Apply DSPy and declarative prompt optimization techniques for repeatability, performance tuning, and regression control.

Design agent interaction patterns such as hierarchical agents, collaborating agents, and event-driven agent workflows.

Define standardized agent contracts, interfaces, and schemas to enable reuse and scale.

Agentic SDLC & Engineering Delivery

Own delivery across the full Software Development Lifecycle (SDLC), extending it into a formal Agentic SDLC, including:

Agent design specifications and behavior contracts

Prompt, policy, and tool versioning

Simulation environments and offline evaluation

Automated testing of agent flows and guardrails

Controlled rollout, telemetry-driven optimization, and continuous learning

Build production-grade AI services primarily using Python, integrating:

LLM providers such as Anthropic (Claude), OpenAI, and open-source models

Retrieval-Augmented Generation (RAG) using vector databases (e.g., Pinecone, FAISS, Milvus, Weaviate)

Implement CI/CD pipelines for agent code, prompts, and policies.

Integrate GenAI agents with client systems via APIs, workflow engines, event streams, and data platforms.

Observability, Evaluation & Optimization

Implement agent observability including tracing, decision logging, tool usage, and failure analysis.

Apply evaluation frameworks for hallucination detection, consistency checks, and fitness scoring.

Design feedback loops incorporating human-in-the-loop review and reinforcement.

Monitor cost, latency, throughput, and behavioral drift across deployed agents.

Governance, Risk & Financial Services Compliance

Design Agentic AI platforms aligned with Financial Services regulatory expectations, including:

Auditability and traceability of agent decisions

Model and prompt explainability

Data privacy and security controls

Resilience and fail-safe mechanisms

Embed guardrails and policies addressing hallucination risk, bias, unauthorized actions, and escalation failures.

Produce documentation supporting risk, compliance, internal audit, and regulator engagement.

Team Leadership & Firm Contribution

Provide technical leadership and mentorship to consulting delivery teams.

Contribute to internal GenAI accelerators, agent frameworks, and reusable assets.

Support RFPs, proposals, and client solution designs with credible GenAI and agentic architectures.

Participate in thought leadership on Agentic SDLC, GenAI engineering, and responsible autonomy.

Benefits

This position comes with competitive compensation and benefits package:

1. Competitive salary and performance-based bonuses

1. Comprehensive benefits package

1. Career development and training opportunities

1. Flexible work arrangements (remote and/or office-based)

1. Dynamic and inclusive work culture within a globally known group

1. Private Health Insurance

1. Retirement Benefits

1. Paid Time Off

1. Training & Development

1. Note: Benefits differ based on employee level

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You are a passionate and detail-oriented engineer with deep expertise in IC layout design, eager to contribute to the development of next-generation DDR & HBM PHY IPs. Your experience in advanced process technologies equips you with a strong foundation in deep submicron effects, layout floorplanning, and physical verification. You thrive in dynamic environments, bringing a collaborative spirit and a growth mindset to every project. You value diversity and inclusion, recognizing the importance of varied perspectives in driving innovation. With a commitment to accountability, you consistently deliver quality results, demonstrating ownership and initiative in your work. Your communication skills,both verbal and written,enable you to effectively share ideas, provide feedback, and partner with cross-functional teams. You are motivated by the opportunity to work on cutting-edge technologies, always seeking to expand your knowledge and make a meaningful impact. Whether solving complex problems or optimizing layouts for performance, power, and area, you approach challenges with creativity and perseverance. You are ready to join Synopsys in shaping the future of silicon IP, contributing to products that empower customers to succeed in the Era of Smart Everything.

Developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below) Desining layout floorplans, routing, and conducting physical verifications to ensure compliance with industry standards and internal quality requirements. Performing DRC, LVS, ERC, Antenna checks, and ensuring timely completion of verification cycles. Applying layout matching techniques and addressing ESD, latch-up, EMIR, DFM, and LEF generation issues. Collaborating closely with cross-disciplinary teams to optimize layout for performance, power, and area Troubleshooting and debugging layout challenges, continually improving methodologies and design outcomes. Documenting design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement.

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Aladdin Portfolio Management Engineering is a global team of passionate product engineers who are on a mission to build out a next generation platform of persona based, workflow driven experience with a horizontally scalable & modular architecture.

Responsibilities:

• Hands-On Technical Delivery - actively lead or contributed to enterprise-level projects, spanning Technical Design and Deployment Readiness Reviews, Core Reviews, and comprehensive engagement across the full PDLC.

• Accelerate productivity with an AI-enabled PDLC with a strong focus on quality & resiliency.

• Provide operational excellence to our clients with production support with an “SRE” mindset.

• Influence and mentor other engineers in the team, raising the bar on technical excellence.

• Collaborate in a global, multi-office environment, aligning teams across geographies around shared architectural vision.

• Champion a strong engineering culture grounded in continuous learning and optimizing to best practices such as DORA.

• Build domain and technical context quickly and translate that into specifications, plans and actionable Agile backlogs.

Qualifications:

• B.S. / M.S. degree in a STEM field such as Computer Science or Engineering

• 6+ years of proven experience

Skills and Experience:

• Proven experience operating as a Senior Engineer or Team Lead, defining and delivering technical projects across initiatives with Agile Practices such as Lean or Scaled Agile.

• Demonstrated ability to act as a work definer at scale: shaping ambiguous problem spaces into well-structured initiatives, clear architectural runways, and executable delivery plans.

• Strong background designing enterprise scale, distributed systems, balancing functional requirements with non-functional concerns such as resiliency, scalability, latency, and operability.

• Hands on experience with AI enabled SDLC / PDLC practices, including using AI to accelerate design exploration, prototyping, and architectural decision making, applying AI assisted development, testing, code review, and documentation practices, embedding AI capabilities into product workflows and platform services responsibly and securely, and frameworks such as Windsurf & Cursor and GitHub Copilot.

• Ability to partner effectively with Product Management, Engineering, and Business leaders to translate strategic objectives into coherent architectural strategies.

• Excellent communication and influencing skills, able to articulate complex architectural and technical concepts to senior stakeholders and align diverse teams behind a shared technical vision.

• Track record at articulating architectural tradeoffs and design options, including impacts on scalability, resilience, cost, and delivery velocity.

• A proven foundation in modern languages such Core Java and UI technologies such as React & Angular.

• Experience of API design principles & Event Driven Architecture.

• Rigorous approach to quality through demonstrable TDD & BDD experience.

Nice to have and opportunities to learn:

• Expertise in Domain Driven Design (DDD), including domain modelling and aligning architecture to complex business domains.

• Front office Portfolio Management or Wealth Management domain experience, with a strong understanding of investment workflows, decision making processes, and the role of technology in supporting portfolio managers and advisors.

• Domain knowledge of asset classes & analytics (e.g., equities, fixed income, multi asset, alternatives) and how their characteristics influence risk, performance, liquidity, and system design.

• Experience with portfolio construction concepts, including asset allocation, constraints, benchmarks, rebalancing, and optimization, and how these map to scalable platform and architecture decisions.

• Exposure to event driven architectures at scale, including microservices, messaging, and streaming platforms aligned to business domains.

• Experience shaping or contributing to platform strategies that enable multiple product teams to move faster with consistency and autonomy.

• Familiarity with cloud native and hybrid architectures, including patterns for scalability, resilience, and cost aware design in large enterprises – including frameworks like Kubernetes.

• Exposure to modern DevOps and platform engineering practices that support high throughput, high quality delivery at enterprise scale, and demonstrable improvements across DORA metrics.

• Familiarity with micro frontend architectures, including their use in large scale, multi team environments to enable independent domain ownership, parallel delivery, and consistent user experiences across complex platforms.

Our benefits

To help you stay energized, engaged and inspired, we offer a wide range of employee benefits including: retirement investment and tools designed to help you in building a sound financial future; access to education reimbursement; comprehensive resources to support your physical health and emotional well-being; family support programs; and Flexible Time Off (FTO) so you can relax, recharge and be there for the people you care about.

Our hybrid work model

BlackRock’s hybrid work model is designed to enable a culture of collaboration and apprenticeship that enriches the experience of our employees, while supporting flexibility for all. Employees are currently required to work at least 4 days in the office per week, with the flexibility to work from home 1 day a week. Some business groups may require more time in the office due to their roles and responsibilities. We remain focused on increasing the impactful moments that arise when we work together in person – aligned with our commitment to performance and innovation. As a new joiner, you can count on this hybrid model to accelerate your learning and onboarding experience here at BlackRock.

About BlackRock

At BlackRock, we are all connected by one mission: to help more and more people experience financial well-being. Our clients, and the people they serve, are saving for retirement, paying for their children’s educations, buying homes and starting businesses. Their investments also help to strengthen the global economy: support businesses small and large; finance infrastructure projects that connect and power cities; and facilitate innovations that drive progress.

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You are a passionate analog design engineer eager to make a tangible impact in pioneering semiconductor technologies. You thrive in fast-paced environments and enjoy collaborating with diverse, talented teams. Your expertise in CMOS circuit design and deep submicron process technologies makes you a valuable contributor to high-performance chip solutions. You are detail-oriented, analytical, and consistently deliver quality results. Your curiosity drives you to explore industry standards such as JEDEC DDR interfaces, and you are comfortable navigating the complexities of ASIC design flows. You communicate clearly and effectively, bridging technical discussions between cross-functional teams. You embrace continuous learning and are always ready to tackle new challenges, leveraging your experience in analog/mixed signal circuitry and ESD concepts. You are motivated by the opportunity to influence the next generation of silicon products and are committed to excellence in every aspect of your work. Your collaborative spirit, adaptability, and drive for innovation make you a perfect fit for Synopsys' world-class engineering community.

Designing DDR I/O circuits for advanced semiconductor products, ensuring alignment with JEDEC interface standards. Implementing CMOS circuit design and layout methodologies to optimize performance and reliability. Collaborating with internal development teams to integrate analog/mixed signal circuitry into ASIC designs. Analyzing and resolving issues related to deep submicron process technologies. Executing assigned circuit design tasks with a focus on product quality and efficiency. Documenting design solutions and communicating technical details clearly to cross-functional stakeholders. Participating in design reviews and contributing to continuous improvement of design flows and practices.

Advance Synopsys' leadership in high-performance DDR interface design for cutting-edge chips. Enhance product reliability and scalability through robust analog design methodologies. Drive innovation in deep submicron process technology applications. Strengthen integration of mixed signal and analog circuitry in ASIC products. Support cross-team collaboration to accelerate product development and delivery. Contribute to Synopsys' reputation for technical excellence and quality in semiconductor solutions.

BTech/MTech in Electrical Engineering or related field (MTech+3 years / BTech+5 years experience). Strong knowledge of CMOS processes and deep submicron process technology issues. Expertise in CMOS circuit design and layout methodology; familiarity with analog/mixed signal circuitry. Understanding of basic ESD concepts (a plus). Experience with ASIC design flow and integration. Knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality (preferred).

Analytical thinker with strong problem-solving skills. Effective communicator, both written and verbal, for internal team interactions. Collaborative team player, eager to learn and share knowledge. Detail-oriented and quality-focused in all aspects of design. Adaptable and resilient in dynamic project environments.

You will join a highly skilled Analog/Mixed Signal Design team in Bangalore, focused on delivering innovative DDR I/O circuit solutions for ASIC products. The team values creativity, technical rigor, and collaborative problem-solving, working closely with cross-functional groups to drive product excellence and meet industry standards.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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This executive leadership role is responsible for the design, implementation, and governance of a secure, resilient, and high-performing infrastructure that includes enterprise networking, global security services, identity and access management, telephony and unified communications, and contact center platforms.

Spanning on-premise data centers, multi-cloud environments, and global corporate offices, you will establish comprehensive security frameworks, policies, and standards required to protect our corporate assets and data.

The ideal candidate is a transformational leader who can protect the enterprise from evolving cyber threats while delivering a robust technology foundation that enables business innovation and agility.

Key Responsibilities

Strategic & Architectural Leadership:

• Develop and own the enterprise architecture vision, strategy, and multi-year roadmap for the network and security portfolio, ensuring tight alignment with business goals and digital transformation initiatives.

• Lead the creation, governance, and promotion of architectural standards, patterns, and best practices for all covered services, including Zero Trust (ZTNA) and Secure Access Service Edge (SASE) frameworks.

• Drive modernization initiatives across the portfolio, guiding the transition from traditional architectures to modern, automated, and cloud-native solutions to enhance security and eliminate legacy technical debt.

• Champion a culture of innovation by evaluating emerging technologies and providing architectural direction for their adoption to solve complex business problems.

• Serve as the primary architectural authority for the enterprise across network, telephony, and security domains, providing expert guidance to executive leadership, business stakeholders, and technology teams.

Domain-Specific Architectural Oversight: Lead and mentor a team of architects, ensuring architectural integrity and strategic alignment across the following key domains:

• Global Network Architecture: Oversee the architecture for all network infrastructure, including SD-WAN, LAN/WAN, Wi-Fi, DNS/DHCP/IPAM, and data center networking.

• Global Security Architecture: Define the strategy for enterprise-wide security services, including next-generation firewalls (NGFW), IDS/IPS, WAF, CASB, and data loss prevention (DLP).

• Identity & Access Management (IAM): Lead the architectural vision for all IAM services, including authentication, authorization, single sign-on (SSO), multi-factor authentication (MFA), and privileged access management (PAM).

• Platform Security: Drive the security architecture for underlying infrastructure platforms, including operating systems, virtualization, and container platforms (Kubernetes).

• Telephony & Contact Center: Direct the architectural strategy for unified communications (UCaaS/VoIP) and contact center (CCaaS) platforms, ensuring they are secure, resilient, and integrated with enterprise systems.

Executive Leadership & Stakeholder Engagement:

• Lead, mentor, and cultivate a high-performing team of principal and senior architects, fostering a collaborative environment of technical excellence and strong business acumen.

• Build and maintain strong, trust-based relationships with C-level executives, business unit leaders, and engineering teams to ensure architectural solutions meet enterprise-wide objectives.

• Act as a key influencer and communicator, articulating complex architectural concepts and their business value to diverse audiences, from technical experts to non-technical executives.

• Partner closely with the CISO organization and IT operations to ensure that architectural designs are effectively implemented, monitored, and compliant with regulatory requirements.

Requirements

• Education: Bachelor’s degree in Computer Science, Cybersecurity, Information Technology, or a related field required. Master’s degree preferred.

• Experience: Minimum of 15 years of experience in information technology, with at least 10 years in an architecture role spanning network, security, or infrastructure. Minimum of 5 years in a formal leadership capacity, with proven experience managing, mentoring, and developing senior architects and technical staff.

• Technical Skills: Security Architecture: Deep expertise in security frameworks and technologies, including Zero Trust, SASE, NGFW, IDS/IPS, SIEM, WAF, CASB, DLP, and endpoint security. Identity & Access Management: Expert knowledge of IAM principles and protocols (SAML, OAuth, OIDC), and experience with IGA, MFA, and PAM solutions. Network Architecture: Expert knowledge of modern networking principles and technologies, including SD-WAN, BGP, MPLS, VPN, DNS, DHCP, and data center networking. Cloud Security: Expert knowledge of cloud networking and security architecture in AWS, Azure, and/or GCP (e.g., VPCs/VNETs, Security Groups, IAM, Cloud WAFs).

• Soft Skills & Leadership Qualities: Executive Presence: Confident and articulate communicator with the ability to present to and influence senior executives and board-level stakeholders. Strategic Vision: Ability to think long-term and create a compelling, business-aligned vision for the future state of the technology landscape. Collaborative Leadership: Proven ability to lead through influence, build consensus across diverse teams, and foster strong cross-functional partnerships. Business Acumen: Strong ability to understand business drivers and translate them into technical requirements and architectural solutions that deliver tangible value.

Preferred Qualifications

• Professional certifications such as CISSP, CISM, CCIE, TOGAF (at least one required). Expert-level cloud architecture or security certifications (e.g., AWS Certified Security - Specialty, Azure Security Engineer Expert) highly preferred. Experience managing departmental budgets and participating in financial planning. Experience leading a group of at least 5 enterprise architects.

Benefits

This position comes with competitive compensation and benefits package:

1. Competitive salary and performance-based bonuses

1. Comprehensive benefits package

1. Career development and training opportunities

1. Flexible work arrangements (remote and/or office-based)

1. Dynamic and inclusive work culture within a globally renowned group

1. Private Health Insurance

1. Pension Plan

1. Paid Time Off

1. Training & Development

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You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in a fast-paced, dynamic environment and are excited by the opportunity to work on next-generation connectivity protocols that power commercial, enterprise, and automotive applications.

Responsibilities

• Specify, architect, and implement advanced verification environments for DesignWare IP cores using System Verilog and state-of-the-art methodologies.
• Develop and execute comprehensive test plans, ensuring coverage of unit-level and system-level requirements.
• Design, code, and debug testbenches, test cases, and functional coverage models to validate complex IP functionalities.
• Perform functional coverage analysis and manage regression testing to achieve and maintain required quality metrics.
• Collaborate closely with RTL designers and global verification teams to resolve issues and drive verification closure.
• Leverage scripting (Perl, TCL, Python) to automate verification flows, streamline processes, and enhance productivity.
• Contribute to the development and refinement of verification methodologies, including VIP development and formal verification approaches.

Impact

• Ensure the delivery of high-quality, robust IP cores that power critical applications in commercial, enterprise, and automotive markets.
• Drive innovation in verification methodologies, setting new standards for efficiency and coverage.
• Enhance time-to-market by identifying and resolving design and verification issues early in the development cycle.
• Strengthen Synopsys' reputation as a leader in silicon IP and verification through technical excellence and customer focus.
• Mentor and support junior engineers, fostering a culture of learning and continuous improvement.
• Contribute to the success of global, multi-site R&D teams by providing expertise and driving cross-functional collaboration.

Requirements

• BSEE with 5+ years or MSEE with 3+ years of relevant experience in ASIC or IP verification.
• Expertise in developing HVL (System Verilog)-based verification environments and testbenches.
• Strong hands-on experience with industry-standard simulators (VCS, NC, MTI) and debugging tools.
• Proficiency in verification methodologies such as UVM, OVM, or VMM; exposure to formal verification is highly desirable.
• Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB.
• Familiarity with scripting languages (Perl, TCL, Python) and HDLs (Verilog); experience with VIP development is a plus.
• Demonstrated ability to work with functional coverage-driven methodologies and quality metric goals.

Who You Are

• Analytical thinker with strong problem-solving and debugging skills.
• Excellent verbal and written communication abilities.
• Team player who thrives in collaborative, multi-site environments.
• Proactive, self-motivated, and able to take initiative on challenging projects.
• Detail-oriented, quality-focused, and driven by a desire to excel.
• Adaptable and eager to continuously learn and apply new technologies.

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As a FBS SQL Developer, you will design and develop computer programs and monitor the work of junior staff to ensure accuracy of program logic and efficient use of computer resources. You will perform preliminary evaluation of packaged software, conduct system studies, analyze and evaluate existing manual and computerized systems/procedures to improve efficiency, and develop techniques for automating processes as appropriate.

Key responsibilities include coding instructions for computer programs/objects/components, configuring packaged software, testing and implementing all changes to ensure they meet specifications. You will also document and implement programs according to installation standards and conventions, quality check program code, related objects, and documentation, respond to Production Support issues, and work with business as required.

Additionally, you will conduct preliminary estimates/Rough Order of Magnitude for the level of effort of new/change to application functionality, analyze and make recommendations for the need for system backup, security, restart/recovery, balancing & controls, and recommend approaches for meeting such needs. You will also analyze and document the requirements and approaches to data conversion and data modeling, conduct system studies, analyze existing computerized and manual processes to improve efficiency, research and develop techniques for automation, as approved, and monitor the work of junior staff to ensure efficiency and compliance with specification.

You will design and develop documentation of proposed procedures and systems, perform preliminary evaluation of packaged software, manage and control system development projects, support implementation/training activities, and troubleshoot system environmental issues as required.

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We've partnered with Capgemini, which acts as the Employer of Record. Capgemini is responsible for managing local payroll and benefits.

A solid and innovative company with a strong market presence.

A dynamic, diverse, and multicultural work environment.

Leaders with deep market knowledge and strategic vision.

Continuous learning and development.

Designs and develops computer programs and monitors the work of junior staff to ensure accuracy of program logic and efficient use of computer resources; performs preliminary evaluation of packaged software; conducts system studies, analyzes and evaluates existing manual and computerized systems / procedures to improve efficiency, develops techniques for automating processes as appropriate; conducts Rough Order of Magnitude on application enhancements; determines the need for system security, backup/recovery, data conversion, etc. and makes recommendations; manages system development projects and supports the implementation activities and training, as required; works with business and responds to Production Support issues as necessary.

Codes instructions for computer programs/objects/components; configures packaged software; tests and implements all changes to ensure they meet specifications.

Documents and implements programs according to installation standards and conventions. Quality checks program code, related objects and documentation. Responds to Production Support issues. Works with business as required. Analyzes programs to ensure that they efficiently use computer and storage resources; recommends appropriate changes as necessary.

Conducts preliminary estimates / Rough Order of Magnitude for the level of effort of new/change to application functionality. Analyzes and makes recommendations for the need for system backup, security, restart/recovery, balancing & controls; recommends approaches for meeting such needs. Analyzes and documents the requirements and approaches to data conversion and data modeling.

Conducts system studies, analyzes existing computerized and manual processes to improve efficiency; researches and develops techniques for automation, as approved. Monitors the work of junior staff to ensure efficiency, and compliance with specification.

Designs and develops documentation of proposed procedures and systems. Performs preliminary evaluation of packaged software. Manages and controls system development projects. Supports implementation/training activities; troubleshoots system environmental issues, as required.

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Define and own the end-to-end solution architecture for SAP S/4HANA and related supply chain solutions (IBP, EWM, TM, Ariba), including integrations, data migration, and non-functional requirements.

Ensure technical solutions meet current business needs and future scalability for Hi-Tech manufacturing and distribution models.

Develop and implement an enterprise roadmap for SAP Supply Chain, including digital capabilities for Industry 4.0, IoT, and advanced analytics.

Provide leadership and guidance on SAP S/4HANA Supply Chain modules (MM, PP, SD, WM/EWM), SAP IBP, and integration with MES, PLM, and external platforms.

Drive solution governance, ensuring adherence to enterprise architecture principles and standards.

Participate in key governance forums: Architecture Review Boards, Program Boards, Change Control Boards, and Integration Management meetings.

Support business development and pre-sales activities, including proposals, RFP/RFI responses, and client workshops.

Proactively manage risks, dependencies, and solution architecture issues, ensuring timely resolution.

Collaborate with third-party vendors, internal teams, and client stakeholders to deliver high-quality solutions.

Financial Oversight & P&L Responsibility:

Develop and manage budgets for SAP High-Tech projects, ensuring cost-efficiency and alignment with company goals.

Monitor P&L performance for the SAP High-Tech business, identifying areas for cost optimization and revenue growth.

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Responsibilities:

• Build and deploy custom integrations tailored to client needs, from requirements gathering through to production
• Execute data migrations, ensuring the secure and accurate transfer of legacy data into Workable
• Develop SQL-based custom reports and data visualisations for clients
• Configure complex, customised feature sets within customer accounts
• Build and maintain internal tooling, including requirement gathering and technical design documentation

Client & Project Collaboration:

• Work hand-in-hand with Implementation Managers to ensure smooth client onboarding from sale to go-live
• Define technical milestones within the broader project plan and give accurate delivery timelines
• Identify potential technical blockers early and propose practical workarounds
• Join client calls to translate technical processes into clear business outcomes
• Document all custom configurations so IMs can support clients post-implementation

Cross-Team Support:

• Act as a technical subject matter expert for Sales and Implementation teams
• Provide API consultation and answer technical questions for non-technical colleagues
• Work with Tech Leads to test and deploy custom solutions to internal standards

Requirements:

• 1–3 years of software engineering experience, preferably in Python
• Solid SQL skills and experience working with databases
• A BSc in Computer Science or equivalent
• Strong written and verbal communication skills
• The ability to explain technical concepts to non-technical audiences clearly and confidently

Nice to have:

• Experience with AWS (Redshift, S3, EC2, Lambda)
• Familiarity with the full SDLC
• Experience with Kubernetes
• Ruby or Ruby on Rails

Benefits:

• Comprehensive Health Coverage
• Competitive Compensation
• Flexible Work Model
• Top-Tier Tools
• Stay Connected
• Delicious Perks

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Developer Ecosystem – Staff Technical Program Manager

United States Off-siteSave

Category

Product Management

Remote Eligible

Yes

Hire Type

Employee

Job ID

16741

Base Salary Range

$102000-$154000

Date posted

04/21/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect, from advanced engineering simulation to semiconductor design and beyond. With the integration of legacy-Ansys simulation solutions, we empower our customers to tackle real-world engineering challenges across industries such as automotive, aerospace, energy, electronics, and more. Our technology portfolio now includes the industry-leading simulation tools engineers rely on to design, test, and optimize products for performance, reliability, and safety.

You Are:

You are a forward-thinking technical leader who thrives at the intersection of product management, developer experience, and platform strategy. With a passion for technology and a strong technical acumen, you are energized by empowering engineers and methods developers to build tomorrow’s innovations and excited about the role that AI can play in the developer experience. Your experience spans software development, product management, and open-source ecosystems, enabling you to tackle complex challenges and drive consensus among cross-functional teams. You understand how critical seamless integration, extensibility, and ease of use are for developer tools, and you’re committed to elevating these standards across platforms and products.

What You’ll Be Doing:

• Owning the product strategy and roadmap for Ansys developer tools, including PyAnsys libraries, APIs, MCP connectors, SDKs, and platform integrations.

• Defining and maintaining a cohesive vision for developer tooling across multiple product lines, ensuring alignment with Ansys and Synopsys strategies.

• Establishing and evangelizing standards for developer experience, API design, documentation, and lifecycle management to ensure consistency and ease of use.

• Partnering with engineering, architecture, and platform teams to deliver high-quality, maintainable, and well-documented developer tools.

• Driving adoption, satisfaction, and improvement initiatives for developer tools by tracking metrics, identifying addressing friction points, and engaging with customers and partners.

• Guiding integrations with external platforms (such as NVIDIA Omniverse), ensuring technical soundness, scalability, and alignment with ecosystem goals.

• Collaborating with cross-functional teams (product managers, DevOps, documentation, developer advocacy, field teams) to deliver end-to-end solutions and support real-world use cases.

• Leading the creation of technical enablement assets including white papers, application notes, developer documentation, webinars, demos, and workshops.

The Impact You Will Have:

• Enable customers and partners to reliably extend and deploy Ansys capabilities within their own workflows and platforms, accelerating innovation across industries.

• Drive measurable improvements in developer tool adoption, satisfaction, and usability, positioning Ansys and Synopsys as developer-friendly platforms.

• Establish clear standards and best practices for developer tooling, fostering consistency, reliability, and extensibility across product lines.

• Empower engineering teams to deliver high-quality, maintainable tools that reduce friction and unlock new integration possibilities.

• Expand the reach of physics simulation beyond core engineering audiences, enabling professionals in fields like healthcare and manufacturing to leverage simulation insights.

• Build a vibrant developer ecosystem that supports traditional developers and agent-based workflows, enhancing platform readiness for emerging technologies.

• Align internal teams around shared goals, clear ownership boundaries, and a cohesive vision for developer experience, driving organizational efficiency and collaboration.

What You’ll Need:

• Bachelor’s degree in Computer Science, Engineering, or a related technical field (or equivalent experience); advanced degree preferred.

• 5+ years of combined experience in engineering, CAE simulations, or software product management (or equivalent combination of education and experience).

• Strong understanding of APIs, SDKs, developer tooling, REST/gRPC interfaces, Python ecosystems, and open-source workflows.

• Demonstrated programming abilities in one or more languages: Python, Java, .NET, C++, Python preferred.

• Experience working with software engineers and architects on technically complex products or projects.

• Ability to occasionally work irregular hours to support international events and audiences.

• Experience with script-based customization of engineering processes and simulation workflows.

• Familiarity with NVIDIA Omniverse or other emerging developer platforms is a plus.

• Excellent communication skills, with the ability to articulate business value of technical innovations to diverse stakeholders.

Who You Are:

• Collaborative and inclusive, valuing diverse perspectives and fostering teamwork across functions and geographies.

• Strategic thinker with a keen eye for detail, able to balance big-picture vision with practical execution.

• Customer-centric, passionate about understanding user needs and delivering impactful solutions.

• Adaptable and resilient, thriving in fast-paced environments with evolving priorities.

• Proactive problem-solver, eager to identify and address gaps, friction points, and opportunities for improvement.

• Clear and persuasive communicator, capable of engaging technical and business audiences alike.

• Curious and committed to continuous learning, staying ahead of trends and best practices in developer tools and simulation software.

The Team You’ll Be A Part Of:

You’ll join a dynamic, cross-disciplinary team focused on advancing the developer ecosystem for Ansys and Synopsys products. The team collaborates closely with engineering, architecture, platform, and field teams to deliver and drive adoption of developer tools that empower innovation across industries. You will play a pivotal role in aligning strategy, standards, and deliverables across business units, as well as driving a shared vision for developer experience and platform extensibility. Together, you’ll help shape the future of simulation and developer enablement

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You are a dynamic engineer with working experience in RTL implementation, DFT/BIST, verification, flow automation, and understanding of hierarchical SoC architectures and IEEE1149/1500 and 1687 standards and pattern porting. You should have a passion for working with the best of the brains in the industry in developing end-to-end solutions and deploying them in our premier customer base.

What You’ll Be Doing:

• Working closely with a world-class R&D team, you’ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM) built over a robust DFT framework.
• Working closely with customers, you will bring detailed requirements into the factory to enable R&D for strong, robust, and successful product development.
• Working closely with product development team, you will validate an end-to-end solution both internally (before shipment) as well as in customer environment.
• Driving the deployment and smooth execution of SLM and Test solutions into customers’ projects.
• Enabling customers to realise the value of silicon health monitoring using a robusta DFT framework throughout the lifecycle of silicon bring-up, validation, through in-field operations.

The Impact You Will Have:

• Enhancing Synopsys’ Silicon Lifecycle Management (SLM) and DFT IP portfolio and end-to-end solution.
• Driving the adoption of Synopsys’ SLM and DFT solutions at premier customer base worldwide.
• Influencing the development of next-generation SLM IPs and solutions.

What You’ll Need:

• BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field.
• 8 years of hands-on experience with DFT/BIST insertion, RTL design, and functional verification.
• Good exposure to JTAGIEEE 1149.1, IEEE 1687/1500, Testdata access mechanism.
• Knowledge on memory defectivities soft errors and reliability.
• Familiarity with error correcting codes such as Hamming and Hsiao.
• Hands-on experience in dealing with hierarchical SoCs, 1149.1/1500/1687 standards and pattern porting.

• Familiarity with either Synopsys TestMAX Tool chain or competitive offerings.
• Debugging abilities to identify and resolve issues in functional verification in UVM environment.
• Hands on experience in flow automation.
• Knowledge of Synthesis is a must with understanding of timing constraints (SDC).
• Knowledge of Lint, CDC, RDC is a plus.
• Knowledge of physical implementation is not a must, but good to have.
• Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions.
• Customer facing experience is a plus – educating/guiding customer on technical details of a solution.
• Good to have:
• Hands-on bring-up and debug experience of silicon is a plus.
• Architecture/micro-architecture experience.
• Understanding of GenAI and Agentic AI workflows.

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Key Responsibilities:

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

Preferred Qualifications:

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

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Job Description

As an Analog Mixed-Signal Engineer at Synopsys, you will be responsible for designing and developing high-performance memory interface solutions that power next-generation technologies. You will work closely with cross-functional teams to meet complex design specifications and project goals.

Responsibilities

• Design and develop DDR/HBM Memory Interface I/O circuits, including GPIO and special I/Os, ensuring robust performance and reliability.
• Collaborate closely with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project milestones.
• Execute circuit design tasks with a focus on quality, efficiency, and adherence to industry standards.
• Apply deep knowledge of CMOS processes and analog/mixed-signal circuitry to innovate and refine design methodologies.
• Review and optimize circuit layouts, ensuring compliance with ESD and JEDEC standards for DDR interfaces.
• Participate in design reviews, provide technical input, and contribute to the continuous improvement of design flows and best practices.
• Document design processes, test plans, and results, supporting knowledge sharing and future project success.

Impact

• Drive the development of high-performance memory interface solutions that power next-generation technologies.
• Enhance the robustness and reliability of Synopsys' analog and mixed-signal IP portfolio.
• Ensure products meet or exceed industry standards, supporting customer success and market leadership.
• Influence cross-functional teams by sharing insights and best practices in circuit design and layout.
• Contribute to the delivery of cutting-edge silicon solutions for global semiconductor leaders.
• Support continuous innovation, helping Synopsys stay ahead in a competitive, fast-moving industry.

Requirements

• BTech/MTech in Electronics or Electrical Engineering.
• 1–3 years of experience in analog/mixed-signal circuit design, with expertise in CMOS processes and deep submicron technologies.
• Proficiency in CMOS circuit design and layout methodologies; experience with ESD concepts is a plus.
• Familiarity with ASIC design flows and JEDEC DDR interface requirements, including DDR Timing, ODT, and SDRAM functionality.
• Ability to work with cross-disciplinary teams to meet complex design specifications and project goals.

Team

You will join a world-class engineering team focused on analog and mixed-signal IP development for cutting-edge memory interfaces. Our team thrives on innovation, collaboration, and technical excellence, working closely with global experts to deliver industry-leading solutions for top-tier semiconductor clients. We foster an inclusive and supportive culture where every member's contributions are valued and professional growth is encouraged.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your key responsibilities will include:

• Switching & Routing: Design, implement and maintain IT and OT LAN/WAN switching infrastructure with primarily Cisco and Allen-Bradley devices, collaborating with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: Be an SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: Be an SME in Cisco and Fortinet firewalls, including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Provide in-depth troubleshooting and fast issue resolution using monitoring protocols like SNMP and NetFlow
• SDWAN: Have an in-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implement experience with Aviatrix and a deep understanding of cloud networking in AWS and Azure
• Automation: Have in-depth experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation, including high and low-level design, runbooks, and diagrams

As a Senior Network Engineer, you will be expected to work closely with cross-functional teams to ensure the smooth operation of our network infrastructure. You will also be responsible for staying up-to-date with the latest technologies and trends in the field and providing guidance and support to junior team members.

We offer a competitive salary and benefits package, as well as opportunities for professional growth and development. If you are a motivated and experienced network engineer looking for a new challenge, please apply today!

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Define and own the end-to-end solution architecture for SAP S/4HANA and related supply chain solutions (IBP, EWM, TM, Ariba), including integrations, data migration, and non-functional requirements.

Ensure technical solutions meet current business needs and future scalability for Hi-Tech manufacturing and distribution models.

Develop and implement an enterprise roadmap for SAP Supply Chain, including digital capabilities for Industry 4.0, IoT, and advanced analytics.

Provide leadership and guidance on SAP S/4HANA Supply Chain modules (MM, PP, SD, WM/EWM), SAP IBP, and integration with MES, PLM, and external platforms.

Drive solution governance, ensuring adherence to enterprise architecture principles and standards.

Participate in key governance forums: Architecture Review Boards, Program Boards, Change Control Boards, and Integration Management meetings.

Support business development and pre-sales activities, including proposals, RFP/RFI responses, and client workshops.

Proactively manage risks, dependencies, and solution architecture issues, ensuring timely resolution.

Collaborate with third-party vendors, internal teams, and client stakeholders to deliver high-quality solutions.

Financial Oversight & P&L Responsibility:

Develop and manage budgets for SAP High-Tech projects, ensuring cost-efficiency and alignment with company goals.

Monitor P&L performance for the SAP High-Tech business, identifying areas for cost optimization and revenue growth.

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Lamb Weston is seeking a highly skilled Senior Network Engineer to help lead the implementation, optimization and support of our IT and OT network infrastructure. You will be part of a global team managing a multi-vendor environment, ensuring seamless connectivity and security across all our network platforms and vendors.

Key Responsibilities

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

Preferred Qualifications

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

_We offer you a challenging job in a dynamic and growing organization in the food industry. We challenge you to grow in the same way as our company, where development is key. We thrive in a culture defined by our values: Integrity, Teamwork, Inclusion, Drive for Results and Empowerment. As we say at Lamb Weston EMEA, when we see a potato, we see opportunities. What opportunities do you see?_

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Key Responsibilities:

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

Preferred Qualifications:

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

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Design on-chip Process, Voltage, Temperature, glitch, and Droop monitors for silicon biometrics and reliability.

Execute digital backend activities, including synthesis, pre-layout STA, SDC constraints development, floor planning, bump placement, power planning, MV design techniques, VCLP, UPF understanding, placement, CTS, and routing.

Drive post-layout STA, timing and functional ECO development, and timing signoff methodology for high-frequency IP design closure.

Perform physical verification tasks such as DRC, LVS, PERC, ERC, Antenna, EMIR, and Power signoff.

Collaborate with architects and circuit design engineering teams to create and refine new flows and methodologies.

Ensure pre-layout and post-layout timing closure and timing model characterizations across various design corners, meeting reliability and aging requirements for automotive and consumer products.

Accelerating the integration of next-generation intelligent in-chip sensors and analytics into Synopsys technology products.

Optimizing performance, power, area, schedule, and yield at every stage of the semiconductor lifecycle.

Enhancing product reliability and differentiation in the market, reducing risk for customers and partners.

Driving innovation in physical design, verification, STA, and signoff methodologies and tools.

Contributing to industry-leading SLM monitors and silicon biometrics solutions that set new standards.

Collaborating with cross-functional teams to ensure successful deployment and adoption of advanced technologies.

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Our vision is to transform product design, development, and characterization to enable delivery of new medicines to patients. In this role, you will lead analytical strategy and delivery for oral solid dosage (OSD) forms and, as needed, inhaled and/or parenteral products from early development through clinical supply and toward commercialization.

As the analytical project/skill lead, you will partner across formulation, engineering, biopharmaceutics, manufacturing, QA and Regulatory to deliver robust methods, efficient control strategies, and submission-ready documentation. You will also help establish and optimize OSD laboratory capabilities at the Durham site, champion laboratory automation, and encourage adoption of modern data analytics and AI/ML tools to accelerate development and interpretation.

We work, on average, a minimum of three days per week from the office. We balance the expectation of being in the office while respecting individual flexibility.

Responsibilities include, but are not limited to:

• Project leadership: Act as analytical skill lead to secure major drug product deliveries, applying a risk-based, flexible approach to prioritization, resources, and timelines across modalities and dosage forms; integrate analytical plans with global teams and external partners/CMOs.

• Analytical strategy & control: Define and own a phase-appropriate analytical control strategy aligned with CMC expectations across clinical phases; harmonize methods and embed lifecycle management to ensure robust, efficient control.

• Method development & validation: Design, develop, validate, transfer, and lifecycle manage analytical methods for OSD (e.g., HPLC/UPLC, LC–MS, dissolution, impurity profiling, stability-indicating capability); establish scientifically supported system suitability, specifications, and fit-for-purpose sample preparation; ensure readiness for GMP execution with clear documentation and analyst guidance. Support inhaled and/or parenteral methods as needed.

• Characterization & performance: Lead drug product characterization, comparability, and stability programs; direct forced degradation studies; for inhaled products where required, support aerodynamic performance assessments (e.g., impactor analysis).

• CMC & regulatory: Author and review analytical CMC content for IND/IMPD/NDA/MAA; prepare validation reports, method transfer documents, and specifications; lead responses to regulatory queries and support shelf life assignment with appropriate statistics.

• Cross-functional collaboration: Work closely with formulators, engineers, supply and manufacturing sites, QA, Regulatory, and external partners/CMOs to integrate analytical deliverables into project plans and clinical manufacturing.

• Durham lab capability & technology: Champion laboratory automation for sample preparation, method execution, and data analysis under GxP control.

• Problem-solving: Lead complex investigations, root cause analyses, and data integrity assessments; apply structured problem-solving (e.g., Six Sigma) and statistics to drive timely resolution and preventive actions.

• Digital, data & innovation: Apply DoE and statistics for method robustness and understanding; use ELN/CDS and statistical tools; promote AI/ML, chemometrics, and predictive analytics to enhance interpretation, specification setting, and development speed; enable learning and standardization across projects; chip in to patenting and/or publishing.

• Quality & governance: Ensure GxP compliance where applicable, data integrity, rigorous study design, and clear communication to governance bodies.

Minimum Qualifications:

• Bachelor’s (12+ years), Master’s (6+ years), or PhD (or equivalent experience) in Analytical Chemistry, Pharmaceutical Sciences, Biochemistry, Biotechnology, or related field.

• Significant experience in pharmaceutical analytical science with current knowledge of regulatory CMC requirements for clinical and/or marketing applications.

• Demonstrated experience in analytical development for oral solid dosage forms; additional experience with inhaled and/or parenteral products preferred.

• Consistent record leading teams and/or scientific projects within a global organization and with external partners/CMOs; ability to influence cross-functional strategies.

• Strong proficiency with chromatographic techniques (HPLC/UPLC; LC–MS), dissolution, and complementary methodologies; for inhaled products, familiarity with aerosol performance characterization is a plus.

• Hands-on experience in method development (including use of supporting software), validation, transfer, and lifecycle management under ICH guidelines and phase-appropriate frameworks.

• Experience authoring analytical CMC content for submissions and responding to regulatory queries across clinical development.

• Experience working in a GMP/GxP environment; familiarity with instrument/equipment qualification, calibration, and maintenance expectations.

• Excellent communication, customer management, and influencing skills; ability to operate confidently and collaboratively across global, cross-disciplinary environments.

• Demonstrated ability to troubleshoot technical challenges and drive data-driven decisions.

• Fundamental digital and data capability relevant to analytical development, including:

• Proficiency with multivariate experimental design and basic DoE concepts for method and process understanding

• Working knowledge of statistics for analytical science (e.g., regression, ANOVA, capability/variation analysis, stability trending, OOS/OOT investigation)

• Practical use of ELN/CDS and statistical software (e.g., JMP or Minitab) for data analysis and reporting

Preferred Qualifications:

• Strategic chromatographic and separation science leadership: define orthogonal method suites (e.g., RP, HILIC, ion exchange, SEC, SFC, CE) to secure impurity resolution and stability-indicating capability; apply LC–MS(/MS) for structure confirmation and quantitation; use multidimensional LC and targeted DoE to accelerate development and set robust specifications; harmonize methods across sites with clear comparability criteria; embed lifecycle management and coach teams through complex separations (e.g., peptides, oligonucleotides, challenging matrices).

• OSD focus: Support with establishing, equipping, and optimizing OSD test equipment and processes at the Durham site.

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The ideal candidate will have a proven track record of delivering applications bringing excellent technical oversight and development of the best coding practices for the team. As a Specialist Programmer, you will create, support and implement SAS solutions for different data products. This role involves developing SAS code as well as providing the necessary tools and resources for business partners. You will oversee packaging, maintaining and scaling solutions and code bases with the latest technologies.

Key responsibilities include:

• Providing technical leadership in one or more aspects of statistical programming such as SAS, R, Python
• In-depth knowledge of regulatory requirements, industry standards, and industry best practices for data standards development and implementation
• Collaborating with cross-functional teams to define and execute the solution roadmap
• Staying updated on the latest developments in relevant technologies to ensure our team remains at the forefront of the industry
• Identifying opportunities for innovation and solution optimization
• Leading, inspiring and being a key part of team development and retention
• Coaching and mentoring team members in a matrix organization

Quality, Security and Compliance:

• Implementing and enforcing security protocols and best practices to protect sensitive data
• Ensuring compliance with data privacy regulations and industry standards (e.g., GDPR, HIPAA)
• Implementing rigorous testing and quality assurance processes to maintain high product quality

Documentation and Training:

• Being a champion for high standards to ensure best practices are developed in the team
• Creating and maintaining documentation related to tools, processes, and best practices
• Providing training and support to development teams on platform usage and optimization

Candidate Knowledge, Skills and Experience:

• Bachelor's Degree from an accredited college or university with a major in Computer Science, Information Systems, Engineering, Mathematics, or equivalent experience in a related scientific or technical discipline
• 8+ years of relevant experience
• Experience creating SDTM/ADaM specification and datasets
• Expertise in SAS programming including SAS/Base, SAS/Lifetest, SAS/Macro, SAS/Graph, SAS/SQL, SAS/ODS, SAS/STAT, SAS/Connect and SAS Access
• Experience in data analysis, statistical analysis, and generating tables, listing, figures, and reports using SAS tools
• Proficiency in understanding statistical programming environments, processes, procedures, and roles
• Strong project management and time management skills
• Excellent communication and interpersonal abilities to engage with customers and internal stakeholders
• Creative, collaborative, & product focused
• Experience with Python, R and other open-source technologies is desirable
• Experience with Groovy Scripting, SnapLogic, SharePoint, Power Automate, Power Apps, Power BI a plus

The annual base pay for this position ranges from $137,763.20 - $206,644.80. Hourly and salaried non-exempt employees will also be paid overtime pay when working qualifying overtime hours. Base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. In addition, our positions offer a short-term incentive bonus opportunity; eligibility to participate in our equity-based long-term incentive program (salaried roles), to receive a retirement contribution (hourly roles), and commission payment eligibility (sales roles). Benefits offered included a qualified retirement program [401(k) plan]; paid vacation and holidays; paid leaves; and, health benefits including medical, prescription drug, dental, and vision coverage in accordance with the terms and conditions of the applicable plans.

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are: You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognized for your ability to balance technical depth with practical implementation.

Responsibilities: Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes. Owning the full lifecycle of ESD structures, from schematic design, simulation, and layout to silicon qualification and production release. Leading and executing I/O development, including I/O ring design, review, and optimization for performance and robustness. Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements. Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity. Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality. Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions.

The Impact You Will Have: Elevating the reliability and performance of Synopsys' interface IPs, directly influencing the success of global semiconductor customers. Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry. Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions. Accelerating time-to-market for customer products through efficient and high-quality design practices. Fostering a culture of technical excellence and continuous improvement within the analog design team. Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects.

Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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As a Layout Design Senior Engineer, you will develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below). You will design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements.

Responsibilities:

• Develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below)
• Design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements
• Perform DRC, LVS, ERC, Antenna checks, and ensure timely completion of verification cycles
• Apply layout matching techniques and address ESD, latch-up, EMIR, DFM, and LEF generation issues
• Collaborate closely with cross-disciplinary teams to optimize layout for performance, power, and area
• Troubleshoot and debug layout challenges, continually improving methodologies and design outcomes
• Document design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement

Impact:

• Accelerate the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products
• Ensure robust and reliable IP performance through meticulous layout design and physical verification
• Drive innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more
• Contribute to the world's broadest portfolio of silicon IP, enhancing Synopsys' position as a technology leader
• Reduce risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements
• Foster a culture of collaboration, accountability, and technical excellence within the team and across the organization
• Help shape the next wave of semiconductor advancements, powering smart devices and connected systems globally

Requirements:

• B.Tech/M.Tech degree in Electronics, Electrical, or related engineering discipline
• 2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below)
• Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies
• Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies
• Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation
• Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms
• Ability to work independently and collaboratively, managing multiple tasks and priorities

Team:

You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR & HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world's most advanced chips and devices.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your key responsibilities will include:

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimisation
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

To be successful in this role, you will need:

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

In return, we offer a challenging job in a dynamic and growing organisation in the food industry. We challenge you to grow in the same way as our company, where development is key. We thrive in a culture defined by our values: Integrity, Teamwork, Inclusion, Drive for Results and Empowerment. As we say at Lamb Weston EMEA, when we see a potato, we see opportunities. What opportunities do you see?

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Key responsibilities include developing and implementing an enterprise roadmap for SAP Supply Chain, including digital capabilities for Industry 4.0, IoT, and advanced analytics. You will provide leadership and guidance on SAP S/4HANA Supply Chain modules (MM, PP, SD, WM/EWM), SAP IBP, and integration with MES, PLM, and external platforms. You will drive solution governance, ensuring adherence to enterprise architecture principles and standards.

In addition to technical expertise, you will have excellent client interaction skills, with the ability to influence senior stakeholders. You will be able to design and deliver Agile-based solutions and have a strong understanding of data migration, master data governance (MDG), and analytics.

Preferred skills include experience with SAP MM, SD, PP, QM, SAP IBP for demand and supply planning, and knowledge of SAP EWM/TM for logistics execution.

What We Offer:

• Work on cutting-edge SAP programs in hi-tech industries
• Opportunity to shape digital supply chain transformations
• Collaborate with global teams and innovate with emerging technologies
• Competitive salary and performance-based bonuses
• Opportunities for professional growth and career advancement
• Flexible work hours and the possibility of hybrid work
• A collaborative and innovative work environment with a team of industry experts

Why Join Us?

At Infosys, we believe in empowering all individuals, regardless of gender, background, or experience level. We make investments in key initiatives that support our mission of driving gender equality across our business through custom programs for our consultants, offering skill-building workshops, and cross-company network events connecting women, businesses, and organizations all over the world.

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This isn't a role for someone who waits for leads to come in. You'll build pipeline from scratch, learn how great engineering teams think, and develop a deep understanding of how Cursor transforms developer productivity. It's the fastest way to learn enterprise sales at one of the most exciting companies in AI.

Responsibilities:

• Generate qualified pipeline for our Account Executive team through high-volume outbound prospecting , cold calls, personalised emails, LinkedIn, and creative multi-channel sequences

• Research target accounts and map stakeholders across Engineering, Product, and Leadership to identify the right entry points

• Conduct discovery conversations that go beyond surface-level qualification , understand how development teams work, what's slowing them down, and where Cursor fits

• Partner closely with AEs to develop account strategies, hand off opportunities cleanly, and stay looped in as deals progress

• Hit and exceed weekly activity targets and monthly qualified meeting goals

• Represent Cursor's brand and product with conviction , you'll be many prospects' first impression of the company

• Bring market intelligence back to the team: what resonates, what objections are coming up, what messaging is landing

• Help build the playbook , as an early AA, your patterns and learnings will shape how this function scales

You may be a fit if:

• You have 1–2 years of experience in a sales, customer-facing, or business development role , SDR/BDR experience at a SaaS or developer tools company is a strong plus

• You're a relentless self-starter who takes ownership of your pipeline and doesn't wait to be handed leads

• You write and speak with clarity , you can explain a complex product simply and tailor your message to a technical audience

• You're curious about how software gets built and excited by the idea that AI is fundamentally changing the craft

• You're organised and data-driven: you track your activity, learn from your numbers, and iterate quickly

• You have thick skin and genuine resilience , you don't take rejection personally and you bounce back fast

• You want to grow into an Account Executive role and are willing to put in the reps to get there

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This isn't a role for someone who waits for leads to come in. You'll build pipeline from scratch, learn how great engineering teams think, and develop a deep understanding of how Cursor transforms developer productivity. It's the fastest way to learn enterprise sales at one of the most exciting companies in AI.

Responsibilities:

• Generate qualified pipeline for our Account Executive team through high-volume outbound prospecting , cold calls, personalised emails, LinkedIn, and creative multi-channel sequences

• Research target accounts and map stakeholders across Engineering, Product, and Leadership to identify the right entry points

• Conduct discovery conversations that go beyond surface-level qualification , understand how development teams work, what's slowing them down, and where Cursor fits

• Partner closely with AEs to develop account strategies, hand off opportunities cleanly, and stay looped in as deals progress

• Hit and exceed weekly activity targets and monthly qualified meeting goals

• Represent Cursor's brand and product with conviction , you'll be many prospects' first impression of the company

• Bring market intelligence back to the team: what resonates, what objections are coming up, what messaging is landing

• Help build the playbook , as an early AA, your patterns and learnings will shape how this function scales

You may be a fit if:

• You have 1–2 years of experience in a sales, customer-facing, or business development role , SDR/BDR experience at a SaaS or developer tools company is a strong plus

• You're a relentless self-starter who takes ownership of your pipeline and doesn't wait to be handed leads

• You write and speak with clarity , you can explain a complex product simply and tailor your message to a technical audience

• You're curious about how software gets built and excited by the idea that AI is fundamentally changing the craft

• You're organised and data-driven: you track your activity, learn from your numbers, and iterate quickly

• You have thick skin and genuine resilience , you don't take rejection personally and you bounce back fast

• You want to grow into an Account Executive role and are willing to put in the reps to get there

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Being an engineering lead at BlackRock means you get the best of both worlds; working for one of the most sophisticated financial technology companies and being part of a software development team responsible for next-generation technology and solutions.

As the Engineering Lead, you will:

• Get stuff done. You'll use your seasoned judgement to independently identify, own, and deliver solutions in a complex multi-stakeholder operating environment.
• Build the emerging SDLCs from scratch. The Rust, Golang, and JavaScript SDLCs are greenfield. You'll design these from the ground up, making foundational architectural choices that will endure for years and set the standard for how these languages are built, tested, and deployed across BlackRock.
• Improve the SDLC build system. Platform provides a standardized build environment that reduces duplicative work and meets our compliance obligations. You'll drive a simplification and modernization effort.
• Shape technical strategy. You'll have the authority to make opinionated decisions about architecture, tooling, and standards for your ownership areas.
• Grow yourself. You'll continuously expand your technical knowledge and leadership to make us one of the most productive teams at BlackRock.
• Grow the team. We're already a great team with a healthy mix of experience levels; you'll make us better and faster by raising both the technical and cultural bar.
• Grow the org. Impact at BlackRock's scale means collaboration, and you'll deliver in partnership with other teams.

What you'll need:

• Deep experience. 10+ years of engineering experience, with 5+ years in a technical lead role.
• Systems expertise. Proven track record designing, developing, and deploying scalable and resilient systems.
• Adaptability to new tech stacks. Your initial scope is Rust, Golang, JavaScript, and the build infrastructure, but you'll evolve and lead new languages as they're adopted by the firm.
• Build systems and CI/CD pipelines. You'll own a standardized platform that reduces duplicative work and meets compliance obligations.
• Strategic alignment. Experience setting goals that align with your customers' needs and the broader BlackRock technology roadmap.

Who you are:

• Customer-obsessed. You know your customers and their pain points and work backwards from these to determine what needs to be built.
• A trusted technical lead and collaboration partner. Your team know they can depend on you; your partners know you'll support them, and your customers know you'll deliver on time.
• Autonomous with a bias for action. You're happy figuring out what needs to be done and ensuring it aligns with the needs of your customers and the broader technical strategy.
• Hands-on and in the details. You won't deliver everything yourself, but you won't be shy about rolling up your sleeves.
• A clear, confident communicator. You explain complex topics with data and evidence, but with a simplicity that resonates with a broad audience of engineering and non-engineering stakeholders.

If this sounds like you, we'd love to hear from you.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are a passionate and detail-oriented engineer with deep expertise in IC layout design, eager to contribute to the development of next-generation DDR & HBM PHY IPs. Your experience in advanced process technologies equips you with a strong foundation in deep submicron effects, layout floorplanning, and physical verification.

Developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below) Desining layout floorplans, routing, and conducting physical verifications to ensure compliance with industry standards and internal quality requirements. Performing DRC, LVS, ERC, Antenna checks, and ensuring timely completion of verification cycles. Applying layout matching techniques and addressing ESD, latch-up, EMIR, DFM, and LEF generation issues. Collaborating closely with cross-disciplinary teams to optimize layout for performance, power, and area Troubleshooting and debugging layout challenges, continually improving methodologies and design outcomes. Documenting design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement.

Accelerating the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products. Ensuring robust and reliable IP performance through meticulous layout design and physical verification. Driving innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more. Contributing to the world’s broadest portfolio of silicon IP, enhancing Synopsys’ position as a technology leader. Reducing risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements. Fostering a culture of collaboration, accountability, and technical excellence within the team and across the organization. Helping shape the next wave of semiconductor advancements, powering smart devices and connected systems globally.

BTech/MTech degree in Electronics, Electrical, or related engineering discipline. 2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below). Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies. Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies. Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation. Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms. Ability to work independently and collaboratively, managing multiple tasks and priorities.

Analytical thinker with strong problem-solving and debugging skills. Self-motivated, accountable, and results-driven. Collaborative team player who fosters trust and open communication. Adaptable and eager to learn new technologies and methodologies. Effective communicator with excellent interpersonal skills. Committed to diversity, inclusion, and continuous improvement.

You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR & HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world’s most advanced chips and devices.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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You are a passionate and experienced SAP ABAP developer, eager to make a meaningful impact in a global technology powerhouse. With a minimum of 6 years of hands-on expertise across SAP ABAP, SAP-MM, SAP-SD, and SAP-FI, you thrive in complex technical environments and enjoy collaborating with cross-functional teams.

Designing, developing, and deploying scalable SAP business solutions tailored for Sales and Operations teams. Collaborating with stakeholders to analyze business requirements and lead design sessions for functional specifications. Writing, testing, and optimizing code using SAP ABAP, Data Dictionary, Table Maintenance, ALV Reports, Function Modules/RFCs/BAPIs, Module Pool, BDCs, SAP Script/Smart-Forms, and SAP Web Services. Developing custom SAP screens and enhancing SAP-SD module functionalities to support business operations. Documenting process flows, recommending improvements, and implementing changes to optimize business processes. Providing technical expertise and mentoring junior team members, ensuring high standards of quality and scalability.

Accelerate the development and delivery of business-critical applications that empower Synopsys teams. Enhance operational efficiency through robust, scalable SAP solutions aligned with organizational goals. Drive process optimization, enabling faster and more informed decision-making across Sales and Operations. Support Synopsys' strategic initiatives by ensuring seamless integration and performance of SAP modules. Foster a culture of innovation by contributing technical expertise and insights to improve existing systems. Strengthen Synopsys' competitive advantage through reliable, high-performance business applications.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures.

Responsibilities:

Architecting and implementing state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications.

Translating standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features.

Leading and contributing hands-on to RTL coding, synthesis, CDC analysis, debug, and test development tasks.

Collaborating with global teams and engaging directly with customers to understand and refine specification requirements.

Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R-aware synthesis using tools such as Fusion Compiler.

Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies.

Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency.

The Impact You Will Have:

Enable Synopsys to deliver industry-leading, high-performance IP cores that power next-generation technologies.

Contribute to the successful execution of complex, global projects that set new standards in chip design and verification.

Accelerate time-to-market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions.

Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation.

Drive improvements in design quality, efficiency, and scalability through process optimization and automation.

Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends.

What You’ll Need:

Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field.

4+ years of hands-on industry experience in ASIC RTL design, with a strong portfolio of completed projects.

Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines.

Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis.

Familiarity with high-speed design (>600MHz), P&R-aware synthesis, and EDA tools such as Fusion Compiler.

Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation.

Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI).

Exposure to quality processes in IP design and verification is an advantage.

Prior experience as a technical lead or mentor is highly desirable.

Who You Are:

Innovative thinker with a solutions-oriented mindset and a passion for technology.

Excellent communicator who thrives in collaborative, multicultural, and multi-site environments.

Natural leader with mentoring abilities, fostering inclusion and diversity within the team.

Detail-oriented professional with strong analytical and problem-solving skills.

Self-motivated, adaptable, and eager to drive technical excellence and process improvements.

Committed to continuous learning and staying ahead of industry trends.

The Team You’ll Be A Part Of:

You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting-edge IP cores that enable Synopsys’ global customers to achieve their design goals.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Support Specialist, you will help independent cinemas or cinema chains provide a memorable cinematic experience by leveraging our software.

Responsibilities: Investigate and resolve problems that arise with our software at a second or third level. Use SQL Server and SQL statements to assist with problem-solving. Read and interpret error logs provided by clients and from the software package. Maintain communication with clients using our support website, phone, email, and screen sharing. Identify and record software errors to be corrected by our development team.

Requirements: Degree in IT. Experience in implementing or supporting software. Work experience with SDLC and IT solutions. Familiarity with MySQL Server and SQL Server. Understanding of advanced hardware and network aspects. Proficiency in English.

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Key Responsibilities:

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

Preferred Qualifications:

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are: You are an experienced layout design engineer with a passion for technological advancement and an eye for detail. You thrive in collaborative, fast-paced environments and are motivated by the challenge of developing next-generation DDR and HBM PHY IPs. With over five years of hands-on experience in layout development, you are adept at navigating complex process technologies such as CMOS, FinFET, and GAA at 7nm and below. You are a natural leader, capable of mentoring junior engineers, driving project execution, and ensuring the highest standards of product quality. Your expertise spans floorplanning, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and IO frame requirements. You understand the importance of customer requirements at the PHY level and are committed to delivering differentiated solutions that help customers meet their unique performance, power, and size targets. Your communication skills,both written and verbal,are exceptional, enabling you to foster accountability and ownership within cross-functional teams. Above all, you value inclusion, diversity, and continuous learning, and are eager to contribute to a workplace that celebrates innovative thinking and collaboration.

What You’ll Be Doing:

• Leading the development of cutting-edge DDR and HBM layout IPs, setting technical direction and standards.
• Providing hands-on expertise in layout creation, problem-solving, and technical troubleshooting.
• Mentoring and guiding junior engineers, fostering growth and technical excellence within the team.
• Estimating project efforts, planning schedules, and executing projects in cross-functional settings.
• Collaborating with teams to support critical layout requirements, floorplanning, and quality assurance processes.
• Conducting layout reviews, ensuring compliance with release processes, and meeting stringent customer requirements.

The Impact You Will Have:

• Accelerate the integration of advanced silicon IP in SoCs, driving innovation in smart devices and systems.
• Enhance product differentiation and performance, enabling customers to meet demanding market requirements.
• Reduce time-to-market and risk for customers through robust layout design and technical leadership.
• Support Synopsys’ reputation as a leader in DDR & HBM PHY IP development, contributing to industry benchmarks.
• Foster an inclusive and collaborative engineering culture that values accountability and technical excellence.
• Mentor and develop the next generation of layout engineers, ensuring sustained innovation and talent growth.

What You’ll Need:

• BTech/MTech in Electronics, Electrical Engineering, or related field.
• 5+ years of relevant experience in layout design, preferably in DDR & HBM PHY IP development.
• Deep understanding of submicron effects, floorplan techniques in CMOS, FinFET, GAA technologies (7nm and below).
• Expertise in layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements.
• Strong ability to lead projects, manage schedules, and ensure product quality within tight timelines.
• Excellent written, verbal communication, and interpersonal skills.

Who You Are:

• Innovative thinker with a proactive approach to problem-solving.
• Effective communicator and collaborator across diverse teams.
• Detail-oriented, accountable, and committed to high standards of quality.
• Mentor and leader, fostering growth and technical excellence.
• Adaptable, eager to learn, and open to new ideas and technologies.
• Champion for inclusion, diversity, and teamwork.

The Team You’ll Be A Part Of: You will join a dynamic Silicon IP team focused on developing high-performance DDR and HBM PHY IPs. Our team values technical innovation, collaborative problem-solving, and continuous improvement. We work closely with cross-functional groups including design, verification, and customer support to deliver industry-leading solutions that shape the future of smart technology.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You are an experienced layout design engineer with a passion for technological advancement and an eye for detail. You thrive in collaborative, fast-paced environments and are motivated by the challenge of developing next-generation DDR and HBM PHY IPs. With over five years of hands-on experience in layout development, you are adept at navigating complex process technologies such as CMOS, FinFET, and GAA at 7nm and below. You are a natural leader, capable of mentoring junior engineers, driving project execution, and ensuring the highest standards of product quality. Your expertise spans floorplanning, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and IO frame requirements. You understand the importance of customer requirements at the PHY level and are committed to delivering differentiated solutions that help customers meet their unique performance, power, and size targets. Your communication skills,both written and verbal,are exceptional, enabling you to foster accountability and ownership within cross-functional teams. Above all, you value inclusion, diversity, and continuous learning, and are eager to contribute to a workplace that celebrates innovative thinking and collaboration.

Leading the development of cutting-edge DDR and HBM layout IPs, setting technical direction and standards. Providing hands-on expertise in layout creation, problem-solving, and technical troubleshooting. Mentoring and guiding junior engineers, fostering growth and technical excellence within the team. Estimating project efforts, planning schedules, and executing projects in cross-functional settings. Collaborating with teams to support critical layout requirements, floorplanning, and quality assurance processes. Conducting layout reviews, ensuring compliance with release processes, and meeting stringent customer requirements.

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You are an accomplished analog design engineer with a passion for driving innovation in high-speed memory interface technologies. With 8-15 years of experience, you have mastered the fundamentals of analog design and device physics, and you thrive in environments that challenge you to push the boundaries of what is possible. Your expertise in high-speed IO designs, especially in advanced process technologies like CMOS, FinFET, and GAA, positions you as a technical leader. You are motivated by the opportunity to lead and mentor teams, guiding them to deliver best-in-class products that set industry benchmarks for performance and reliability.

You possess a deep understanding of JEDEC requirements and standards for memory interfaces, making you a trusted authority in the development of DDR, HBM, and UCIe PHY IPs. Your knowledge of ESD and reliability concepts ensures robust designs, while your familiarity with signal and power integrity further strengthens your technical arsenal. Communication is your forte; you articulate complex ideas clearly and collaborate effectively across global, cross-functional teams. You are as comfortable in technical discussions as you are in strategic planning, always advocating for quality and innovation.

You value inclusivity and thrive in a diverse, collaborative workspace. You are driven by curiosity, always seeking new solutions and technologies, and you approach challenges with resilience and adaptability. Your leadership inspires others to reach their full potential, and you are committed to continuous learning and professional growth.

You will lead the design and development of next-generation high-speed memory interface PHY IPs, including DDR, HBM, and UCIe. You will drive innovation in high-speed IO circuit designs for memory interfaces using advanced process technologies (CMOS, FinFET, GAA). You will collaborate with global cross-functional teams to deliver integrated solutions. You will apply analog design fundamentals and device physics expertise to optimize performance, power, and area of memory interface circuits. You will ensure compliance with JEDEC standards and requirements, contributing to industry-leading reliability and robustness.

You will mentor and guide design teams to achieve quality milestones, fostering a culture of technical excellence and continuous improvement. You will participate in design reviews, providing technical leadership and constructive feedback to peers and junior engineers. You will support product integration and validation, troubleshooting issues, and optimizing designs for manufacturability and scalability.

You will accelerate the development of cutting-edge memory interface solutions, advancing Synopsys' leadership in semiconductor IP. You will enable customers to build faster, more reliable, and energy-efficient silicon chips for applications ranging from AI to data centers. You will shape industry standards by ensuring compliance and contributing to the evolution of JEDEC and related protocols. You will drive technical innovation, introducing new architectures and methodologies that transform high-speed IO design.

You will mentor and elevate the capabilities of the engineering team, fostering a collaborative and high-performance culture. You will deliver robust products with exceptional signal and power integrity, setting benchmarks for quality and reliability. You will strengthen Synopsys' reputation as the go-to provider for advanced memory interface IPs. You will contribute to the global engineering community through technical presentations, publications, and cross-team knowledge sharing.

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You are a passionate and detail-oriented engineer with deep expertise in IC layout design, eager to contribute to the development of next-generation DDR & HBM PHY IPs. Your experience in advanced process technologies equips you with a strong foundation in deep submicron effects, layout floorplanning, and physical verification. You thrive in dynamic environments, bringing a collaborative spirit and a growth mindset to every project. You value diversity and inclusion, recognizing the importance of varied perspectives in driving innovation. With a commitment to accountability, you consistently deliver quality results, demonstrating ownership and initiative in your work. Your communication skills,both verbal and written,enable you to effectively share ideas, provide feedback, and partner with cross-functional teams. You are motivated by the opportunity to work on cutting-edge technologies, always seeking to expand your knowledge and make a meaningful impact. Whether solving complex problems or optimizing layouts for performance, power, and area, you approach challenges with creativity and perseverance. You are ready to join Synopsys in shaping the future of silicon IP, contributing to products that empower customers to succeed in the Era of Smart Everything.

Developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below). Desining layout floorplans, routing, and conducting physical verifications to ensure compliance with industry standards and internal quality requirements. Performing DRC, LVS, ERC, Antenna checks, and ensuring timely completion of verification cycles. Applying layout matching techniques and addressing ESD, latch-up, EMIR, DFM, and LEF generation issues. Collaborating closely with cross-disciplinary teams to optimize layout for performance, power, and area Troubleshooting and debugging layout challenges, continually improving methodologies and design outcomes. Documenting design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement.

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Your responsibilities will include applying comprehensive sign-off checks (DRC/LVS/ERC/ANT/DFM) to optimize manufacturability, performance, and yield across multiple foundries. You will collaborate with global teams, circuit design, CAD, and PD teams to resolve methodology issues and implement optimized layout designs.

You will conduct design reviews and offer constructive feedback to enhance quality and performance. You will utilize Unix/Shell/Python/TCL/ICV scripting to automate design workflows, QA checks, checklist enforcement, and quality metrics generation.

The impact you will have includes accelerating the creation and optimization of high-performance logic library IP for next-generation silicon solutions, ensuring robust manufacturability and yield, contributing to the reliability and success of Synopsys' IP products, enhancing productivity and efficiency through workflow automation and quality assurance initiatives, driving innovation by implementing advanced layout techniques for emerging technologies like FinFet and GAA, fostering collaboration across global teams, leading to improved methodologies and best practices, and maintaining the highest standards of quality, compliance, and performance in every design delivered.

To succeed in this role, you will need a BTech/MTech in Electrical Engineering, Electronics, or related field, with 5+ years of relevant experience in IC layout design, preferably in standard cell libraries. You will require proficiency with Synopsys Custom Compiler, Virtuoso, Innovus/ICC2, and ICV/Calibre (DRC/LVS/DFM), hands-on experience with TSMC, Samsung, UMC, and GlobalFoundries PDKs, strong scripting skills in Python, Tcl, Perl, SKILL, ICV, and shell scripting, solid understanding of sign-off flow, waiver handling, and quality tracking, excellent written and spoken English for technical communication, deep knowledge of CMOS, DPT, EM/IR, ESD/latch-up, noise, and digital layout fundamentals, and ability to work independently and collaborate effectively across teams.

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As a Senior SAP FICO Architect, you will be part of an entrepreneurial, high-growth environment of 300,000 employees. Our dynamic organization allows you to work across functional business pillars, contributing your ideas, experiences, diverse thinking, and a strong mindset.

Key responsibilities include:

• Leading project teams in the area of FICO
• Best practices knowledge and ability to provide senior advisory
• End-to-end process knowledge including the integration into other SAP components SAP SD, MM, ...

Given that this is just a short snapshot of the role, we encourage you to apply even if you don't meet all the requirements listed above. We are looking for team members who strive to make an impact and are eager to learn.

If this sounds like you and you feel you have the skills and experience required, then please apply now.

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As an accomplished and forward-thinking ASIC Digital Design, Manager-IP Verification professional, you will lead and inspire a team dedicated to excellence in IP verification. Your expertise lies in architecting robust verification environments for complex serial protocols, leveraging HVL (System Verilog), and utilizing industry-standard simulators. You have a deep understanding of verification methodologies like VMM, OVM, and UVM, and are experienced with protocols such as MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB.

Your responsibilities will include specifying, designing, and implementing advanced verification environments for the DesignWare family of synthesizable cores, overseeing verification tasks for IP cores, developing and executing detailed test cases, debugging issues, coding for functional coverage, and ensuring rigorous testing to meet quality goals.

You will also manage regression processes and ensure strict adherence to industry-leading verification methodologies, collaborate closely with RTL designers and a global team of verification engineers to drive seamless integration and innovation, and lead efforts on next-generation connectivity protocols tailored for commercial, enterprise, and automotive markets.

This role requires a Bachelor's degree in Electrical Engineering (BSEE) with 10+ years of relevant experience, or Master's degree (MSEE) with 8+ years. You should have demonstrated experience architecting verification environments for complex serial protocols, proficiency in HVL (System Verilog) and industry-standard simulators such as VCS, NC, and MTI, expertise in verification methodologies including VMM, OVM, and UVM, and strong knowledge of protocols (MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB).

You should be detail-oriented and analytical, with exceptional problem-solving skills, proactive and initiative-driven, able to anticipate challenges and opportunities, excellent communicator, both written and verbal, across diverse and global teams, collaborative team player, fostering a positive and inclusive work environment, adaptable and resilient, capable of managing multiple tasks and shifting priorities effectively.

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Primary Responsibilities: We are looking for a self-motivated, highly organized and creative Technical Product Manager to drive the transformation and delivery of Aladdin’s identity, authorization, and authentication family of products. In this role, you will coordinate a program of work to support a secure, consistent, and seamless identity management, authentication, and authorization experience for Aladdin’s client and software development communities.

Your core responsibilities will be to:

• Define and own the product vision, roadmap, and success metrics for Aladdin’s customer Identity & Access Management Platform.
• Partner closely with engineering to deliver scalable, flexible platform capabilities that support rapid and reliable feature delivery.
• Build and nurture a community of internal users to inform prioritization and execution.
• Translate platform strategy and user needs into actionable product features and outcomes.
• Influence senior stakeholders to align on vision and manage dependencies across teams to ensure delivery alignment and risk mitigation.

Ideal Skills and Experience:

• 4+ years of product or program management experience, leading initiatives from vision through delivery and adoption.
• Prior relevant experience within a Software Engineering or ITSM role will also be considered.
• Experience working with any identity and entitlement management platforms.
• Experience with any industry-standard identity and authentication providers (e.g. Okta, Duo, Ping) as a product manager or software engineer.
• Strong understanding of OAuth2 and similar authorization frameworks.
• A deep empathy for developers and a strong technical understanding of SDLC, CI/CD, developer tooling, and platform infrastructure.
• Experience with agile development methodologies and delivering technology implementations at scale.
• Ability to navigate ambiguity and drive clarity across complex, matrixed organizations.
• Excellent communication and leadership skills with the ability to craft compelling narratives and encourage cross-functional teams.
• Analytical, with a data-driven approach to decision-making and performance measurement.
• Proven track record of delivering impactful outcomes at speed.
• Bachelor’s Degree or equivalent experience (Computer Science or Engineering preferred).

Our benefits: To help you stay energized, engaged and inspired, we offer a wide range of employee benefits including: retirement investment and tools designed to help you in building a sound financial future; access to education reimbursement; comprehensive resources to support your physical health and emotional well-being; family support programs; and Flexible Time Off (FTO) so you can relax, recharge and be there for the people you care about.

Our hybrid work model: BlackRock’s hybrid work model is designed to enable a culture of collaboration and apprenticeship that enriches the experience of our employees, while supporting flexibility for all. Employees are currently required to work at least 4 days in the office per week, with the flexibility to work from home 1 day a week. Some business groups may require more time in the office due to their roles and responsibilities. We remain focused on increasing the impactful moments that arise when we work together in person – aligned with our commitment to performance and innovation. As a new joiner, you can count on this hybrid model to accelerate your learning and onboarding experience here at BlackRock.

About BlackRock: At BlackRock, we are all connected by one mission: to help more and more people experience financial well-being. Our clients, and the people they serve, are saving for retirement, paying for their children’s educations, buying homes and starting businesses. Their investments also help to strengthen the global economy: support businesses small and large; finance infrastructure projects that connect and power cities; and facilitate innovations that drive progress. This mission would not be possible without our smartest investment – the one we make in our employees. It’s why we’re dedicated to creating an environment where our colleagues feel welcomed, valued and supported with networks, benefits and development opportunities to help them thrive.

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As an experienced Analog Layout Senior Engineer, you will be working on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees. You will apply Analog Layout techniques to ensure design meets performance with minimum area and good yield.

Key responsibilities include:

• Working on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees.
• Floor planning, power design, signal routing strategy, EMIR awareness, and parasitic optimization for layout blocks from schematics.
• Applying Analog Layout techniques to ensure design meets performance with minimum area and good yield.
• Building and enhancing layout flow for faster, higher quality design processes.
• Performing layout verification for DRC/LVS/ERC/ANT/ESD/DFM.
• Conducting PERC verification for ESD/LUP checks.
• Completing all design quality checks and data quality checks.
• Collaborating with Place and Route engineers to integrate analog layouts into the top level.
• Working with the Package team to ensure the integration of top die and package.
• Participating in design reviews across the global team.
• Engaging in package design, including interposer and RDL design.
• Collaborating closely with design teams in Vietnam, USA, Canada, and other countries to ensure the success of the whole product.
• Joining research programs to implement new ideas for future products and flows.
• Leading a layout team to complete a full design block.
• Mentoring junior layout engineers or interns.

The impact you will have includes driving the development of high-performance Analog IPs that power cutting-edge technologies, enhancing the layout design process for improved efficiency and quality, ensuring the robustness and reliability of our designs through meticulous verification processes, contributing to the integration of complex layouts into top-level designs, fostering collaboration and knowledge sharing across global teams, and mentoring and developing the next generation of layout engineers.

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As a leader, you are motivated by mentoring and elevating your team, fostering a collaborative environment that encourages knowledge sharing and accountability. You are comfortable handling multi-faceted projects, from initial floorplanning to the final tape-out, and you have a proven ability to manage schedules, estimate efforts, and deliver best-in-class products on time.

Your expertise spans across layout matching techniques, ESD protection, DFM, and advanced verification methodologies, enabling you to anticipate and solve complex challenges. You are recognised for your strong communication skills, both written and verbal, and you know how to clearly articulate technical concepts to cross-functional teams and customers alike.

You are inclusive, collaborative, and open-minded, actively seeking diverse perspectives while fostering a supportive team culture. You are accountable and results-driven, with a demonstrated ability to take ownership and deliver on commitments.

You will join a dynamic, high-impact team at the forefront of silicon IP innovation, dedicated to delivering world-class memory interface solutions. Our team thrives on technical excellence, close collaboration, and a shared commitment to pushing the boundaries of what's possible in chip design.

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We are seeking a passionate and innovative Staff Engineer who thrives on turning complex technical challenges into industry-leading solutions. You will lead the design and development of next-generation DDR and HBM PHY IP layout, driving technical innovation and best practices. You will also provide technical mentorship and guidance to junior engineers, fostering skill development and knowledge sharing across the team.

As a Staff Engineer, you will take ownership of layout planning, execution, and quality review processes to ensure on-time delivery of high-quality silicon IP. You will collaborate with cross-functional teams, including circuit design, verification, and product engineering, to meet project goals and customer requirements. You will also manage effort estimation, project scheduling, and execution in multi-disciplinary team settings.

The successful candidate will have a strong command of deep submicron effects, advanced floorplan techniques, and process technologies such as CMOS, FinFET, and GAA. You will also have expertise in layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and bond-pad/IO frame design.

If you are a proactive problem solver, ready to lead, mentor, and make a tangible impact in a dynamic, fast-paced environment, we encourage you to apply for this exciting opportunity.

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You Are: You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 2+yrs experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies.

What You'll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

The Impact You Will Have: Accelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys' leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.

What You'll Need: B.Tech/M.Tech degree in Electronics or Electrical Engineering. 2+ years of hands-on experience in CMOS circuit design, preferably with exposure to deep submicron process technologies. Proficiency in analog/mixed signal design methodologies and layout flows. Familiarity with JEDEC DDR interface requirements, DDR Timing, ODT, and SDRAM functionality is a strong plus. Basic understanding of ESD concepts and ASIC design flow. Demonstrated ability to execute assigned circuit design tasks with high quality and efficiency. Strong written and verbal communication skills for effective team interactions.

Who You Are: Analytical thinker with strong problem-solving skills. Collaborative and adaptable, thriving in dynamic team settings. Detail-oriented and quality-driven, with a commitment to excellence. Proactive, self-motivated, and eager to learn new technologies. Effective communicator, capable of conveying technical concepts clearly. Resilient and resourceful, able to navigate complex challenges.

The Team You'll Be A Part Of: You will join a highly skilled engineering team specializing in DR I/O circuit design for memory interfaces. The team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Job Title: Associate, Counterparty Credit Risk (Capital Markets)

We are seeking a risk professional to join our EMEA Capital Markets Risk team. This role is pivotal in managing counterparty and trading risk exposure taken by our client portfolios when trading securities, entering cleared or over the counter derivatives transactions, and participating in securities lending.

The successful candidate will bring strong capital markets intuition, risk management experience, and a working understanding of the quantitative techniques used in financial risk management. The role is well-suited to candidates with backgrounds in credit risk, trading risk, quantitative analysis, or related capital markets functions.

Key Responsibilities:

• Identify and assess counterparty and trading risks arising from market activity, new products, or evolving market structure

• Monitor and analyze aggregate risk exposures using quantitative metrics

• Stay abreast of market structure developments impacting capital markets risk management, such as shortened settlement cycles, uncleared margin rules, etc.

• Contribute to risk oversight through regular interactions with the global team of risk experts

• Develop and maintain strong relationships with stakeholders across securities lending, trading, legal, compliance, and portfolio management teams.

• Protect the reputation of BlackRock and its clients

Qualifications:

• Minimum 2-3 years of experience in finance, with exposure to trading, financing, or counterparty-related activities

• Background in risk management, including credit, trading, or enterprise risk oversight

• Understanding of quantitative and statistical concepts used in financial risk management (e.g., exposure metrics, stress testing, scenario analysis)

• Ability to interpret risk analytics and translate them into clear risk judgments for stakeholders

• Strong communication and collaboration skills

• Familiarity with legal documentation relevant to capital markets (ISDA, GMSLA, MSFTA)

• Relevant technical and coding skills (e.g., Excel, Python)

• Bachelor’s degree in finance, economics, mathematics or related field

Preferred Attributes:

• Experience working in a global financial institution

• Ability to navigate complex regulatory environments across jurisdictions

• Advanced degree or professional certifications (e.g., CFA, FRM)

• Python coding skills preferred

Our benefits

To help you stay energized, engaged and inspired, we offer a wide range of employee benefits including: retirement investment and tools designed to help you in building a sound financial future; access to education reimbursement; comprehensive resources to support your physical health and emotional well-being; family support programs; and Flexible Time Off (FTO) so you can relax, recharge and be there for the people you care about.

Our hybrid work model

BlackRock’s hybrid work model is designed to enable a culture of collaboration and apprenticeship that enriches the experience of our employees, while supporting flexibility for all. Employees are currently required to work at least 4 days in the office per week, with the flexibility to work from home 1 day a week. Some business groups may require more time in the office due to their roles and responsibilities. We remain focused on increasing the impactful moments that arise when we work together in person – aligned with our commitment to performance and innovation. As a new joiner, you can count on this hybrid model to accelerate your learning and onboarding experience here at BlackRock.

About BlackRock

At BlackRock, we are all connected by one mission: to help more and more people experience financial well-being. Our clients, and the people they serve, are saving for retirement, paying for their children’s educations, buying homes and starting businesses. Their investments also help to strengthen the global economy: support businesses small and large; finance infrastructure projects that connect and power cities; and facilitate innovations that drive progress.

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We are seeking a creative and talented engineer to fill a FPGA Validation role in Bengaluru, India. The environment presents stimulating, challenging, and rewarding work within an excellent work environment with positive career development opportunities.

The FPGA Design and Verification IP Prototyping team is responsible to build FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs and test them to verify their compliance with leading edge industry standards. We play a vital role on supporting Synopsys IP business by validating key features, and mitigating ASIC potential faults early on, in a prototype.

Responsibilities:

• Design, implement, and verify FPGA-based systems for a variety of applications
• Validate FPGA-based IP prototype 'Device Under Test' against real-world devices, Test Equipment and other hardware systems
• Create and maintain comprehensive technical documentation
• Elaborate and execute test plans and test routines
• Detect, troubleshoot, debug, and investigate potential ASIC issues up front
• Establish and maintain relationships with cross-functional teams, internal and external customers

Key Qualifications:

• Bachelor's or master's degree in electrical engineering
• 5+ years of experience in FPGA design and development
• Design and simulate integrated circuitry using Verilog, System Verilog
• Expertise with industry-standard scripting languages such Tcl, Python, Perl and Bash
• Expertise with industry-standard interfaces and protocols such as AMBA AXI or APB.
• Experience with FPGA development tools such as XILINX Vivado. Familiarity with Synopsys Synplify or Protocompiler is a plus
• Experience in digital design methods such as floor planning, timing constraints definition, and static timing analysis
• Excellent verbal and written communication skills in English

Preferred Experience:

• Expertise with HAPS-100,HAPS-80 Boards and Protocompiler Flows
• Familiarity with peripheral interfaces like SD/eMMC and (LP)DDR
• Familiarity with simulation tools such as VCS
• Familiarity with laboratory equipment such as Oscilloscopes, Protocol-Analyzers

Travelling:

As a worldwide organization there is sometimes short term travel maybe required.

The Team You’ll Be a Part Of:

You will be joining the FPGA Design and Verification IP Prototyping team, a group of innovative engineers dedicated to building FPGA-based hardware prototypes of Synopsys Controllers and PHY Interface IPs. The team plays a pivotal role in supporting Synopsys' IP business by validating key features, mitigating ASIC potential faults early, and ensuring compliance with industry standards. Collaboration and continuous learning are at the heart of the team, offering a stimulating, challenging, and rewarding environment with positive career development opportunities.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key Responsibilities:

• Switching & Routing: SME in IT and OT LAN/WAN switching infrastructure design, implementation, and maintenance with primarily Cisco and Allen-Bradley devices. Collaborate with controls engineers and OT teams to support PLC, SCADA, and HMI connectivity
• Wireless Infrastructure: SME in Cisco and Aruba wireless technologies and their enterprise ecosystems, including ISE and ClearPass
• Network Security: SME in Cisco and Fortinet firewalls including policy management, NAT, IPS/IDS, SSL inspection, VPN (IPSec/SSL), etc.
• Monitoring & Support: Technical expert in understanding monitoring protocols like SNMP and NetFlow to provide in-depth troubleshooting and fast issue resolution
• SDWAN: In-depth understanding of SDWAN architecture and ongoing operations, including policy management, traffic steering, and WAN optimization
• Cloud: Implementation experience with Aviatrix and deep understanding of cloud networking in AWS and Azure
• Automation: In-depth Experience with network automation and scripting (Python, Ansible, Terraform)
• Documentation: Design and maintain network infrastructure documentation including high and low level design, runbooks and diagrams

Preferred Qualifications:

• 8+ years of experience of global, enterprise-level LAN/WAN network engineering
• Active certifications in Cisco, Aruba and Fortinet products and technologies
• Bachelor’s degree in computer science, Computer Information Systems, or a related field or equivalent experience
• Deep expertise in Cisco switching, including advanced routing protocols (BGP, OSPF, EIGRP) and Layer 2/3 design
• Proven SME-level experience with Cisco ISE , 802.1X, CoA, profiling, guest portals, and posture
• Strong hands-on experience with Aruba and Cisco wireless (APs, mobility controllers, controller management software)
• Solid working knowledge of Cisco Firepower/FTD, experience with Cisco ASA a plus
• Solid working knowledge of FortiGate firewalls, FortiManager, and FortiAnalyzer
• Experience designing and operating SD-WAN solutions (Fortinet SD-WAN, Cisco Viptela/Meraki, or equivalent)
• Hands-on experience with Allen-Bradley Stratix OT switches and industrial Ethernet networking in manufacturing, utilities, or critical infrastructure environments and OT/ICS security frameworks (IEC 62443, NIST SP 800-82, Purdue Model) and IT/OT network segmentation strategies
• Proficiency with network troubleshooting tools (Wireshark, traceroute, packet captures, etc.)

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Key Responsibilities:

• Lead the design and development of next-generation DDR and HBM PHY IP layout
• Provide technical mentorship and guidance to junior engineers
• Take ownership of layout planning, execution, and quality review processes
• Collaborate with cross-functional teams to meet project goals and customer requirements
• Manage effort estimation, project scheduling, and execution in multi-disciplinary team settings

Requirements:

• BTech/MTech degree in Electronics, Electrical Engineering, or a related field
• Minimum 5 years of relevant experience in physical layout design, particularly in advanced nodes (7nm and below)
• Strong command of deep submicron effects, advanced floorplan techniques, and process technologies such as CMOS, FinFET, and GAA
• Expertise in layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and bond-pad/IO frame design
• Demonstrated ability to lead projects, manage schedules, and deliver high-quality results within tight timelines

Preferred Qualifications:

• Experience with industry-standard EDA tools for layout and verification
• Strong problem-solving skills and ability to work in a fast-paced environment
• Excellent communication and collaboration skills

Benefits:

• Comprehensive medical and healthcare plans
• Time away from work programs
• Family support programs
• ESPP

At Synopsys, we value diversity and inclusion and are committed to creating a workplace where everyone feels valued and supported. We are an equal opportunity employer and welcome applications from qualified candidates of all backgrounds.

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You'll be a Strategic Account Executive selling Cursor to high-tech companies where buyers are deeply technical and competitive evaluations are the norm. You'll win by translating Cursor's product into measurable engineering outcomes and scaling adoption across large developer organisations.

What you'll do

• Build and execute account plans across a focused set of high-tech strategic accounts
• Prospect into Engineering leadership, DevEx, Platform, and Security; generate pipeline
• Run structured discovery around SDLC friction, cycle time, reliability, and quality
• Lead POVs in real repos and workflows; partner with Solutions Engineering for rollout plans
• Navigate enterprise requirements (admin, policy, audit logs, identity, security review)
• Close new logos and drive expansion to standardize Cursor across teams and regions
• Capture competitive insights and improve messaging, objection handling, and process

You may be a fit if

• 7+ years enterprise SaaS selling experience; you've sold to technical buyers
• Strong grasp of developer tooling and the modern SDLC (IDE, CI/CD, code review, security)
• You're a true hunter - you proactively build pipeline from scratch through outbound prospecting, creative sourcing, and relentless follow-up, rather than relying on inbound demand
• You can run a tight, value-driven evaluation and win competitive bakeoffs
• Self-directed IC who enjoys ambiguity and building playbooks as you scale

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As a Layout Design Senior Engineer, you will develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below). You will design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements.

Key Responsibilities:

• Develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below)
• Design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements
• Perform DRC, LVS, ERC, Antenna checks, and ensure timely completion of verification cycles
• Apply layout matching techniques and address ESD, latch-up, EMIR, DFM, and LEF generation issues
• Collaborate closely with cross-disciplinary teams to optimize layout for performance, power, and area
• Troubleshoot and debug layout challenges, continually improving methodologies and design outcomes
• Document design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement

Impact:

• Accelerate the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products
• Ensure robust and reliable IP performance through meticulous layout design and physical verification
• Drive innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more
• Contribute to the world's broadest portfolio of silicon IP, enhancing Synopsys' position as a technology leader
• Reduce risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements
• Foster a culture of collaboration, accountability, and technical excellence within the team and across the organization
• Help shape the next wave of semiconductor advancements, powering smart devices and connected systems globally

Requirements:

• BTech/MTech degree in Electronics, Electrical, or related engineering discipline
• 2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below)
• Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies
• Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies
• Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation
• Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms
• Ability to work independently and collaboratively, managing multiple tasks and priorities

Team:

You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR & HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world's most advanced chips and devices.

Rewards and Benefits:

• Comprehensive medical and healthcare plans that work for you and your family
• In addition to company holidays, we have ETO and FTO Programs
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
• Purchase Synopsys common stock at a 15% discount, with a 24-month look-back
• Save for your future with our retirement plans that vary by region and country
• Competitive salaries

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You are a passionate and detail-oriented engineer with deep expertise in IC layout design, eager to contribute to the development of next-generation DDR & HBM PHY IPs. Your experience in advanced process technologies equips you with a strong foundation in deep submicron effects, layout floorplanning, and physical verification.

You will develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below). You will design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements.

You will apply layout matching techniques and address ESD, latch-up, EMIR, DFM, and LEF generation issues. You will collaborate closely with cross-disciplinary teams to optimize layout for performance, power, and area.

You will troubleshoot and debug layout challenges, continually improving methodologies and design outcomes. You will document design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement.

Accelerating the integration of advanced silicon IP into customer SoCs, ensuring robust and reliable IP performance through meticulous layout design and physical verification, driving innovation in memory interface IPs, and reducing risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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As a Principal AMS Layout Engineer, you will be working on high-speed SerDes IP layout and analog/mixed-signal circuits. You will be responsible for defining and managing layout scope, effort, schedules, deliverables, and customer-specific requirements. You will also be acting as the primary technical interface for customers and internal teams, presenting project status, risks, and mitigation plans.

Key responsibilities include:

• Defining and managing layout scope, effort, schedules, deliverables, and customer-specific requirements
• Accelerating layout development for high-speed SerDes IP to meet quality, schedule, and budget objectives
• Presenting project status, risks, and mitigation plans to customers and internal teams
• Gathering customer requirements and translating them into clear technical specifications and workflow improvements
• Performing hands-on debugging and root-cause analysis of complex layout issues
• Collaborating on layout approaches considering advanced packaging (2.5D/3D, interposers, bump strategy, etc.)

In this role, you will be part of the High-Speed Mixed-Signal IP Layout Team, which is known for its collaborative culture, modern tool ecosystem, and commitment to innovation.

The ideal candidate will have in-depth familiarity with high-speed SerDes layout and analog/mixed-signal circuits, as well as experience with multi-Gbps NRZ and PAM4 SerDes. You will also have expertise in high-speed/signal-integrity layout, ESD design constraints, custom digital layout, reliability-driven layout, and parasitic-aware layout.

As a Principal Engineer, you will be expected to innovate analog/mixed-signal layout methodologies using industry-standard tools and internal automation, and ensure signoff quality across DRC/LVS, EM/IR, reliability, parasitics, and tapeout readiness.

You will also be responsible for creating and maintaining technical documentation, workflow guides, specifications, and customer-facing deliverables, and ensuring documentation is scalable, maintainable, and supports long-term product evolution.

The High-Speed Mixed-Signal IP Layout Team is a dynamic and innovative group that works closely with experienced layout engineers, circuit designers, and CAD specialists to define best-in-class methodologies and deliver high-quality solutions to Synopsys customers worldwide.

If you are ready to make a meaningful impact at a global leader in semiconductor technology, Synopsys is your next destination.

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Our team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.

Key Responsibilities:

• Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability.
• Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals.
• Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards.
• Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies.
• Contributing to the ASIC design flow, from concept to implementation, including verification and documentation.
• Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process.
• Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

Requirements:

• B.Tech/M.Tech degree in Electronics or Electrical Engineering.
• 2+ years of hands-on experience in CMOS circuit design, preferably with exposure to deep submicron process technologies.
• Proficiency in analog/mixed signal design methodologies and layout flows.
• Familiarity with JEDEC DDR interface requirements, DDR Timing, ODT, and SDRAM functionality is a strong plus.
• Basic understanding of ESD concepts and ASIC design flow.
• Demonstrated ability to execute assigned circuit design tasks with high quality and efficiency.
• Strong written and verbal communication skills for effective team interactions.

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

Experience Level: Senior Employment Type: Full-time Workplace Type: Onsite Category: Engineering Industry: Technology Salary Range: Not stated Salary Min: Not stated Salary Max: Not stated Salary Currency: USD Salary Period: Year Required Skills: CMOS circuit design, analog/mixed signal design methodologies, layout flows, JEDEC DDR interface requirements, DDR Timing, ODT, SDRAM functionality, ESD concepts, ASIC design flow Preferred Skills: Not stated

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Responsibilities:

• Design top-level layout with advanced process nodes.
• Provide solutions for difficult ESD/latch-up/ANT issues in layout.
• Stick to workflow and deliver database with high quality.
• Take part in analog layout and design communication, detecting problems.
• Discuss and exchange skill sets with global designers.

Requirements:

• Bachelor's degree or above.
• Major in Microelectronics, Electronic Engineering, or Electronic-related fields.
• Mastering in using EDA tool for layout drawing.
• Proficient in top-level floorplan and connection.
• Adept at ESD/latch-up and solve related problems.
• Use English to communicate with layout designers from global sites.

Preferred experience:

• 3+ years of experience in layout design.
• Knowledge of advanced nodes.
• SoC level experience is prior.

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Be a part of a globally renowned management consulting firm that is on the front-lines of industry disruption. We are a mid-size player with an entrepreneurial spirit that works with a market-leading brand in every sector, while our parent organization Infosys is a top-5 powerhouse IT brand that is outperforming the market and experiencing rapid growth.

Our consulting business is annually recognized as one of the UK’s top firms by the Financial Times and Forbes due to our client innovations, our cultural diversity and dedicated training and career paths we offer to our consultants.

As we look to strengthen our team with top talent that can shape the future for our firm, we seek entrepreneurial-minded individuals that value a highly-diverse culture where differences are embraced, that want to have a voice with top management and that are rewarded for collective achievement. Our top leadership is personally invested in an inclusive work culture that inspires everyone to deliver their best!

The Team

Our ERP practice helps some of the largest global firms and most recognizable brands deliver value and business transformation enabled by digital ERP solutions and services. Our ERP services covering strategy, implementation and innovation help clients delivering true value and achieve their transformation agenda.

Requirements

Good understanding and experience on SAP SD module.

• Support business process flows alignment and coordination.

• Support the implementation.

• Support the Business during Transition and post go-live.

• Systems hands on experience.

• Technical understanding of the module.

• Ability to work with ABAP team to get the custom development done

• Good knowledge of S4HANA concepts, intecompany knowledge would be a plus

Experience driving SAP SD Workshops.

• Contribute to workshop preparation, facilitation and documentation of outputs including URS and IT requirements.

• Meeting minutes writing expertise

• Provide input into the design of processes in the S/4 system based on FIT GAPs, create the functional specifications, data objects and fields design, impact on roles etc...

• Collaborate closely with the business team to document the requirements and also with the development team.

• Responsible to use Solution Manager and the relevant documentation requirements including following CSV guidelines.

• Responsible to define user stories, their acceptance criteria and the definition of done.

Good communication and proactive attitude.

• Support liaising between O2C and other streams.

• Good Presentation skills

• Ability to demonstrate SAP Processes to wider audience

• Agile knowledge, ideally Safe agile certified: candidate will be part of the agile team, the team has one scrum master and one Product Owner, and is expected to participate in all the Ceremonies of the ART such as daily stand up, Iteration Demo and Reviews, Program Increment Planning etc.

About You

We are looking for an ERP Program Lead with extensive SAP delivery experience. Our ideal candidate will have:

• Substantial proven experience working in client facing consulting / contracting roles.

• Proven project and program delivery track record across multiple full lifecycle SAP programs, including multi-country roll-outs of significant size, scope and complexity for ECC and S/4 HANA

• Experience in global delivery and working with offshore resources.

• Experience in mentoring and coach consulting resources.

Benefits

Why Join Us? For the right talent that want to be part of a diverse team, innovation-driven practice and a high-performance culture, we offer industry-leading compensation and benefits, along with top training and development opportunities so that you can grow your career and achieve your personal ambitions. Curious to learn more? We’d love to hear from you.... Join us today!

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a visionary engineering leader with a passion for driving innovation at scale. Your expertise spans advanced semiconductor reliability challenges, and you thrive in environments where complexity meets opportunity. You possess a deep technical foundation,whether from a BS, MS, or PhD in Engineering, Computer Science, or a related discipline,and have amassed over a decade of hands-on experience solving demanding engineering problems. You are recognised for your ability to lead and inspire teams, set technical direction, and deliver state-of-the-art solutions in high-stakes environments.

Your approach is collaborative, engaging with cross-functional groups, customers, and partners to distill requirements and translate them into actionable plans. You are comfortable operating autonomously, making impactful decisions, and mentoring others to achieve their best. You have a keen understanding of the market landscape, competitive dynamics, and emerging technologies, enabling you to architect solutions that are not just innovative, but also commercially viable. Your communication skills allow you to articulate complex ideas clearly and foster alignment among stakeholders. If you are driven by curiosity, leadership, and the desire to shape the future of silicon-to-system reliability, Synopsys offers you the platform to make a lasting impact.

What You’ll Be Doing:

• Leading the planning and architecture of research initiatives across multiple projects and disciplines, setting the technical direction for major innovations.

• Coordinating product design and development activities, with extensive analysis in user experience, software design, and solver research.

• Acting as the top technical reference across groups or products, evaluating emerging technologies and methods to create leading-edge solutions.

• Defining, developing, and maintaining best practices through technical reviews and mentoring, driving organisational excellence.

• Engaging with strategic customers and partners to assess needs, develop solutions, and disseminate information about new opportunities to senior management.

• Functioning as a high-level team leader, project manager, or software architect, sometimes overseeing line management of technical teams.

The Impact You Will Have:

• Setting the technical vision and strategy for next-generation silicon-to-system reliability solutions.

• Accelerating innovation and enabling Synopsys to maintain leadership in semiconductor design and verification.

• Enhancing product performance and reliability, directly influencing customer success and satisfaction.

• Driving cross-team collaboration and knowledge sharing, elevating technical standards and best practices.

• Mentoring and developing engineering talent, fostering a culture of continuous improvement and learning.

• Translating business requirements into actionable technology roadmaps, ensuring alignment with market needs and strategic goals.

What You’ll Need:

• BS in Engineering, Computer Science, or related field with 12 years’ experience, MS with 10 years, or PhD with 8 years.

• Extensive commercial experience addressing advanced semiconductor multiphysics reliability challenges, including EMIR, thermal/stress, and ESD.

• Recognised technical leadership with a proven track record of defining requirements and delivering state-of-the-art solutions.

• Expert-level knowledge in silicon-to-system reliability technologies and methodologies.

• Mastery in delivering innovative technical solutions for large-scale commercial products and driving technology roadmaps across multiple teams.

Who You Are:

• Visionary leader with strategic thinking and the ability to set direction for major technical initiatives.

• Collaborative communicator, adept at engaging stakeholders and translating complex concepts.

• Proactive mentor, passionate about developing others and fostering technical excellence.

• Adaptable problem solver who thrives in dynamic, fast-paced environments.

• Self-motivated professional, comfortable operating independently and making impactful decisions.

The Team You’ll Be A Part Of:

You’ll join a diverse, high-performing engineering team focused on pioneering reliability solutions for the semiconductor industry. The team is collaborative, multidisciplinary, and dedicated to delivering innovations that empower customers to tackle the most complex challenges in chip design and verification. Together, you’ll push the boundaries of technology and shape the future of silicon-to-system reliability.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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The Infrastructure and Platform Services team (IPS) is the backbone of EA’s global gaming ecosystem, delivering the technology that powers EA’s live games and player experiences. IPS provides a deep portfolio of digital platform gaming services and production infrastructure to EA's game studios. From scalable cloud solutions to AI-driven gameplay services, IPS ensures that EA’s games are available anytime, anywhere for millions of players worldwide.

The Marketplace team builds our in-game economy management systems for EA games. These systems include the management and handling of in-game goods, virtual currencies, promotional offers, and player asset management. The Marketplace team is composed of cloud engineering specialists, product managers, and program managers collaborating to build, scale, and deploy the most capable systems in support of EA's large array of games.

As a Senior Technical Program Manager, you will report to the Director of Program Management.

Responsibilities:

• Build and manage the development plan, schedule, and process for multiple simultaneous projects, including tasks, resources, quality, time, priorities, and costs.
• Deliver progress updates to management, ensuring alignment and transparency across all organisational levels.
• Coordinate releases, including tracking bug/quality metrics, and ensuring agreement of schedules with customers, our testing group, and other technology groups.
• Balance goals and roadmaps from Product Management with estimates and capacity constraints from Development to provide measurable milestones.
• Proactively identify, address, and mitigate risks to ensure the seamless delivery of high-quality products.
• Collaborate with Product Management, engineering teams, and key partners (central teams, game teams) to refine and align development requirements for successful execution.
• Manage cross-group dependencies by securing commitments from partners, tracking progress, and ensuring alignment to drive successful delivery.
• Pursue continuous improvement efforts based on the feedback from our partners related to performance indicators.
• Make data-driven decisions by using data and our requirements to provide important insights on vision, requirements, and service improvements.
• Create new process improvement protocols to address persistent program problems.

Qualifications:

• 8+ years technical program management experience running medium to large software programs.
• Expertise in modern project management and SDLC processes and artifacts.
• Experience across component definition, design, engagement, engineering, and service management for highly available online services and platforms.
• Experience with documentation and work tracking tools like Confluence, GitLab, JIRA, Teams/SharePoint, Monday.com.

Bonus:

• Experience working on high-scale, high-availability multi-tenant web services.
• Experience working in GitHub or GitLab, reading code reviews, and understanding API specs.
• Experience programming (Java, C#, Go, Rust, etc.).

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The Infrastructure and Platform Services team (IPS), in the Central Technology organization of EA is the backbone of EA’s global gaming ecosystem, delivering the technology that powers EA’s live games and player experiences. IPS provides a deep portfolio of digital platform gaming services and production infrastructure to EA's game studios. From scalable cloud solutions to AI-driven gameplay services, IPS ensures that EA’s games are available anytime, anywhere for millions of players worldwide.

We’re hiring a Senior Developer Relations Manager in Shanghai to serve as EADP’s primary point of contact for FC Mobile teams, Asia Publishing, Asia-based studios, and key regional external partners. You will build trusted relationships with studio leadership (GMs, Technical Directors, Production) and represent the “voice of the customer” inside EADP. You’ll partner closely with EADP Product, Program, Engineering, and Operations to ensure regional teams get the right solutions,on schedule and at expected quality.

In this role, you’ll translate platform capabilities into clear guidance, drive alignment across teams, unblock delivery, and coordinate execution across EA and partners. In addition, you will project manage specific development projects undertaken by local game teams and partners working closely with global IPS platform engineering teams.

Responsibilities:

• Own the EADP relationship for FC Mobile and Asia studios/partners, acting as the single-threaded point of contact for engagements, escalations, and planning.
• Drive FY27 Asia deployments of EADP services, Help launch EADP services in Asia by working with global and local stakeholders.
• Facilitate technical discovery and architecture alignment between FC Mobile/studios and EADP (workshops, design reviews, integration plans).
• Lead cross-team execution: define plans, milestones, risks, and dependencies; provide clear status updates; and drive decisions to keep deliveries on track.
• Navigate regional launch requirements (China, Vietnam, Korea): identify constraints early, align stakeholders, and drive timely resolution with EADP and publishing/ops teams.
• Run developer enablement and platform evangelism: deliver technical briefings, integration guidance, and feedback loops to improve product fit and developer experience.
• Manage incidents and escalations: predict and remove blockers, coordinate response, and communicate effectively to both technical and non-technical leadership.

Required Qualifications/Skills:

• 5+ years experience in Software Development, Platform Evangelism, Developer Relations or Program Management in a distributed team environment.
• 5+ Experience running Software Development projects, especially with partners preferred as a Program Manager, Project Manager.
• 3+ years of experience with modern project management and SDLC processes and artifacts.
• 3+ years experience across component definition, design, engagement, engineering, and service management for highly available online services and platforms.
• Creative and strategic thinker who can consider needs holistically across a broad spectrum of services providing pragmatism and diligence
• Experience managing senior technical and non-technical leadership needs.
• Demonstrable skills in predicting and removing blockers and ability to manage incidents and escalations
• Data-driven decision-making to inform delivery and prioritization

Bonus Experience:

• Product development experience
• Game development experience
• AI/Cloud development experience

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What sets this role apart: we're looking for someone with a technical foundation and deep understanding of the post-sale motion. You've been in the room for complex customer implementations, usage reviews, and cross-sell negotiations. You understand what it takes for a revenue team to drive product adoption and identify and close expansion opportunities , because you've been that person.

This role sits within Sales Enablement and reports to the Sales Enablement Lead, North America. You will work in close partnership with:

• Customer Success leads, North America and International (owning customer expansion)

• Revenue leadership (owning commercial strategy)

• Product and Product Marketing (owning roadmap, messaging, and use case development)

You will support a global team of CSMs and AEs across North America, EMEA, LATAM, and APAC.

While expansion enablement is your primary focus, you'll also support GTM Enablement across SDR and new business motions as needs arise. This is a full-stack enablement role on a lean team , you'll build content, deliver training, design e-learning, and flex across audiences as the business requires.

Own the expansion enablement foundation

• Design and own ElevenLabs' global revenue team enablement strategy across onboarding, skill-building, and ongoing mastery

• Define what "Expansion Ready" and "Retention Ready" mean at ElevenLabs and build the paths to get CSMs and AEs there

• Establish scalable frameworks that support both the CSM and AE expansion motions

Build expansion enablement programs

• Create structured onboarding journeys for CSMs and AEs covering product mastery, customer lifecycle management, health scoring, and renewal execution

• Design and deliver adoption playbooks that help revenue teams drive usage, engagement, and value realization across customer segments

• Build churn prevention frameworks including early warning indicators, save plays, and escalation paths

• Enable revenue teams to conduct effective business reviews, usage analyses, and value documentation

• Develop technical fluency programs so CSMs and AEs can confidently discuss APIs, agent configurations, integrations, and implementation best practices

• Create cross-sell and upsell playbooks covering expansion discovery, multi-product positioning, and deal execution

• Design enablement for identifying expansion signals , usage patterns, new use cases, stakeholder mapping, and whitespace analysis

• Enable revenue teams to articulate the full ElevenLabs platform story (Creative, Agents, and API) to drive multi-product adoption

• Develop competitive positioning for expansion conversations

Drive adoption and reduce churn

• Partner with Revenue Leads to identify adoption gaps and build targeted enablement interventions

• Create customer-facing resources (guides, videos, best practices) that revenue teams can use to drive self-serve adoption

• Build "Time to Value" programs that help customers realize ROI faster

• Develop renewal execution playbooks covering timeline management, stakeholder alignment, and negotiation frameworks

Create enablement content

• Build and maintain enablement materials including playbooks, training decks, videos, workshops, and LMS content

• Collaborate with Product Marketing, Sales, and Product to translate product releases into expansion-ready materials

• Develop role-play scenarios, call libraries, and coaching frameworks for managers

Use ElevenLabs AI and AI-native tools in enablement

• Use ElevenLabs' voice and agent technology to create localized, voice-enabled training content and AI-powered practice environments for revenue teams

• Operate with an AI-native mindset , you default to AI tools to research, draft, synthesize, and build faster, and you can coach others to do the same

• Continuously evaluate and adopt emerging AI tools that improve enablement quality, speed, or scale

• Build AI-powered coaching tools and practice environments for CSMs and AEs

Deliver live and async training

• Facilitate live virtual trainings, workshops, and certifications across regions and time zones

• Design async learning paths that scale globally

• Run regular enablement office hours and deal/account clinics

Measure and improve enablement effectiveness

• Define and track enablement KPIs such as time to first value, net revenue retention, gross retention, expansion pipeline, ramp time, and adoption metrics

• Partner with Customer Success and revenue leadership to connect enablement efforts to business outcomes

• Use data and feedback to continuously iterate on programs

Shape the function

• Document best practices, establish operating rhythms, and influence how expansion enablement is delivered across the organization

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Within the team, you'll have the opportunity to work on the applied side of our research efforts and directly impact our solutions that are used worldwide by over 55,000 businesses. If you are an expert in post-training Diffusion models for generative AI, this is your chance.

In this position, you'll join our Post-Training Team that works on generative video creation. You will make it possible to apply our foundational models to production use cases. This includes projects such as:

• Apply DPO (direct preference optimisation) to pre-trained models.
• Adapt models to extend their capabilities, for instance, by changing conditioning inputs.
• Build solutions for dubbing and evaluate the quality of lip-sync.
• Implement post-training optimisation techniques, such as quantisation, pruning and distillation, to improve the efficiency of diffusion models used in avatar generation.
• Analyse and address challenges related to model performance, ensuring high-quality output in avatar rendering.
• Stay updated with the latest research and advancements in diffusion models, adversarial networks and post-training optimisation methods.

You have a background in Computer Vision / Computer Science and 3+ years of industry experience. You have knowledge of recent advancements in post-training techniques. You have worked with generative models for images and/or videos (Diffusion/GAN) preferably in the avatar domain. You are interested in doing research, trying new things and pushing the boundaries, going beyond what’s already known. You have experience in using most modern frameworks for machine learning and deep learning. You have great coding skills in Python and you care about writing clean code. You have experience with SDLC tools (Git), preferably CI/CD.

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You will guide customers through best practices for deploying and scaling agents across web, mobile, and telephony, and for integrating agents with existing data sources and systems. You will analyze agent performance data and conversational logs to identify friction points and optimization opportunities that improve accuracy, user experience, and reliability at scale.

In parallel, you will own expansion outcomes across a defined portfolio of enterprise accounts. Success is measured by net revenue retention and sustained multi-product adoption. You will identify expansion opportunities, drive cross-sell through deeper agent usage, and partner with Sales, Engineering, and Customer Success to convert technical success into durable revenue growth and long-term customer commitment.

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Unreal-powered projects have been on the bleeding edge of real-time entertainment for over 20 years. Our team of engineering experts are always innovating to improve the tools and technology that empower content developers worldwide.

What You'll Do

We are looking for an experienced Developer Relations Engineer to join our team and support EOS Anti-Cheat (also known as "Easy Anti-Cheat"). You will serve as a crucial technical liaison between our internal engineering teams and external partners, assisting them in integrating, debugging, and optimizing Anti-Cheat in their projects. Your role involves deep technical troubleshooting of issues, analysing crash dumps, debugging low-level C/C++ code, and providing effective solutions and technical insights. You will help guide design decisions for Anti-Cheat, contributing to technical documentation and maintaining active communication internally and externally.

In this role, you will

• Troubleshoot complex integration and operational issues involving Anti-Cheat, analysing crash dumps, logs, and call stacks to identify root causes
• Collaborate directly with external game developers and internal teams to resolve technical issues promptly and effectively
• Debug and reproduce customer issues, clearly documenting and communicating findings internally and externally
• Represent Epic Games through asynchronous and live support, presence at trade shows such as UEFest, and customer visits
• Develop and maintain clear, comprehensive technical documentation, tutorials, and guides to support partner integration
• Advocate for partners' successful integration and continued use of Anti-Cheat and related Epic technologies, and influence product improvements through customer insights
• Research and identify opportunities to enhance Anti-Cheat technologies and developer experience

What we're looking for

• Highly proficient in C and C++, particularly low-level or kernel-level debugging and development
• Strong ability to analyse crash dumps and debug complex, obfuscated code at the assembly level
• Familiarity with cross-platform development (Windows, Linux, macOS), understanding differences and limitations across these platforms
• Exceptional problem-solving abilities, proactively tackling issues independently
• Excellent verbal and written communication skills to effectively collaborate with internal teams and external partners
• Ability to manage multiple tasks simultaneously, work well under pressure, and prioritise to meet SLA targets
• Prior experience with SDK/API integration and understanding of software engineering principles, including legacy support
• Understanding of online multiplayer video game architectures and associated security concerns

Epic Job + Epic Benefits = Epic Life

Our intent is to cover all things that are medically necessary and improve the quality of life. We pay 100% of the premiums for both you and your dependents. Our coverage includes Medical, Dental, a Vision HRA, Long Term Disability, Life Insurance & a 401k with competitive match. We also offer a robust mental well-being program through Modern Health, which provides free therapy and coaching for employees & dependents. Throughout the year we celebrate our employees with events and company-wide paid breaks. We offer unlimited PTO and sick time and recognise individuals for 7 years of employment with a paid sabbatical.

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You will administer onboarding and enablement tactics across multiple products, advising on best practices for deploying ElevenLabs across web, mobile, and backend systems. You will analyze product usage and performance signals to identify friction points, unblock adoption, and help customers realize measurable value from the platform.

In parallel, you will own commercial outcomes across a defined portfolio of approximately 80 accounts. Success is measured by Gross Revenue Retention and Net Revenue Retention, with a strong emphasis on sustained multi-product adoption. You will identify expansion opportunities, drive renewals and upsells, and partner closely with Sales, Engineering, and Customer Success leadership to turn technical success into durable revenue growth.

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You will leverage the latest Salesforce features to deliver modern applications, while collaborating with Scrum Masters, Product Managers, and cross-functional partners to create products that enhance the player experience.

Key responsibilities include:

• Developing solutions for complex business problems using modern Salesforce constructs and custom development
• Estimating engineering effort during different stages of project life cycle
• Initiating and creating experiences in partnership with distributed teams to ensure the architectural vision is supported and delivered to the highest standards
• Building integrations with internal and external systems hosted in the cloud
• Exhibiting creativity while collaborating and working with designers, engineers of different technical backgrounds, architects and product managers
• Managing end-to-end development, thus ensuring the code written meets the highest standards regarding code quality and efficiency

Requirements include:

• Bachelor's degree in Computer Science Engineering or equivalent with overall 2+ years of experience as a Salesforce developer
• 2 years of hands-on development experience in custom development with Salesforce Lightning and Apex
• Strong understanding and experience in Agentforce
• Strong understanding of Salesforce capabilities and their applicability to solve complex business problems
• Proven experience with Salesforce Service Cloud, including designing and developing custom integrations on the Salesforce platform
• Good experience in Omnichannel implementation (Async Chat, Phone, Email) along with Amazon connect/CTI
• Experience handling and managing large volumes of data and transactions with Salesforce
• Solid understanding of SDLC processes and experience working on Agile projects with distributed teams
• Good experience and understanding of UI/JavaScript frameworks
• Experience building Restful services and good understanding of integration principles
• Exposure to Salesforce package based development and enterprise architecture design patterns

You belong here at EA

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EA SPORTS is one of the leading sports entertainment brands in the world, with top-selling videogame franchises, award-winning interactive technology, fan programs, and cross-platform digital experiences. EA SPORTS creates connected experiences that ignite the emotion of sport through industry-leading sports video games, including Madden NFL football, FIFA soccer, NHL hockey, NBA LIVE basketball, and EA SPORTS UFC.

As a Senior Character Technical Artist (TA), you will be heavily involved in the Sports Technology Character Initiatives. The main areas of responsibilities include character deformation and simulation in Houdini, and working with and debugging farms, pipelines, and simulation set-ups. There will also be work involved developing simulation and accessory rigs. You will be expected to cross-collaborate and communicate with TAs, SEs, and Character Artists, and provide technical and artistic feedback on anatomy and deformation. The work benefits from keeping up to date with the latest Houdini features, and assessing their impact on future improvements. There will also be work involving run-time rigging implementation in a data-driven GameEngine.

The team works onsite 3 days/week in our Burnaby studio.

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Honda has a clear vision for the future, and it’s a joyful one. We are looking for individuals with the skills, courage, persistence, and dreams that will help us reach our future-focused goals. At our core is innovation. Honda is constantly innovating and developing solutions to drive our business with record success. We strive to be a company that serves as a source of “power” that supports people around the world who are trying to do things based on their own initiative and that helps people expand their own potential. To this end, Honda strives to realize “the joy and freedom of mobility” by developing new technologies and an innovative approach to achieve a “zero environmental footprint.”

We are looking for qualified individuals with diverse backgrounds, experiences, continuous improvement values, and a strong work ethic to join our team.

If your goals and values align with Honda’s, we want you to join our team to Bring the Future!

Job Purpose

Lead the design, development, and deployment of advanced AI and machine learning solutions supporting Honda’s automotive R&D initiatives, with a focus on production-grade AI for vehicle development, simulation, manufacturing quality, and digital twins,owning solutions end-to-end and mentoring engineers while partnering with CAE, CAD, manufacturing, and data platform teams.

Key Accountabilities

• Lead development and validation of AI/ML solutions with measurable impact for automotive engineering - CAE, and manufacturing use cases.
• Design and deploy AI surrogate models using Graph Convolutional Neural Networks (GCNNs) to augment/replace physics-based CAE.
• Architect and deploy scalable cloud-based AI systems on AWS/Azure aligned with enterprise governance.
• Own the full AI lifecycle: data ingestion, feature engineering, training, evaluation, deployment, and monitoring.
• Implement MLOps and GenAIOps best practices (versioning, drift detection, CI/CD, traceability).
• Develop and deploy agentic AI solutions for CAE in the cloud and deploy AI agents to execute/augment/monitor workflows.
• Support ETL activities related to ADC data (CAE) structure.
• Establish design standards, code quality, and documentation to support reuse and auditability.
• Mentor and technically guide mid-level and junior engineers.

Qualifications, Experience, and Skills

• Bachelor’s or Master’s degree in Computer Science, Engineering, Data Science, or related field, or equivalent experience.
• 8+ years of experience developing and deploying ML/AI systems; 3+ years in production environments.

_Other Job-Specific Skills_

• Hands-on experience with graph neural networks (GCNNs, GNNs, GATs, MPNNs)
• Advanced proficiency in Python; C++ or Java is a strong plus for automotive contexts
• Deep expertise in ML frameworks (PyTorch, TensorFlow, scikit-learn)
• Strong foundation in statistics, optimization, and numerical methods
• Hands-on experience deploying AI solutions on AWS/Azure (e.g., Amazon Bedrock)
• Experience with LangGraph / LangChain & Strands SDK.
• Experience with containers, pipelines, and MLOps tooling (Docker, MLflow, CI/CD)
• Knowledge of model governance, compliance, and responsible AI frameworks
• CAE/physics-informed ML, surrogate modelling, or simulation experience (preferred).
• Prior knowledge of automotive or related design engineering work is a plus.

Job Dimensions

Decisions Expected

Working Conditions

• Work is primarily conducted at an office desk; hybrid (office/home) work may be available.
• Occasional travel and overtime may be required based on project milestones.
• Work in a cross-functional environment supporting engineering, simulation, and manufacturing stakeholders.

What differentiates Honda and makes us an employer of choice?

Total Rewards:

• Competitive Base Salary (pay will be based on several variables that include, but not limited to geographic location, work experience, etc.)
• Regional Bonus (when applicable)
• Manager Lease Car Program (No Cost - Car, Maintenance, and Insurance included)
• Industry-leading Benefit Plans (Medical, Dental, Vision, Rx)
• Paid time off, including vacation, holidays, shutdown
• Company Paid Short-Term and Long-Term Disability
• 401K Plan with company match + additional contribution
• Relocation assistance (if eligible)

Career Growth:

• Advancement Opportunities
• Career Mobility
• Education Reimbursement for Continued learning
• Training and Development Programs

Additional Offerings:

• Lifestyle Account
• Childcare Reimbursement Account
• Elder Care Support
• Tuition Assistance & Student Loan Repayment
• Wellbeing Program
• Community Service and Engagement Programs
• Product Programs

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You won't just be executing a playbook, you'll be defining it as you go. Working directly with our Founder, Engineering team, and GTM teams, you'll define how Sphere shows up in customer environments and shape what the forward-deployed motion looks like as we scale. This is a rare opportunity to have an outsized influence on both the product and the customer experience.

This role is ideal for engineers who thrive on owning problems end-to-end, from discovery to deployment, and who are energized by the challenge of translating intricate, jurisdiction-specific regulatory requirements into elegant, production-grade software. We're looking for someone who is as comfortable in a customer conversation as they are in a codebase, and who brings the same rigor to building internal processes as they do to solving customer problems.

Enablement

• Onboard customers pre-contract, get accounts functional in Sphere
• Navigate customer billing system integrations
• Pull and interpret liability reports, help customers understand exposure
• Guide clients through the complexity of understanding and managing their global tax liability
• Guide customers through VAT ID collection, address hygiene, and regional compliance

Monetization

• Bridge between customer needs and the engineering roadmap
• Be entrenched with the customer by ensuring Sphere is integral to all of the company’s revenue compliance needs
• Research new compliance requirements (e-invoicing, input tax, etc.) end to end
• Identify patterns across customers - what custom work is being requested repeatedly
• Scope and write tight technical PRDs/proposals ready to hand to core engineering
• Build custom features and integrations on top of the Sphere platform for key accounts
• Identify custom builds that could be scaled and deployed across all customers as new features or products

Requirements

• Experience in an FDE or customer-facing engineering role.
• Experience executing and shipping bespoke customer features, end-to-end.
• Ownership. Takes a problem from ambiguous to shipped without being told how, keeps the customer outcome in sight the whole way, and doesn't drop threads.
• Relentlessly curious. You don't wait to be pointed at the answer - you go find it, and you know when to pull in someone who knows more than you.
• Strong communication skills. We work at an extremely fast pace, so clear, concise communication is essential.
• Customer obsession. You’re going to be talking to a lot of people in the finance realm (Controller, Heads of Finance, Heads of Tax). You need to like them and obsess over them.
• Very strong attention to detail. When you work with numbers, this is a non-negotiable - it’s not enough to be 99% right.

Nice to haves

• Experience working with large volumes of transaction data. You’ll be getting very familiar with it!
• Experience in Python and Django. Our core application backend and data pipeline services are built with Python and Django
• Experience with React. Our entire front end is built in React.

Who you are

You'll thrive here if:

• You're a Dog. You've been underestimated, gone through struggle, and never stopped running. You have a chip on your shoulder and enormous drive. You look at Stripe, Deel, and Flexport all punting on compliance and think: good, that means the opportunity is ours. Hunger beats pedigree.
• Early stage is in your bones. You've built things where there's no playbook and nobody handing you the answer. You define the problem instead of waiting for instructions.
• You own it end to end. Give you a goal and you figure out your own path. Small team, global surface area , everyone owns a domain that would be a full team at a larger company. No one tells you how.
• You believe speed and accuracy are both possible. We're building a complex product that requires robustness and 100% uptime, and we have to build at our customers' pace. Move fast. Don't break things. Both.

This won't be a fit if:

• You need structure handed to you or ambiguity feels draining rather than motivating
• You want to manage people more than own hard problems (we're a flat, experienced team , everyone builds)
• You're used to "good enough" shipping (small errors have outsized impact here)

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You will guide customers through best practices for deploying and scaling agents across web, mobile, and telephony, and for integrating agents with existing data sources and systems. You will analyze agent performance data and conversational logs to identify friction points and optimization opportunities that improve accuracy, user experience, and reliability at scale.

In parallel, you will own expansion outcomes across a defined portfolio of enterprise accounts. Success is measured by net revenue retention and sustained multi-product adoption. You will identify expansion opportunities, drive cross-sell through deeper agent usage, and partner with Sales, Engineering, and Customer Success to convert technical success into durable revenue growth and long-term customer commitment.

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You will administer onboarding and enablement tactics across multiple products, advising on best practices for deploying ElevenLabs across web, mobile, and backend systems. You will analyze product usage and performance signals to identify friction points, unblock adoption, and help customers realize measurable value from the platform.

In parallel, you will own commercial outcomes across a defined set of accounts. Success is measured by Net Revenue Retention and New Product Expansion, with a strong emphasis on sustained multi-product adoption. You will identify expansion opportunities, drive renewals and upsells, and partner closely with Sales, Engineering, and Customer Success leadership to turn technical success into durable revenue growth.

This is the first dedicated Customer Success role in the region and you’ll be part of an early GTM team - we’re looking for people who are excited to build and not just execute on a playbook.

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The Creative Innovation team within the Central Technology organization is the driving force behind EA's cutting-edge research, 3rd-party partnerships, and content creation technologies. From AI-powered tools for character animation to groundbreaking world-building systems, this team researches, innovates, and integrates transformative technologies into creative workflows. By joining Creative Innovation, you'll work at the intersection of creativity, technology, and design solutions that redefine immersive gaming experiences.

Our team within Creative Innovation pioneers the use of Character technologies to empower content creators to create compelling games. You will be a senior member of this team reporting to its Principal Technical Art Director. This role includes managing a small team of technical artists.

This is a hybrid role (3 days per week in the office).

We are at the forefront of character tools development for flagship titles like Battlefield and our sports franchises. You will work with game team partners and product managers to evolve our character creation pipelines, applying AI to boost quality and the artist experience for hundreds of creators.

As a Senior Technical Art Director, you will establish the technical vision and long-term roadmap for character tools and pipelines, ensuring our architecture provides a scalable competitive advantage across multiple important franchises. You will manage architecture and design decisions, and align teams to constraints like quality, schedule, platform, and production realities.

You will turn creative and product needs into requirements and plans. Gather inputs, assess feasibility, manage scope, and align multiple teams on execution in partnership with a Senior Project/Product Manager.

You will work with game team partners and Character artists, animators, and riggers (local and remote) to dig into workflow and production issues and negotiate tradeoffs to deliver practical tooling and pipeline improvements. Connect the dots between teams character needs and Creative Innovations business strategies

Direct the design, implementation and support of production tooling for Character creation workflows, with a focus on usability, iteration speed, reliability, and maintainability.

Define and guide quality and sustainability through standards, code/data/workflow reviews, test strategy and automation, and preventative practices based on production insights.

Manage risks and dependencies across toolsets and domains. Surface mitigation plans to minimize or eliminate exposure

Experience:

Experienced technical art leader with 10+ years (or equivalent) who has owned end-to-end design and architecture and can make tradeoffs to deliver.

Tools and pipeline developer with production experience across DCC workflows (Maya, Houdini, Substance Suite, Blender) and game content creation or pipeline management.

Advanced coding skills, especially in Python, with experience building production-ready tooling for character creation and animation pipelines

Experience applying Generative AI / Machine Learning techniques to automation, content pipelines, or tooling.

Production experience with a game engine, and comfortable working in modern development environments, including containerized workflows like Docker in development.

Quality-focused and, with experience driving debugging and root-cause analysis, preventative practices, test strategy and automation, and coding standards.

Understanding of evolving industry standards (such as USD, MaterialX, or glTF) and their role in creating modular, non-destructive, and interoperable content pipelines that scale across multi-studio productions.

Collaborative and able to bridge artists and engineers, align partners, mentor others, and scale through standards, reviews, and knowledge sharing.

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As a Partner Solutions Architect, you will lead the technical engagement across Constructor’s partner ecosystem, including System Integrators (SIs) and Technology / Independent Software Vendor (ISV) partners. You will work at the intersection of partnerships, product, and go-to-market, ensuring our partners are equipped to successfully position, integrate, and deliver Constructor’s platform.

This is a high-impact builder role. You will help define how Constructor works with partners technically: creating integration standards, developing enablement programs, and supporting partner-led deals. This role focuses on scaling technical success through partners, not just direct deal support.

You will serve as the technical liaison to our partners, ensuring alignment with Constructor’s product and engineering standards. You'll define how we engage technically with partners, create the playbooks, lead the solutioning, and set the standard for what a great Constructor integration looks like.

Key Responsibilities:

Partner Technical Solutioning & Pre-Sales Solutioning

• Lead technical discovery and solution design for partner-led opportunities
• Collaborate with SIs and ISVs to design scalable integration architectures (APIs, ecommerce platforms, PIM, CMS, data pipelines)
• Serve as the primary technical advisor in joint partner-customer engagements
• Support and guide partners in building Proof Schedules (lightweight POCs) and tailored demos
• Build and present compelling custom technical demonstrations and integration blueprints tailored to partner-led opportunities.
• Assist in RFP/RFI responses in collaboration with partners and internal teams
• Troubleshoot and triage APIs, SDKs, and integration patterns

Partner Enablement & Technical GTM

• Design and deliver technical enablement programs for partners in conjunction with partner success managers across all Constructor solutions and integration points.
• Create scalable assets: reference architectures, integration guides, demo environments, and certification materials
• Collaborate with Partnerships leadership to develop joint go-to-market playbooks
• Translate Constructor’s product capabilities into partner-ready technical narratives
• Enable partners to independently position and implement Constructor without heavy internal reliance

Integration Leadership & Quality

• Define and uphold best practices and standards for partner-built integrations
• Support onboarding of new partners with hands-on technical guidance
• Review and validate partner implementations to ensure performance, scalability, and quality
• Identify opportunities to build accelerators, reusable components, and tooling to reduce time-to-value

Cross-Functional Collaboration

• Act as the bridge between partners and internal teams (Product, Engineering, Sales, Sales Engineering, Customer Success)
• Surface partner feedback to influence product roadmap and integration strategy
• Collaborate with Sales Engineering to ensure consistency across direct and partner channels
• Contribute to internal enablement, documentation, and best practices

Market & Ecosystem Engagement

• Stay current on ecommerce trends, composable architecture, and AI/ML advancements
• Represent Constructor in partner meetings, field events, and industry engagements
• Build strong relationships with partner technical stakeholders (architects, engineers, delivery teams)

What Success Looks Like

• Partners can confidently position, implement, and scale Constructor independently
• Integration architectures are clear, repeatable, and aligned with Constructor best practices
• Partner-led deals progress efficiently with minimal technical friction
• Enablement programs drive measurable increases in partner-sourced pipeline and delivery quality
• Product and Engineering receive actionable, structured partner feedback
• Strong qualitative and quantitative feedback from partners, prospects, and internal stakeholders

Working Style

• Comfortable operating in a remote, distributed, and highly cross-functional environment
• Able to manage multiple partner engagements and priorities simultaneously
• A builder mindset that is proactive in creating structure in ambiguous environments
• Highly collaborative with a strong sense of ownership and autonomy
• Commercially aware and aligned with revenue and partner growth goals

Requirements

• 4+ years in Solutions Engineering, Partner Engineering, or Technical Pre-Sales roles
• Experience working with or alongside SI or ISV partner ecosystems
• Strong experience designing SaaS or API-based integrations
• Familiarity with modern ecommerce platforms and architectures (e.g., Shopify, Salesforce Commerce Cloud, commercetools, SAP, headless/composable)
• Experience supporting Proof of Concept/pilot programs

Technical Skills

• Deep hands-on experience with API-first platforms and comfortable working directly with REST APIs, JSON data structures, webhook frameworks, and SDK integration patterns
• Working knowledge of JavaScript (Node.js preferred) or similar scripting language
• Ability to troubleshoot APIs and integration workflows
• Experience building demo prototypes or lightweight integrations

Core Capabilities

• Exceptional communicator; able to translate complex technical concepts into clear business value
• Strong consultative discovery and problem-solving skills
• Ability to engage both technical stakeholders and executive audiences
• Skilled listener with high curiosity and empathy for partner and customer challenges
• Ability to balance technical depth with strategic thinking

Preferred Requirements

• Experience in enterprise ecommerce or retail technology environments
• Familiarity with AI/ML-driven SaaS platforms
• Experience building partner enablement programs or certification frameworks
• Experience working with cloud-native or composable architectures
• Multilingual capabilities (Portuguese, Spanish)

Benefits

• Unlimited vacation time
• Competitive compensation package including stock options
• Fully remote team
• Work from home stipend
• Apple laptops provided for new employees
• Training and development budget for every employee, refreshed each year
• Parental leave for qualified employees
• Work with smart people who will help you grow and make a meaningful impact

Diversity, Equity, and Inclusion at Constructor

At Constructor.io we are committed to cultivating a work environment that is diverse, equitable, and inclusive. As an equal opportunity employer, we welcome individuals of all backgrounds and provide equal opportunities to all applicants regardless of their education, diversity of opinion, race, color, religion, gender, gender expression, sexual orientation, national origin, genetics, disability, age, veteran status

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These partnerships drive three core outcomes:

• Deep product integrations that make ElevenLabs a native part of partner workflows
• Distribution through partner ecosystems (marketplaces, developer platforms)
• Revenue growth via partner-sourced, partner-influenced, and product-led usage

This role sits at the intersection of product, engineering, and revenue, with a strong focus on building scalable, product-driven ecosystems.

Key Responsibilities

• Build and scale ElevenLabs' product partnership ecosystem across enterprise platforms (CRM, CcaaS, etc) and creative tools (music, DAWs, creator platforms), embedding our voice AI directly into partner workflows to drive distribution, usage, and revenue
• Drive product-led integrations (SDKs) that embed ElevenLabs into partner platforms
• Own revenue outcomes: partner-sourced pipeline, co-sell, and consumption growth
• Build partnerships across enterprise (CRM, CCaaS) and creative ecosystems (DAWs, music)
• Define and execute repeatable GTM motions with partners (not one-off deals)

Ecosystem Coverage

• Enterprise Platforms: CRM, Telephony, Contact Center, Support, Workflow tools
• Creative Platforms: DAWs, music production
• Developer Platforms: APIs, marketplaces, SDK-driven ecosystems

What You Will Do

• Build and scale product partnerships that embed ElevenLabs natively into enterprise and creative platforms, driving distribution, usage, and revenue
• Drive product-led integrations by working closely with Product and Engineering to define APIs, SDKs, and native experiences within partner platforms
• Own joint GTM and revenue outcomes, including partner-sourced pipeline, co-sell motions, and product-driven consumption growth
• Develop ecosystem strategies across both enterprise and creative platforms, including CRM, contact center, and emerging creative ecosystems such as music and DAWs
• Identify and build strategic partnerships in the creative space (e.g., music platforms, DAWs) that unlock new distribution channels and use cases for ElevenLabs
• Design repeatable solutions and integrations that can scale across customers and partners, not just one-off deals
• Enable partner and internal sales teams with clear solution narratives, use cases, and deployment architectures tied to real business outcomes
• Drive developer and platform adoption, including marketplace listings, SDK adoption, and integration patterns that increase usage at scale
• Act as the voice of the ecosystem to Product, influencing roadmap based on partner and market needs

What You Bring

• 8+ years of experience in technology partnerships, platform partnerships, or ecosystem roles within SaaS, cloud, Payments, AI, or developer-platform companies
• Proven ability to translate technical integrations into commercial outcomes, including partner-sourced pipeline, co-sell revenue, or marketplace distribution
• Strong understanding of API-driven products, integrations, and developer ecosystems, with the ability to work effectively with engineering and product teams
• Experience building joint GTM strategies with enterprise technology partners, including co-selling, partner enablement, and integrated solution development
• Experience building product-led partnerships, including integrations, APIs/SDKs, or embedding capabilities into third-party platforms
• Experience working with or strong interest in creative ecosystems (DAWs) is a strong plus
• Demonstrated success operating cross-functionally across Sales, Marketing, Product, and Engineering to operationalize complex partnerships
• Strong commercial instincts and experience owning or influencing revenue targets tied to partnerships
• Ability to operate with high autonomy and ownership in fast-growing environments, balancing strategic thinking with hands-on execution
• Passion for AI technologies and the role of AI agents in transforming enterprise workflows and customer engagement

Who Thrives at ElevenLabs

• Builder mindset with strong ownership
• Passion for AI and emerging technologies
• Comfort operating in fast-moving environments
• Desire to build new ecosystems from scratch

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As the PM for Customer Developer Experience + Customer Data Integrations, you will own the end-to-end integration journey for Constructor's customers and SIs , from first setup through long-term adoption. Your north star is time-to-value: making it fast, correct, and reliable for any team to integrate with Constructor and start getting results.

Day-to-day, you will:

• Define and drive a roadmap that measurably reduces integration time, defects, and escalations.
• Improve integration correctness for key tracking flows (search → PDP → conversion, sponsored click tracking, etc.) by reducing common failure modes and adding robust validation and diagnostics.
• Build and evolve validation and debugging tooling that empowers customers, Solutions Engineers, and Customer Success to self-serve faster.
• Define clear support and capability boundaries to reduce high-visibility escalations and improve customer predictability.
• Partner with Engineering, Solutions/CS, and other Product teams to sequence work, de-risk launches, and ensure new capabilities ship integration-ready.

Requirements

• 3+ years of product management experience shipping developer-facing or integration-heavy products , such as SDKs, APIs, web tracking/instrumentation, data pipelines, or developer tooling.
• Demonstrated ability to reduce time-to-value or integration complexity in a B2B SaaS environment , with concrete, measurable outcomes.
• Technical fluency sufficient to reason credibly about event flows, browser/web constraints, attribution, versioning, breaking changes, and rollout risk , without needing to be an engineer.
• Track record of strong cross-functional collaboration: aligning Engineering, Customer Success, Solutions, and other Product teams on priorities and support boundaries.
• Comfort defining metrics and making decisions with imperfect data; experience building and reporting product health dashboards.
• Strong written communication , clear specs, integration guides, capability docs, and stakeholder updates.

Benefits

• Unlimited vacation time
• Competitive compensation package including stock options
• Fully remote team
• Work from home stipend
• Apple laptops provided for new employees
• Training and development budget for every employee, refreshed each year
• Maternity & Paternity leave for qualified employees
• Company sponsored US health coverage (100% paid for employee)

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You'll work across subscriptions, usage-based billing, and enterprise contracts to ensure every revenue path is reliable, observable, and easy to extend. This includes designing, building, and owning the billing platform and monetization systems that power Computer and every paid experience across Perplexity.

Key responsibilities include:

• Leading features end-to-end, from problem definition through technical design, implementation, and launch
• Building and operating the subscription, invoicing, and usage-based billing systems that serve millions of users across consumer and enterprise plans
• Hill-climbing on reliability: tiered SLOs organized by customer impact, proactive monitoring, and alerting to catch revenue-affecting issues before customers do
• Partnering closely with Finance, Data Science, Growth, Security, Support, and go-to-market teams to keep billing data accurate, auditable, and compliant, and to expand payment method coverage and optimize authorization rates globally
• Building internal tooling that empowers Support and Finance to diagnose and resolve billing issues quickly

Requirements include:

• 4+ years of professional software engineering experience
• Direct experience building or scaling billing, payments, subscription, or monetization systems
• Deep familiarity with payment processors (Stripe, Square, etc.), including subscriptions, invoicing, disputes, refunds, and webhooks
• Strong backend engineering skills in Python with the ability to reason about complex distributed systems
• Experience with relational databases (PostgreSQL) and making data-informed decisions to prioritize work
• Strong product judgment, you translate user and stakeholder problems into simple, effective technical solutions
• Self-motivated with strong ownership instincts, you ship major features ahead of schedule and drive improvements without asking for permission
• Track record of cross-functional collaboration with Finance, Support, or Growth stakeholders
• Genuine interest and adoption of AI products and willingness to learn quickly

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Responsibilities:

• Exposure to programming languages such as Python, JavaScript, bash, PowerShell, and C#
• Familiarity with version control systems such as Git
• Collaborate with implementation partners to design, build, and deploy complex integrations
• Assist with proof of concepts for strategic and enterprise customers
• Work side-by-side with customers to establish partnerships and strategic relationships
• Analyze and audit existing Helpshift implementations for the purpose of making improvements
• Become an expert at using Helpshift's administrative tools
• Work collaboratively with Customer Success Managers, other Services teams, and Sales to ensure customers' overall success with the product

Requirements:

• Exposure to any of the following programming languages: Python, Go, C#, Node.js, PowerShell
• Familiarity with technical SaaS concepts such as SDKs, APIs, and cloud computing
• Exceptional organizational skills
• Understanding of Object-Oriented Programming concepts
• Excellent communication skills
• Proficiency in the entire G-Suite and ability to perform data analysis tasks
• Curiosity about complex systems and a natural problem-solving ability

Benefits:

Helpshift embraces diversity and is an equal opportunity workplace.

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You will have expert knowledge of either Rust or C++ and experience in designing, implementing, and maintaining reliable and horizontally scalable distributed systems. You will also have knowledge of service observability and reliability best practices, as well as experience in operating commonly used databases such as PostgreSQL, Clickhouse, and MongoDB.

Preferred skills and experience include experience with LLM inference engines and serving frameworks, agent SDKs and agent orchestration frameworks, Docker, Kubernetes, and containerized applications, and expert knowledge of gRPC.

In addition to a competitive base salary of $180,000 - $440,000 USD, you will receive equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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In this role, you will stand up OpenAI's first enterprise EMEA Sales Development function, including org design, hiring plan, tooling, and performance management. You will build and scale a global SDR organization aligned to Large Enterprise, Strategic Accounts, and industry verticals.

You will own the enterprise pipeline generation strategy, ensuring consistent, high-quality opportunity flow into the field. You will translate product usage, pilots, developer activity, and inbound interest into qualified enterprise opportunities.

You will create vertical-specific and account-based SDR motions for Financial Services, Life Sciences, and Retail. You will partner with Sales, Field Engineering, Marketing, Partnerships, and Strategy & Ops to orchestrate a unified GTM front door.

You will establish best-in-class outbound, inbound, ABM, product-led, and partner-sourced playbooks. You will build a data-driven operating system that connects SDR activity to pipeline quality, deal velocity, and revenue.

You will recruit, coach, and develop front-line SDR leadership and SDRs. You will serve as a strategic partner to Sales leadership on where and how OpenAI invests to capture enterprise demand.

You may thrive in this role if you have 10+ years in enterprise sales, revenue, or GTM leadership. You should bring 3–5+ years of second-line SDR leadership building and managing managers.

You should have built enterprise demand engines from scratch in product-driven or platform businesses. You should be fluent in product-led and usage-based GTM (PQLs, pilots, free-to-paid, expansion).

You should have experience selling into regulated or high-stakes industries (FS, Life Sciences, Retail). You should be highly data-driven, with experience in pipeline analytics and forecasting.

You should thrive in matrixed GTM organizations spanning Sales, Product, Marketing, and Partnerships. You should be a strong talent builder with the presence to engage senior enterprise and CRO-level stakeholders.

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The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

The Stargate team is responsible for building the physical infrastructure that powers large-scale AI systems. We design and deliver next-generation data centers optimized for dense compute clusters, advanced networking, and rapidly evolving hardware platforms.

About the Role

We are seeking a CPU & Storage Technical Lead to define and drive the server compute and storage architecture strategy for Stargate infrastructure.

In this role, you will own technical direction across CPU platforms, memory configurations, local and disaggregated storage systems, and their integration into large-scale AI clusters. You will evaluate vendor roadmaps, lead platform tradeoff decisions, and ensure compute and storage systems are optimized for training, inference, and supporting services.

Key Responsibilities

• Own CPU and storage technical strategy for Stargate compute infrastructure across current and future generations.

• Evaluate CPU platforms across performance, efficiency, memory bandwidth, PCIe topology, cost, and roadmap alignment.

• Define storage architectures for AI environments, including boot media, local NVMe, shared storage, caching tiers, metadata services, and high-performance data pipelines.

• Drive server platform decisions involving CPU, memory, NIC, GPU, and storage subsystem integration.

• Partner with performance modeling teams to quantify tradeoffs across compute, memory, I/O, and storage bottlenecks.

• Work with silicon and hardware vendors on roadmap influence, feature requests, qualification plans, and technical escalations.

• Lead bring-up and validation efforts for new CPU and storage platforms in lab and production environments.

• Partner with networking and cluster architecture teams to optimize end-to-end node design and data movement.

• Support supply chain and sourcing teams with technical vendor assessments and second-source strategies.

• Drive reliability, serviceability, and fleet lifecycle planning for compute and storage platforms.

• Translate future AI workload requirements into infrastructure platform specifications.

• Provide technical leadership across cross-functional stakeholders and executive reviews.

Qualifications

• Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related technical field; advanced degree preferred.

• 10+ years of experience in server hardware, systems architecture, data center infrastructure, or hyperscale compute platforms.

• Deep expertise in modern CPU architectures (x86, ARM, accelerator host systems) and server platform design.

• Strong understanding of memory systems, PCIe/CXL fabrics, NUMA behavior, and platform-level performance constraints.

• Experience with storage systems including NVMe, SSD qualification, RAID, distributed storage, object/file systems, or high-performance data pipelines.

• Experience evaluating hardware tradeoffs across performance, cost, power, thermals, and supply availability.

• Familiarity with GPU clusters and AI training/inference infrastructure strongly preferred.

• Experience working directly with OEMs, ODMs, silicon vendors, or storage vendors.

• Strong systems thinking with ability to connect component decisions to fleet-level outcomes.

• Excellent communication skills with the ability to influence engineering and executive stakeholders.

• Proven ability to operate in fast-moving, ambiguous environments with high ownership.

Preferred Skills

• Experience designing infrastructure for large-scale AI or HPC environments.

• Familiarity with CPU vendor roadmaps across AMD, Intel, and ARM ecosystems.

• Experience with distributed storage architectures supporting GPU clusters.

• Knowledge of fleet operations, hardware lifecycle management, and production deployments at scale.

• Prior experience in hyperscale cloud, AI infrastructure, or advanced compute environments.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.

For additional information, please see [OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement](https://cdn.openai.com/policies/eeo-policy-statement.pdf).

Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County

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The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The salary range is $239K – $265K, with offers of equity included. Total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and various benefits.

Benefits

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
• 401(k) retirement plan with employer match
• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
• Mental health and wellness support
• Employer-paid basic life and disability coverage
• Annual learning and development stipend to fuel your professional growth
• Daily meals in our offices, and meal delivery credits as eligible
• Relocation support for eligible employees
• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

OpenAI's mission is to build safe artificial general intelligence (AGI) which benefits all of humanity. Our Go To Market (GTM) team is responsible for helping customers learn how to leverage and deploy our highly capable AI products across their business.

About the Role

As a GTM Strategy & Operations Lead, you'll play a critical role in guiding the GTM strategy and driving the operational efficiency to accomplish this mission. You will work at the intersection of inbound process improvement, outbound motion design, and funnel health reporting to ensure our sales teams are set up for success.

Responsibilities

• Improve lead enrichment, scoring, grading, and routing workflows to ensure high-quality, correctly prioritized lead delivery to the right sellers.
• Partner with Systems teams to design routing criteria and workflows within CRM and marketing automation tools.
• Build and maintain reporting to track lead and pipeline progression across the full funnel , from lead to MQL to qualified opportunity.
• Diagnose pipeline creation gaps and funnel drop-offs by product, segment, region, and deal size.
• Support design on pipeline targets to ensure sufficient coverage against targets
• Partner with Sales, Marketing, and Enablement teams to design structured outbound programs that drive prospecting effectiveness. Define program objectives, target account criteria, messaging strategies, enablement needs, and incentives.

Requirements

• Experience in BDR/SDR strategy & operations, top of funnel, sales programs, revenue operations or strategy at a high-growth, technology company.
• Proficiency in Salesforce.com and data analysis tools (e.g., SQL, Excel).
• Strong analytical skills with a focus on attention to detail.
• Exceptional project management skills, with experience leading complex, cross-functional initiatives.
• Strong communication skills and executive presence.
• An understanding of the AI landscape, our applications, and the problems they solve for our customers.
• The ability to thrive in ambiguity and work autonomously.
• Exceptional organizational skills.
• The ability to operate with high horsepower, be adept at frequent context switching and working on multiple projects at once with expansive ownership, and ruthless prioritization.

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You will lead the technical relationship for post-sale customers and act as their trusted advisor on deployment, adoption, and value realization. You will own account health, adoption velocity, and ongoing technical deployment and success across your portfolio.

You will conduct technical enablement and configuration sessions across our broad product portfolio. You will identify and validate use cases by embedding with customer teams to understand workflows and pain points.

You will lead account level coordination across multiple workstreams, including new product activation, change management, and customer rollout and deployment planning. You will build strong relationships with executive sponsors and technical stakeholders and help align business goals with OpenAI capabilities.

You will translate customer objectives into an actionable adoption roadmap with clear sequencing, milestones, and KPIs. You will partner with Solutions Architecture, Product, Engineering and Research by surfacing customer feedback, field patterns, and technical blockers and act as a cross functional navigator who keeps teams aligned, informed, and moving toward customer outcomes.

You will guide value realization and measure impact through baselines, KPI definition, and post deployment reporting. You will facilitate workshops on use case design, adoption best practices, champion building, and internal enablement.

You will help drive expansions by identifying high leverage opportunities where OpenAI's platform can power new workflows or lines of business. You will serve as the technical advisor for existing customer implementations by guiding and optimizing account setup, configuration, etc.

As an AI Success Engineer, you will thrive in this role if you have 8+ years of experience in technical customer facing roles such as technical account management, technical GenAI consulting, solutions architecture, technical delivery leadership, or deep technical enterprise SaaS adoption work.

You will have deep, hands-on knowledge of OpenAI product capabilities, APIs, SDKs, connectors, and common integration patterns and be able to explain model behavior, limitations, technical tradeoffs, embeddings, retrieval augmentation, and approaches to fine-tuning or custom model usage.

You will be able to translate technical concepts into clear business language and help customers understand the strategic impact of AI technologies. You will be comfortable embedding with customers to map workflows, identify requirements, and diagnose adoption challenges.

You will have excellent project and program management instincts and be able to lead multi workstream initiatives with clarity and structure. You will enjoy being a thought partner for C level stakeholders while also diving deep with technical teams.

You will operate with high ownership and be able to manage fast decision making, context switching, and dynamic customer needs. You will have a strong record of driving technical deployments with hands-on on customer work and owning impactful adoption and value for large enterprise customers with complex environments and multiple stakeholders.

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OpenAI's AI Success Engineer team partners with the world's most ambitious organisations to translate cutting-edge AI into real business value. We guide customers from first deployment through scaled enterprise adoption. Our work spans technical integration and enablement, workflow transformation, and sustained program and product delivery.

Our customers range from fast-growing digital natives to the largest global enterprises, government agencies, and educational institutions. Every engagement is an opportunity to shape how AI changes work, productivity, and innovation. This role sits at the centre of that mission.

About the Role

The Success Engineer role is the primary post-sales point of contact for a set of OpenAI's most important customers. You are responsible for driving account health and adoption, ensuring technical readiness, identifying new use cases, and delivering measurable value to our customers with OpenAI's platform.

This role blends technical leadership, program management, customer advisory, and product influence. You will partner deeply with customer teams, map workflows, lead configuration and enablement, oversee deployment plans, and guide customers toward high-impact use cases that showcase the full value of our platform.

You will work closely with Sales, Solutions Architecture, Product, and Research to ensure the customer experience is connected and successful across every touchpoint. Success in this role means accelerating adoption, increasing customer activation depth, guiding strategic use cases that get to production, and helping customers demonstrate tangible business impact.

In this role, you will:

• Lead the technical relationship for post-sale customers and act as their trusted advisor on deployment, adoption, and value realisation.
• Own account health, adoption velocity, and ongoing technical deployment and success across your portfolio.
• Conduct technical enablement and configuration sessions across our broad product portfolio.
• Identify and validate use cases by embedding with customer teams to understand workflows and pain points.
• Lead account-level coordination across multiple workstreams, including new product activation, change management, and customer rollout and deployment planning.
• Build strong relationships with executive sponsors and technical stakeholders and help align business goals with OpenAI capabilities.
• Translate customer objectives into an actionable adoption roadmap with clear sequencing, milestones, and KPIs.
• Partner with Solutions Architecture, Product, Engineering, and Research by surfacing customer feedback, field patterns, and technical blockers and act as a cross-functional navigator who keeps teams aligned, informed, and moving toward customer outcomes.
• Guide value realisation and measure impact through baselines, KPI definition, and post-deployment reporting.
• Facilitate workshops on use case design, adoption best practices, champion building, and internal enablement.
• Help drive expansions by identifying high-leverage opportunities where OpenAI's platform can power new workflows or lines of business.
• Serve as the technical advisor for existing customer implementations by guiding and optimising account setup, configuration, etc.

You'll thrive in this role if you:

• 8+ years of experience in technical customer-facing roles such as technical account management, technical GenAI consulting, solutions architecture, technical delivery leadership, or deep technical enterprise SaaS adoption work.
• Deep, hands-on knowledge of OpenAI product capabilities, APIs, SDKs, connectors, and common integration patterns and able to explain model behaviour, limitations, technical trade-offs, embeddings, retrieval augmentation, and approaches to fine-tuning or custom model usage.
• Can translate technical concepts into clear business language and help customers understand the strategic impact of AI technologies.
• Are comfortable embedding with customers to map workflows, identify requirements, and diagnose adoption challenges.
• Have excellent project and program management instincts and can lead multi-workstream initiatives with clarity and structure.
• Enjoy being a thought partner for C-level stakeholders while also diving deep with technical teams.
• Operate with high ownership and can manage fast decision-making, context switching, and dynamic customer needs.
• Have a strong record of driving technical deployments with hands-on customer work and owning impactful adoption and value for large enterprise customers with complex environments and multiple stakeholders.

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Salary Range: $150,000–$200,000/year (Range shown is for U.S.-based employees in San Francisco, CA. Compensation outside the U.S. is adjusted fairly based on your country's cost of living.)

Equity Range: Up to 0.1%

Location: San Francisco, CA or Remote (Americas, UTC-3 to UTC-10)

Job Type: Full-Time

Experience: 3+ years in developer relations, technical content, or software engineering with a content track record

Visa: US Citizenship/Visa required for SF; open for Remote

About Firecrawl

Firecrawl is the easiest way to extract data from the web. Developers use us to reliably convert URLs into LLM-ready markdown or structured data with a single API call. In just over a year, we've hit 8 figures in ARR and 100k+ GitHub stars by building the fastest way for developers to get clean, structured web data.

We're a small, fast-moving, technical team building essential infrastructure for the AI era. We ship fast and deep.

What You'll Do

• Own Firecrawl's technical documentation , rewriting, restructuring, and maintaining docs so both humans and AI agents can discover and use the product effectively

• Run and grow our YouTube channel , scripting, filming, editing, and publishing a consistent cadence of tutorials, walkthroughs, and demos developers actually finish watching

• Build a presence in the AI engineering and open source community , on social, at conferences, in Discord servers, in the places developers actually hang out

• Translate developer feedback into product insights and route them clearly to engineering

• Create content that drives adoption , not just views , by meeting developers where they are in the build process

• Show up on camera and on stage: conference talks, livestreams, Twitter Spaces, wherever our developers are

What We're Looking For

An engineer who can teach. You have a software engineering background and have built with APIs, SDKs, or developer tools. You know what it feels like to hit a wall in someone else's docs , and you know how to fix it.

A YouTube operator. You've owned a technical YouTube channel before , not just appeared in videos. You know the full workflow: scripting for retention, filming efficiently, editing for technical audiences, and building a publishing cadence that doesn't collapse under pressure.

Fluent in the AI/ML developer ecosystem. Agents, LLM tooling, orchestration frameworks, RAG pipelines , you speak this language and you've built in it. You understand where Firecrawl fits and why developers reach for it.

Thinks about docs as infrastructure. You understand that in an agent-first world, documentation needs to be structured for machines as much as humans. You have opinions about how to do that.

Community-connected. You have real relationships in the AI engineering or open source world , not just followers. You can open doors for Firecrawl that cold outreach can't.

Backgrounds that often do well: DevRel at an API-first or developer tools company, software engineer who started a technical YouTube channel, open source contributor with a content track record.

What We're NOT Looking For

• Content marketers who have never shipped code

• People who measure DevRel success in video views over developer adoption

• Anyone waiting for a content calendar to be handed to them before they start creating

A Note On Pace

We're a small team doing a lot. Roles here are loosely defined on purpose , you'll own things that don't have a clear owner yet, and that's a feature, not a bug. If you need your scope fully defined before you can move, this probably isn't the right fit. If you want to build something that matters inside one of the fastest-growing AI infrastructure companies in the world, let's talk.

Benefits & Perks

Available to all employees

Salary that makes sense , $150,000–$200,000/year (SF, U.S.-based), based on impact, not tenure

Own a piece , Up to 0.1% equity in what you're helping build

Generous PTO , 15 days mandatory, anything after 24 days, just ask (holidays excluded); take the time you need to recharge

Parental leave , 12 weeks fully paid, for moms and dads

Wellness stipend , $100/month for the gym, therapy, massages, or whatever keeps you human

Learning & Development , Expense up to $1,000/year toward anything that helps you grow professionally

Team offsites , A change of scenery, minus the trust falls

Sabbatical , 3 paid months off after 4 years, do something fun and new

Available to US-based full-time employees

Full coverage, no red tape , Medical, dental, and vision (100% for employees, 50% for spouse/kids) , no weird loopholes, just care that works

Life & Disability insurance , Employer-paid short-term disability, long-term disability, and life insurance , coverage for life's curveballs

Supplemental options , Optional accident, critical illness, hospital indemnity, and voluntary life insurance for extra peace of mind

Doctegrity telehealth , Talk to a doctor from your couch

401(k) plan , Retirement might be a ways off, but future-you will thank you

Pre-tax benefits , Access to FSAs and commuter benefits (US-only) to help your wallet out a bit

Pet insurance , Because fur babies are family too

Available to SF-based employees

SF HQ perks , Snacks, drinks, team lunches, intense ping pong, and peak startup energy

E-Bike transportation , A loaner electric bike to get you around the city, on us

Interview Process

Application Review , Send us your work: a YouTube channel you've grown, docs you've owned, or technical content you've created. A quick note on what you'd fix about Firecrawl's docs or content today.

Intro Chat (~20 min) , Quick alignment call. We'll talk about what you've built, how you think about developer education, and what you'd tackle first.

Deep Dive Chat (~45 min) , Walk us through a real example: a piece of content or docs work that measurably grew developer adoption. Then a live scenario , how would you approach rewriting Firecrawl's docs for an agent-first world?

Founder Chat (~30 min) , Culture, pace, ownership, and how you like to work. Time for your questions too.

Paid Work Trial (1–2 weeks) , Build something real: a tutorial, a doc rewrite, or a short-form video. We evaluate on technical accuracy, clarity, and whether a developer would actually use it.

Decision , We move fast after the trial.

If you want to be the voice developers learn Firecrawl from , and you have the engineering chops and content track record to back it up , this is your shot.

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$120K – $220K • 0.01% – 0.1%

Senior Product Growth Engineer

Firecrawl's Product Growth team runs like an engineering org. Every initiative we take on (activation flows, conversion landing pages, in-product surfaces, internal tooling) is shipped as real software by the people on this team. The backlog is long and most of it is bottlenecked on engineering capacity, not ideas.

We need a senior full-stack engineer who can take on growth projects end-to-end: scope the work, build the frontend and backend, ship it to production, and iterate. Someone who can work across the stack at speed and own ambitious projects without needing a PM to break them down. This is a high-output IC role. You'll work directly with the Head of Product Growth on priorities, build alongside the team's data and growth engineers, and have direct access to core engineering for anything that needs coordination.

Scope note: top-of-funnel work (brand, SEO content, broad marketing site) lives with the Marketing team. Your work lives closer to conversion: the pages, flows, and in-product surfaces where interested users turn into active, paying customers.

Salary Range:

120,000 to 200,000/year OTE (Range shown is for U.S.-based employees in San Francisco, CA. Compensation outside the U.S. is adjusted fairly based on your country's cost of living. You can explore how we calculate this here: https://www.firecrawl.dev/careers/compensation)

Equity Range:

0.01 to 0.10%

Job Type:

Full-Time (SF) or Contract (Remote)

Experience:

5+ years

Visa:

US Citizenship/Visa required for SF; N/A for Remote

About Firecrawl

Firecrawl is the easiest way to extract data from the web. Developers use us to reliably convert URLs into LLM-ready markdown or structured data with a single API call. In just a year, we've hit 8 figures in ARR and 90k+ GitHub stars by building the fastest way for developers to get LLM-ready data.

We're a small, fast-moving, technical team building essential infrastructure super-intelligence will use to gather data on the web. We ship fast and deep.

What You'll Do

• Own growth projects end-to-end: Scope the work, write the frontend and backend, ship to production, and iterate based on what the data says. Move in days and weeks, not quarters.

• Build in-product growth features: Ship the onboarding, activation, retention, and expansion surfaces that turn signups into paying customers: usage dashboards, contextual upgrade prompts, feature discovery, guidance states.

• Improve the playground: Our highest-leverage conversion surface. Make it faster, smarter, and easier for a developer to go from "trying it" to "using it."

• Ship conversion landing pages: Own the pages closest to conversion: partner integrations, competitive comparisons, use cases, campaign pages. Full stack: component, copy scaffolding, data layer, and the API endpoints behind anything interactive.

• Build internal tooling: Ship the UIs the Product Growth team uses to operate: customer dashboards, outreach interfaces, manifest views, triage tools. Turn repeatable manual work into software.

• Run experiments and measure: Instrument what you build. Run real A/B tests. Know whether the thing worked before shipping the next thing.

• Improve developer experience where it touches growth: SDK ergonomics, sample code, starter templates, first-run experiences. The surfaces where activation lives or dies.

What We're Looking For

Strong full-stack engineer. You ship production code across React, TypeScript, Next.js, and Node. You're comfortable in Python and SQL too. You've owned real features end-to-end, not just frontends or just APIs.

Product-minded with taste. You can look at a flow or a page and tell what's broken before the data does. You care about the details, and you can shape what you're building without needing a spec handed to you.

Growth-oriented. You think in funnels, activation curves, and conversion rates. You want to know how your work moved the number, not just whether it shipped. You instrument everything.

AI-native. You already use AI tools daily as core work infrastructure. You've pushed Claude, Copilot, or similar tools far enough to know where they help and where they don't. You use them to ship more, faster.

Fast and scrappy. You ship working versions, not perfect plans. You know when a one-off script is better than a framework and when a quick fix is better than an abstraction. You'd rather ship four experiments this week than one polished feature next month.

Clear communicator. You can explain what you built and why to non-technical teammates. You write good PR descriptions and document what's worth documenting.

Bonus Points

• You've shipped in-product growth features at a developer-tools or SaaS company: onboarding, activation, upgrade surfaces, in-product guidance.

• You've built conversion landing pages that measurably moved signup or activation, not just static pages that shipped.

• You've built internal tools that the team you worked with actually used every day.

• You've run real A/B tests and can talk about what you learned, not just what you shipped.

• Experience with our stack: Next.js, React, Tailwind, TypeScript, Vercel, PostgreSQL, Anthropic Claude API.

• You've built with LLMs in production: prompt engineering, tool use, inference pipelines.

• You've worked on developer-facing products: SDKs, playgrounds, docs surfaces, APIs.

• You know what "scaling chaos" feels like at a company doing 5M-50M ARR.

What it Means to Join Firecrawl

• Ship the Growth Number: The surfaces you build are how Firecrawl activates, expands, and retains customers. Every feature is a lever, and the impact is visible.

• High Leverage: One well-built flow can move activation by double-digit percentages. Your work is measurable and shipped to every user.

• Autonomy: Own your work. We care about outcomes, not hours. Ship what matters, skip what doesn't.

• Growth Path: Start as the senior IC. As the team grows, you'll have the option to lead engineers or go deeper technically.

• Remote-First Culture: Collaborate from anywhere, or work out of our SF HQ.

Benefits & Perks

Available to all employees

• Generous PTO: 15 days mandatory, anything after 24 days, just ask (holidays excluded); take the time you need to recharge

• Parental leave: 12 weeks fully paid, for moms and dads

• Wellness stipend: 100/month for the gym, therapy, massages, or whatever keeps you human

• Learning & Development: Expense up to 150/year toward anything that helps you grow professionally

• Team offsites: A change of scenery, minus the trust falls

• Sabbatical: 3 paid months off after 4 years, do something fun and new

Available to US-based full-time employees

• Full coverage, no red tape: Medical, dental, and vision (100% for employees, 50% for spouse/kids), no weird loopholes, just care that works

• Life & Disability insurance: Employer-paid short-term disability, long-term disability, and life insurance

• Supplemental options: Optional accident, critical illness, hospital indemnity, and voluntary life insurance for extra peace of mind

• Doctegrity telehealth: Talk to a doctor from your couch

• 401(k) plan: Retirement might be a ways off, but future-you will thank you

• Pre-tax benefits: Access to FSAs and commuter benefits (US-only) to help your wallet out a bit

• Pet insurance: Because fur babies are family too

Available to SF-based employees

• SF HQ perks: Snacks, drinks, team lunches

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Key responsibilities include owning and evolving our public REST API, building and maintaining client SDKs, shipping our Agent SDK, and treating documentation as a product. The successful candidate will collaborate with our DevRel, Product, and Platform teams to identify gaps in the developer ecosystem and run with them end to end.

We offer a competitive salary range of $215,000 to $285,000 plus benefits & equity, and a chance to work with a leading AI routing and infrastructure layer.

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Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence.

This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk.

Job Overview

We are looking for an Engineering Manager to lead the FGA Developer Tooling team in India.

This team owns the end-to-end developer experience for FGA across OSS and SaaS, including SDKs in Go, JavaScript, .NET, Python, Java and other languages, the SDK generator that powers them, CLI workflows, IDE integrations, GitHub automation, developer documentation, and release strategy. All development is done in the open as open source, and we actively welcome and review community contributions.

Our guiding principle is One developer experience, many deployment models.

As an Engineering Manager, you will build and grow a high-performing team, drive execution across the developer tooling roadmap, and ensure we deliver a consistent and high-quality developer experience to both OSS and SaaS users.

Responsibilities

• Lead and grow a team of engineers responsible for FGA SDKs, the SDK generator, CLI workflows, IDE integrations, and developer automation.

• Drive execution of the Developer Tooling roadmap in partnership with Product and FGA Core, ensuring alignment across OSS and SaaS surfaces and delivering meaningful improvements to developers on a frequent and predictable cadence.

• Oversee the evolution of the SDK generator and template framework to maintain cross-language consistency, configurability, and long-term maintainability.

• Ensure consistent and high-quality implementation of SDK features including authentication flows, error handling, retry logic, rate limiting, and advanced capabilities such as BatchCheck and ListRelations.

• Establish and maintain strong engineering standards for testing, CI workflows, dependency management, release processes, and developer documentation.

• Foster a strong open-source culture by ensuring community pull requests are reviewed promptly and contributors are supported in reaching a mergeable state.

• Partner closely with FGA Core on API design and semantics to ensure a clean and developer-friendly experience across all tooling.

• Support career growth and development through regular 1:1s, coaching, feedback, and performance management.

• Recruit and hire strong engineers to build and scale the Developer Tooling team in India.

• Maintain a team culture of ownership, transparency, rigor, and psychological safety in a distributed environment.

You might be a good fit if you

• Have experience managing software engineering teams delivering SDKs, platforms, or developer tooling.

• Have a strong technical background and are comfortable going deep into architecture and design discussions across multiple languages.

• Have experience working in or contributing to open-source projects.

• Have experience managing geographically distributed teams.

• Are skilled at coaching engineers across different career stages.

• Are comfortable operating with ambiguity and helping create clarity across teams.

• Thrive in collaborative environments that require strong cross-functional alignment.

• Are a strong communicator who can work effectively with technical and non-technical stakeholders.

What you will bring to the role

• 7+ years of software engineering experience with prior experience as an Engineering Manager or Technical Lead.

• Strong understanding of SDK design, API ergonomics, authentication flows, and resilient distributed systems.

• Experience with CI/CD systems such as GitHub Actions and modern build workflows.

• Familiarity with code generation frameworks such as OpenAPI Generator and templating systems.

• Experience working in open-source development models and PR-based workflows.

• Passion for authorization, identity, and developer experience

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Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work.

Are you an experienced and driven product manager who’s passionate about securing the world’s largest organisations through a modern, cloud-first approach? Join Okta as we expand Okta’s Privileged Access Management (OPA) product,built for scale, simplicity, and seamless integration with the Okta platform. You’ll play a central role in shaping a product that protects critical infrastructure and privileged resources across cloud and hybrid environments. This is a high-impact, hands-on opportunity to collaborate cross-functionally, define strategy, and deliver a differentiated Privileged Access Management (PAM) solution at scale.

Responsibilities

• Customer & Stakeholder Engagement: Collaborate with customers, partners, and internal stakeholders including the go-to-market team to distill feature asks, gather feedback, validate use cases, and ensure product-market fit.

• Product Scope: Define and own the product strategy and roadmap for PAM capabilities across a range of systems (cloud platforms, databases, DevOps tools, and legacy infrastructure).

• Roadmap Ownership: Identify, prioritise, and drive development of new features and integrations based on market needs, customer input, and technical feasibility. Define and communicate clear product requirements, including features, user experience and functional specifications, to engineering teams.

• Technical Collaboration: Work closely with engineering and architecture teams to define connector protocols, APIs, and deployment models that align with cloud-native principles while balancing an intuitive user experience.

• Delivery & Execution: Drive cross-functional execution with design, engineering, QA, support, and documentation teams to deliver high-quality features on time.

• Market Awareness: Track industry trends and emerging technologies in order to think strategically for developing solutions that are differentiated from the competition in the Privileged Access Management space.

• Data-Driven Insights: Leverage product data to continually improve existing functionality and work across the business to drive adoption and success.

• Subject Matter Expertise: Be the subject matter expert for your product area, enabling your counterparts in marketing and technical sales with the knowledge and tools needed to effectively position Okta Privileged Access.

Required

• 5+ years of technical product management experience in enterprise-scale SaaS products, or an equivalent background demonstrating core product management competencies

• Knowledge of Privileged Access Management (PAM) protocols and concepts, including credential vaulting, session recording, just-in-time access, and/or privileged elevation

• Proven track record of delivering features or products that drive meaningful business outcomes

• Analytical and decisive with the ability to drive action even with incomplete or ambiguous information

• Excellent communication skills and ability to work cross-functionally with research, design, engineering, sales, and customer success teams

• A passion for Okta’s mission, coupled with curiosity and a drive to understand both business strategy and technical detail

• Bachelor’s degree in Computer Science, Computer Engineering, or equivalent experience

Preferred

• Domain knowledge or implementation experience with products related to privileged access management

• Hands-on technical background and prior experience in engaging deeply with technical customers and engineering

• Prior experience with building connector SDKs, APIs, or technical integrations

• Familiarity with zero trust, infrastructure-as-code, or cloud security tooling

• Advanced degree in a technical or business field

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