8bcaf6b7-774 ASIC Digital Design, Senior Staff Engineer Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Responsibilities:

Define and develop ASIC RTL design and verification at both chip level and block level. Collaborate with cross-functional teams to design, implement, and verify PCIe interfaces. Perform RTL coding, synthesis, and simulation to ensure design functionality and performance. Conduct design reviews and provide technical guidance to junior engineers. Work closely with physical design teams to ensure seamless integration and optimization. Debug and resolve design issues to ensure timely delivery of high-quality products.

Impact:

Contribute to the development of high-performance silicon chips that power next-generation technologies. Enhance the functionality and performance of Synopsys' PCIe solutions. Drive innovation and improve design methodologies within the team. Ensure the successful delivery of complex ASIC projects on time and within budget. Mentor and guide junior engineers, fostering a culture of continuous learning and development. Collaborate with cross-functional teams to deliver integrated and optimized solutions for our customers.

Requirements:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in ASIC digital design and verification. Strong knowledge of PCIe protocols and interfaces. Proficiency in RTL coding (Verilog/SystemVerilog) and simulation tools. Experience with synthesis, timing analysis, and formal verification.

Team:

Join a dynamic and collaborative team of engineers dedicated to designing and delivering high-performance silicon solutions. Our team focuses on innovation, quality, and continuous improvement, working together to solve complex technical challenges and deliver industry-leading products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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]]> full-time senior onsite $138000-$208000 ASIC digital design, RTL coding, simulation tools, synthesis, timing analysis, formal verification, PCIe protocols, interfaces, chip architecture, circuit design, verification, physical design Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys is a leading provider of electronic design automation (EDA) software and services for the semiconductor and electronics industries. https://careers.synopsys.com https://careers.synopsys.com/job/austin/asic-digital-design-senior-staff-engineer/44408/93286401456 Austin 2026-04-05 980acb3a-e35 Principal ASIC Digital Design Engineer As a Principal ASIC Digital Design Engineer, you will be responsible for designing and verifying advanced digital circuits for PAM-based SerDes PHY IP. Your expertise in high-speed serializer and data recovery circuits will position you as a key contributor to the next generation of PAM-based SerDes products.

What you'll do

  • Designing and verifying advanced digital circuits for PAM-based SerDes PHY IP, ensuring robust and high-performance mixed-signal solutions.
  • Developing RTL code, modeling analog blocks, and crafting complex system-level testbenches in Verilog to validate functionality and performance.

What you need

  • Bachelor's or Master's degree in Electrical Engineering (BSEE or MSEE) with at least 10 years of industry experience in digital design and verification.
  • Must be familiar with Verilog and VCS. Good knowledge of back-end synthesis tools DC/PT is required
  • Must have knowledge of digital design methodologies, ATE production testing, DFT insertion, Synthesis constraints and flows

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]]> full-time senior onsite Verilog, VCS, digital design methodologies, ATE production testing, DFT insertion, Synthesis constraints and flows, RTL coding, modeling of analog blocks, writing complex system-level test-benches in Verilog, defining synthesis design constraints, resolving STA issues, gate-level simulation failures, Clock/Reset domain crossing design constraints, evaluating violations using CDC/RDC tools Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys is a leading provider of electronic design automation (EDA) software and IP solutions. The company's technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. Synopsys' solutions empower the creation of high-performance silicon chips and software content. https://careers.synopsys.com https://careers.synopsys.com/job/mississauga/asic-digital-design-principal-engineer-14687/44408/91568840256 Mississauga, Ontario, Canada 2026-03-06 4d07cae6-e76 Solutions Staff DFT Engineer We are seeking a Solutions Staff DFT Engineer to join our team. As a Solutions Staff DFT Engineer, you will be responsible for delivering comprehensive DFT solutions to customers designing digital ICs of varying complexity, from integration through silicon bring-up. You will provide technical expertise during design planning, budgeting, and implementation phases for test solutions. You will also implement and validate DFT Solutions for Scan/MBIST/1687, including architecture planning, pattern generation, silicon bring-up, and diagnostics analysis.

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]]> employee staff onsite RTL coding, DFT insertion, ATPG, IEEE standards, MBIST concepts, silicon bring-up, scan architectures, fault models, pattern generation, simulation, test access networks, scan flows Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys is a leading provider of electronic design automation (EDA) software and services. The company's technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. Synopsys' software engineers are key enablers in the world of EDA, developing and maintaining software used in chip design, verification, and manufacturing. https://careers.synopsys.com https://careers.synopsys.com/job/bengaluru/solutions-staff-dft-engineer/44408/91204625424 Bengaluru 2026-03-06 a1a2c773-6af High Speed Serdes PHY Application Engineer Opening. Our team is looking for a High Speed Serdes PHY Application Engineer to join the team. This role involves whole SOC design flow from architecture, high speed Interface IP(IIP) integration, synthesis, design for test(DFT), low power design(UPF), CDC/RDC check, static timing analysis(STA), silicon test plan, silicon bring-up and mass production silicon debug.

What you'll do

  • Work close with customers to understand new requests or customization feature from customer’s PRD/MRD
  • Provide integration training to customers and conduct reviews on their major SoC milestones
  • Provide feedback to Synopsys R&D for customization feature or continuous IIP product improvements
  • Participate in IIP design reviews to align development with future customer needs
  • Creativity and Innovation is highly inspired: such as developing small tools to simplify daily jobs or improving efficiency; authoring application notes for gate-level simulation, silicon debug and physical implementation.

What you need

  • Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science
  • Minimum 5 years of Analog or Mixed signal IP or ASIC Design/Verification/Applications experience is required
  • Hands-on experience on circuit design, RTL coding, simulation, synthesis, static timing check, equivalence check, etc.
  • Domain knowledge PCI Express, CXL, Ethernet protocols
  • Creative results are oriented with the ability to manage multiple tasks concurrently.
  • Good verbal and written communication skills in English and ability to interact with customer
  • High degree of self-motivation and personal responsibility
  • Good inference, reasoning and problem-solving skills, and attention to details

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]]> full-time mid onsite Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science, Minimum 5 years of Analog or Mixed signal IP or ASIC Design/Verification/Applications experience, Hands-on experience on circuit design, RTL coding, simulation, synthesis, static timing check, equivalence check, etc., Domain knowledge PCI Express, CXL, Ethernet protocols, Creative results are oriented with the ability to manage multiple tasks concurrently., Good verbal and written communication skills in English and ability to interact with customer, High degree of self-motivation and personal responsibility, Good inference, reasoning and problem-solving skills, and attention to details, Scripting languages (Tcl, Perl, Python, Excel VBA, etc.), Silicon debug and FPGA/hardware troubleshooting skills, Package, PCB design, SI/PI knowledge will be a plus Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys is a leading provider of electronic design automation (EDA) software and services for the global electronics industry. Our hardware engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. https://careers.synopsys.com https://careers.synopsys.com/job/shenzhen/china-high-speed-serdes-phy-application-engineer/44408/91152874992 Shenzhen 2026-02-04