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YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e14d730c-676"},"title":"Analog Design, Staff Engineer - SERDES","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.</p>\n<p><em>big_They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</em></p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>As a Staff Engineer in our Analog Design team, you will be responsible for designing and developing full custom analog circuit macros for high-speed SERDES PHY IP.</p>\n<p>Your responsibilities will include designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits.</p>\n<p>You will also collaborate with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.</p>\n<p>In addition, you will ensure analog sub-block performance adheres to SerDes standards and architecture specification documents.</p>\n<p>You will lead verification strategies using advanced simulator features to guarantee the highest quality design outcomes.</p>\n<p>You will oversee physical layout processes to minimize parasitic effects, device stress, and process variations.</p>\n<p>You will present simulation data for peer and customer reviews, and document design features and test plans.</p>\n<p>You will consult on electrical characterization and support the integration of your circuit within the SerDes IP product.</p>\n<p>You will handcraft high-performance clock and data paths using digital/CMOS logic cells and verify timing margins with SPICE and STA tools.</p>\n<p>You will address ESD and latch-up design verification, crosstalk coupling impacts, and ensure robust mixed-signal analog design.</p>\n<p>The impact you will have includes accelerating development of high-performance silicon chips critical to emerging technologies like AI, IoT, and 5G.</p>\n<p>You will optimize chip designs for power, cost, and performance, helping customers reduce project schedules by months.</p>\n<p>You will advance Synopsys&#39; leadership in high-speed interface IP and mixed-signal design innovation.</p>\n<p>You will contribute to the creation of next-generation processes and models for manufacturing advanced chips.</p>\n<p>You will support global collaboration, knowledge sharing, and technical excellence across teams and sites.</p>\n<p>You will enhance customer satisfaction by delivering reliable, scalable, and high-quality analog IP solutions.</p>\n<p>You will drive technical best practices and mentor junior engineers, strengthening the team&#39;s capabilities.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_e14d730c-676","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/analog-design-staff-engineer-serdes/44408/93198373952","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog transistor-level circuit design","nanometer technologies","mixed-signal analog circuit design","physical layout optimization","SPICE simulation","static timing analysis (STA)","digital/CMOS logic cells","high-performance datapath design","ESD/latch-up design verification","crosstalk coupling analysis"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:20:53.313Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog transistor-level circuit design, nanometer technologies, mixed-signal analog circuit design, physical layout optimization, SPICE simulation, static timing analysis (STA), digital/CMOS logic cells, high-performance datapath design, ESD/latch-up design verification, crosstalk coupling analysis"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5f4e85a9-296"},"title":"Staff Analog Design Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15391</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/23/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a seasoned analog design professional with a passion for pushing technology boundaries. With over a decade of hands-on experience in analog IC design, you thrive in fast-paced, collaborative environments and are motivated by technical challenges. Your expertise in Multi-Gbps NRZ &amp; PAM4 SERDES IP and familiarity with the latest FinFET and gate-all-around process nodes set you apart as a leader in the field. You are adept at translating complex SerDes standards into innovative, high-performance circuit architectures and are comfortable navigating the intricacies of transistor-level design, system-level budgeting, and analog/digital co-design.</p>\n<p>You excel at mentoring peers, sharing knowledge, and advocating for design excellence. Your strong analytical skills allow you to quickly identify architectural bottlenecks and propose effective solutions. You are detail-oriented, balancing deep technical focus with a strategic view of project goals and timelines. Communication is one of your strengths—whether presenting simulation data, documenting design features, or collaborating across multidisciplinary teams, you articulate complex ideas clearly to both technical and non-technical audiences.</p>\n<p>Beyond your technical expertise, you are committed to continuous learning and growth, staying abreast of industry trends and emerging technologies. You value diversity and inclusion, recognizing that great ideas come from a variety of perspectives. Your proactive and adaptable approach ensures you thrive in dynamic, innovative environments where your contributions drive meaningful impact.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.</li>\n</ul>\n<ul>\n<li>Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.</li>\n</ul>\n<ul>\n<li>Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.</li>\n</ul>\n<ul>\n<li>Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.</li>\n</ul>\n<ul>\n<li>Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews.</li>\n</ul>\n<ul>\n<li>Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements.</li>\n</ul>\n<ul>\n<li>Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Drive innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions.</li>\n</ul>\n<ul>\n<li>Shape the architectural direction of SERDES IP, influencing industry standards and future product offerings.</li>\n</ul>\n<ul>\n<li>Enhance the performance, power efficiency, and reliability of Synopsys’ silicon IP portfolio.</li>\n</ul>\n<ul>\n<li>Mentor and elevate the technical capabilities of team members, fostering a culture of excellence and continuous learning.</li>\n</ul>\n<ul>\n<li>Directly contribute to successful customer deployments by addressing post-silicon challenges and ensuring robust field performance.</li>\n</ul>\n<ul>\n<li>Strengthen Synopsys’ market leadership in advanced process nodes and high-speed communication technologies.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).</li>\n</ul>\n<ul>\n<li>Proven expertise with FinFET technologies and CMOS tape-outs.</li>\n</ul>\n<ul>\n<li>Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.</li>\n</ul>\n<ul>\n<li>Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).</li>\n</ul>\n<ul>\n<li>Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.</li>\n</ul>\n<ul>\n<li>Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).</li>\n</ul>\n<ul>\n<li>Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.</li>\n</ul>\n<ul>\n<li>Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.</li>\n</ul>\n<ul>\n<li>Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).</li>\n</ul>\n<ul>\n<li>Excellent communication and documentation skills.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Collaborative and open-minded, eager to share knowledge and learn from others.</li>\n</ul>\n<ul>\n<li>Detail-oriented and thorough, with a commitment to delivering high-quality results.</li>\n</ul>\n<ul>\n<li>Analytical thinker with strong problem-solving abilities and a proactive approach.</li>\n</ul>\n<ul>\n<li>Excellent communicator, able to convey complex technical concepts clearly.</li>\n</ul>\n<ul>\n<li>Adaptable and resilient in fast-paced, dynamic environments.</li>\n</ul>\n<ul>\n<li>Committed to fostering an inclusive, innovative, and supportive workplace.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a world-class analog and mixed-signal R&amp;D team at Synopsys, working alongside experts in high-speed IC design, verification, and CAD tool development. The team is collaborative, diverse, and passionate about innovation, with a focus on developing cutting-edge SERDES IP for advanced process nodes. You’ll have access to best-in-class design tools, mentorship, and opportunities for professional growth as you help shape the future of connectivity technology.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>What is it like to be an Analog Design Engineer at Synopsys?</p>\n<p>Arman Shahmuradyan</p>\n<p>Analog Design, Manager</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and patern</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5f4e85a9-296","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/staff-analog-design-engineer/44408/92076328848","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","FinFET technologies","CMOS tape-outs","Multi-Gbps high-speed designs","SERDES architectures","analog/digital co-design","calibration","adaptation","timing handoff","ESD protection","custom digital design","design for reliability","schematic entry","physical layout","design verification tools","SPICE simulators","scripting languages","system-level budgeting","signal integrity"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:05:32.632Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad, Telangana, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, FinFET technologies, CMOS tape-outs, Multi-Gbps high-speed designs, SERDES architectures, analog/digital co-design, calibration, adaptation, timing handoff, ESD protection, custom digital design, design for reliability, schematic entry, physical layout, design verification tools, SPICE simulators, scripting languages, system-level budgeting, signal integrity"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e6121398-141"},"title":"Applications Engineering, Sr Staff Engineer - RedHawk","description":"<p>We are seeking a highly skilled Applications Engineer to join our team in Zhubei, Taiwan. As a key member of our Applications Engineering team, you will be responsible for providing technical support and training to customers and channel partners.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Providing world-class support to customers and channel partners, ensuring effective usage and satisfaction with Apache BU simulation products focused on Power, Power Integrity, and Reliability.</li>\n<li>Applying advanced knowledge in custom circuit analysis, RTL design, high-performance VLSI design, standard cell physical layout, power-grid extraction, timing analysis, noise analysis, and voltage drop effects to solve complex SoC challenges.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Bachelor’s degree in Electrical Engineering (BSEE) with at least 6 years of experience, Master’s degree (MSEE) with 4 years, or PhD with 2 years in VLSI design.</li>\n<li>Expertise in custom circuit analysis, standard cell physical layout, timing and noise analysis, and voltage drop effects using CAD tools.</li>\n<li>Strong technical knowledge of EDA tools for layout, STA, Extraction (SPEF/DSPF), and Spice simulation.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_e6121398-141","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/zhubei/applications-engineering-sr-staff-engineer-redhawk/44408/92423913664","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["custom circuit analysis","standard cell physical layout","timing and noise analysis","voltage drop effects"],"x-skills-preferred":["EDA tools","layout","STA","Extraction","Spice simulation"],"datePosted":"2026-03-06T07:36:26.166Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Zhubei, Taiwan"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"custom circuit analysis, standard cell physical layout, timing and noise analysis, voltage drop effects, EDA tools, layout, STA, Extraction, Spice simulation"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_a010ce93-7a9"},"title":"Applications Engineering, Sr Engineer Totem","description":"<p>We are seeking a highly skilled Applications Engineer to join our team in Zhubei, Taiwan. As a key member of our Customer Application Services team, you will provide expert support and training to customers on Totem and related Semiconductor Business Unit simulation products.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Provide expert support and training to customers on Totem and related Semiconductor Business Unit simulation products, ensuring high productivity and satisfaction.</li>\n<li>Independently coordinate and manage support for multiple customer designs through tape-out, verifying design quality and compliance with expectations.</li>\n<li>Apply advanced knowledge in analog circuit analysis, VLSI design, power-grid extraction, noise analysis, and ESD to solve complex SoC challenges.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Bachelor&#39;s or Master&#39;s degree in Electrical Engineering (BSEE/MSEE) with at least 3 years of relevant experience.</li>\n<li>Advanced expertise in custom circuit analysis &amp; design, physical layout, noise analysis, voltage drop effects, and ESD using CAD tools.</li>\n<li>Strong technical knowledge of EDA tools, especially for layout and analog circuit extraction (SPEF/DSPF).</li>\n<li>Proficiency in UNIX operating systems and scripting languages such as Perl, Tcl, or Python for troubleshooting and utility development.</li>\n<li>Excellent verbal and written communication skills in both English and Mandarin, with the ability to convey complex concepts clearly.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_a010ce93-7a9","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/zhubei/applications-engineering-sr-engineer-totem/44408/90398128240","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["custom circuit analysis & design","physical layout","noise analysis","voltage drop effects","ESD"],"x-skills-preferred":["UNIX operating systems","scripting languages","EDA tools"],"datePosted":"2026-03-06T07:33:28.198Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Zhubei, Taiwan"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"custom circuit analysis & design, physical layout, noise analysis, voltage drop effects, ESD, UNIX operating systems, scripting languages, EDA tools"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_83f45538-d2c"},"title":"Analog Design, Sr Staff Engineer","description":"<p>Opening. This role is responsible for driving innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions. 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