{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/phys"},"x-facet":{"type":"skill","slug":"phys","display":"Phys","count":100},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8ec12b93-253"},"title":"Research and Development Specialist II 3rd Shift","description":"<p>At Bayer, we&#39;re seeking a Research and Development Specialist II to join our team in Ankeny, Iowa. This role will involve identifying and validating molecular targets that play a key role in plant pathology, yield, and nutrition. You will analyze and identify the biological, chemical, and genetic properties of plants, and study molecular biology, cell biology, plant genetics, plant physiology, biochemistry, and/or microbiology as input to the discovery of new plant cultivars or agricultural methods.</p>\n<p>In this Production Genotyping role, you will execute high-throughput genotyping activities in close collaboration with lab team members to ensure timely delivery of high-quality data, consistently achieve daily and weekly KPI targets, and drive process and system improvements while maintaining strict adherence to safety, quality, and compliance requirements. You will also operate, troubleshoot, and maintain laboratory automation systems as part of a dynamic, innovation-driven R&amp;D environment.</p>\n<p>Your primary responsibilities will include:</p>\n<ul>\n<li>Meeting daily and weekly genotyping objectives while consistently delivering high-quality data</li>\n<li>Managing and operating specialized high-throughput laboratory and automation technologies, including troubleshooting and routine maintenance</li>\n<li>Participating in cross-functional work across multiple platforms and process areas to support end-to-end genotyping workflows</li>\n<li>Solving technical and operational challenges, enhancing workflow efficiency and driving continuous improvement in lab processes</li>\n<li>Designing and conducting experiments, applying specialized scientific techniques and multiple data sources to validate methods and improve processes</li>\n<li>Adhering to established protocols while operating complex instrumentation, using deductive reasoning to resolve issues within sophisticated laboratory technologies</li>\n<li>Prioritizing and coordinating tasks within a large team, providing training and guidance to colleagues, and maintaining comprehensive records and documentation in digital and paper systems</li>\n<li>Championing a strong safety culture by following and reinforcing best practices, protocols, and compliance requirements in all lab activities</li>\n</ul>\n<p>To be successful in this role, you will need to possess a Bachelor&#39;s or Master&#39;s degree in biology, chemistry, engineering, or another life science field. You will also need to have proficiency in digital technologies, including data analysis and visualization tools, and experience with computerized workflow tracking systems. Additionally, you will need to have experience in experimental design and execution, with familiarity in high-throughput laboratory automation and mechanical aptitude for operating and troubleshooting automated systems.</p>\n<p>Preferred qualifications include at least one year of experience in a high-throughput TaqMan genotyping or production environment, expertise in leveraging data for decision-making, and experience in troubleshooting and maintaining laboratory instrumentation. You will also need to have excellent verbal and written communication skills, with proven problem-solving skills in a collaborative, team-oriented environment.</p>\n<p>This is a full-time position, and you will be expected to work a standard Monday-Friday schedule, with occasional overtime as needed. You will be paid a salary between $60,000.00 and $90,000.00, with additional compensation possible through bonuses or commissions. You will also be eligible for a range of benefits, including health care, vision, dental, retirement, PTO, and sick leave.</p>\n<p>If you are a motivated and detail-oriented individual with a passion for research and development, we encourage you to apply for this exciting opportunity.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8ec12b93-253","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Bayer","sameAs":"https://talent.bayer.com","logo":"https://logos.yubhub.co/talent.bayer.com.png"},"x-apply-url":"https://talent.bayer.com/careers/job/562949976999219","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$60,000.00 to $90,000.00","x-skills-required":["molecular biology","cell biology","plant genetics","plant physiology","biochemistry","microbiology","high-throughput genotyping","laboratory automation","data analysis","visualization tools","computerized workflow tracking systems"],"x-skills-preferred":["TaqMan genotyping","production environment","data-driven decision-making","laboratory instrumentation","troubleshooting","mechanical aptitude"],"datePosted":"2026-04-24T14:20:02.863Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ankeny"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Manufacturing","skills":"molecular biology, cell biology, plant genetics, plant physiology, biochemistry, microbiology, high-throughput genotyping, laboratory automation, data analysis, visualization tools, computerized workflow tracking systems, TaqMan genotyping, production environment, data-driven decision-making, laboratory instrumentation, troubleshooting, mechanical aptitude","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":60000,"maxValue":90000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_f0c71715-f9b"},"title":"R&D Engineering, Staff Engineer","description":"<p>You are a highly skilled and passionate engineer, eager to make a tangible impact on the semiconductor industry by leveraging your expertise in design flows and customer applications. You thrive in collaborative and fast-paced environments, bringing both technical depth and adaptability to every challenge. Your ability to communicate complex ideas clearly to both technical and non-technical stakeholders makes you a trusted advisor and partner. You are committed to delivering exceptional customer experiences, always seeking innovative solutions that address client needs and drive success.</p>\n<p>With a solid foundation in ASIC design, VLSI, and CAD engineering, you continuously expand your knowledge to stay ahead of industry trends. You possess a keen analytical mind, capable of troubleshooting and resolving intricate issues efficiently. Your creative problem-solving skills and meticulous attention to detail ensure that projects are executed flawlessly from conception through completion. You enjoy mentoring others and contributing to moderately complex aspects of projects, enhancing team performance.</p>\n<p>You embrace diversity, respect different perspectives, and believe in the power of inclusion to foster innovation. Your dedication, resilience, and positive attitude enable you to thrive in dynamic environments, and you’re motivated by the opportunity to support key foundry customers and help shape the future of electronic design automation.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Managing and providing ICV runset support for key foundry partners, ensuring seamless integration and optimal performance of Synopsys products.</li>\n<li>Delivering post-sales technical expertise throughout the runset programming, implementation, and ongoing maintenance cycles.</li>\n<li>Translating detailed customer installation requirements into actionable solutions, customizing product configurations as needed.</li>\n<li>Collaborating with clients to ensure their needs are fully met and Synopsys solutions function according to specifications.</li>\n<li>Offering pre-sales technical support, contributing to sales efforts by addressing technical queries and demonstrating product capabilities.</li>\n<li>Serving as a subject matter expert in EDA tool products, guiding customers through verification, place and route, design reuse, and physical design challenges.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Enhancing customer satisfaction by delivering tailored, high-quality technical solutions and ongoing support.</li>\n<li>Driving successful adoption of Synopsys products within key foundries, solidifying long-term partnerships and business growth.</li>\n<li>Contributing to the continuous improvement of runset programming and installation processes, raising industry standards.</li>\n<li>Supporting the sales team with technical insights, helping to win new business and expand Synopsys’s market reach.</li>\n<li>Identifying opportunities for innovation and improvement in EDA tools, directly influencing product development and competitiveness.</li>\n<li>Mentoring junior team members and sharing best practices, fostering a collaborative and high-performing work environment.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Basic understanding of the design process; familiarity with Design Rule Manuals (DRM) is preferred.</li>\n<li>Strong communication skills, capable of conveying technical concepts clearly to diverse audiences.</li>\n<li>Solid grasp of ASIC design flows, VLSI, and/or CAD engineering principles.</li>\n<li>Experience or knowledge of competitive EDA tool products, with expertise in verification, place and route, design reuse, and/or physical design.</li>\n<li>Demonstrated ability to manage projects from start to completion, contributing to moderately complex aspects of technical initiatives.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Creative and resourceful problem solver, able to think outside the box and address challenges proactively.</li>\n<li>Judicious decision-maker, skilled in selecting effective methods and techniques for optimal solutions.</li>\n<li>Collaborative team player with a strong sense of ownership and accountability.</li>\n<li>Adaptable and resilient, comfortable navigating evolving priorities and customer requirements.</li>\n<li>Inclusive and respectful, valuing diverse perspectives and fostering a positive team culture.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong> You’ll join a dynamic Customer Application Services team based in Taiwan, dedicated to supporting key foundry partners and advancing Synopsys’s leadership in EDA solutions. The team is composed of experienced engineers and technical experts who collaborate closely with customers, sales, and product development groups. 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This group is dedicated to integrating and validating Synopsys&#39;s broad portfolio of IP blocks -logic, memory, interfaces, analog, security, and embedded processors into test chips at the forefront of semiconductor innovation. The team works collaboratively across architecture, RTL, circuit, and covercell disciplines to deliver robust, silicon-proven IP solutions that power next-generation products for global customers.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_524edc8e-463","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/nepean/asic-physical-design-staff-engineer-16723/44408/93743819104","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC physical design","RTL-to-GDSII flow","Static timing analysis","Physical verification","Floor planning","Synthesis","Placement and routing","Timing closure","IP integration","Test chip methodology","Advanced verification flows","CAD tools","Design Compiler","PrimeTime","IC Compiler II/FC","ICV","Calibre","RedHawk","FinFet technologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:19:07.430Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Nepean"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC physical design, RTL-to-GDSII flow, Static timing analysis, Physical verification, Floor planning, Synthesis, Placement and routing, Timing closure, IP integration, Test chip methodology, Advanced verification flows, CAD tools, Design Compiler, PrimeTime, IC Compiler II/FC, ICV, Calibre, RedHawk, FinFet technologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c8818cbe-c70"},"title":"Layout Design, Sr Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world’s most advanced chips and devices.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>You are a passionate and detail-oriented engineer with deep expertise in IC layout design, eager to contribute to the development of next-generation DDR &amp; HBM PHY IPs. Your experience in advanced process technologies equips you with a strong foundation in deep submicron effects, layout floorplanning, and physical verification. You thrive in dynamic environments, bringing a collaborative spirit and a growth mindset to every project. You value diversity and inclusion, recognizing the importance of varied perspectives in driving innovation. With a commitment to accountability, you consistently deliver quality results, demonstrating ownership and initiative in your work. Your communication skills,both verbal and written,enable you to effectively share ideas, provide feedback, and partner with cross-functional teams. You are motivated by the opportunity to work on cutting-edge technologies, always seeking to expand your knowledge and make a meaningful impact. Whether solving complex problems or optimizing layouts for performance, power, and area, you approach challenges with creativity and perseverance. You are ready to join Synopsys in shaping the future of silicon IP, contributing to products that empower customers to succeed in the Era of Smart Everything.</p>\n<p>Developing high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below) Desining layout floorplans, routing, and conducting physical verifications to ensure compliance with industry standards and internal quality requirements. Performing DRC, LVS, ERC, Antenna checks, and ensuring timely completion of verification cycles. Applying layout matching techniques and addressing ESD, latch-up, EMIR, DFM, and LEF generation issues. Collaborating closely with cross-disciplinary teams to optimize layout for performance, power, and area Troubleshooting and debugging layout challenges, continually improving methodologies and design outcomes. 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The team is dedicated to advancing technical excellence, driving customer success, and fostering innovation through domain expertise in SI/PI, EMI/EMC, and RF/Antenna simulation.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_0c721197-e79","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/manager-applications-engineering/44408/94068174448","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Electronics Simulation","HFSS","SIwave","Q3D","EMC Plus","Charge Plus","SI/PI","EMI/EMC","RF/Antenna","Multiphysics Engineering Solutions","Leadership","Mentorship","Communication","Problem-Solving","Organizational Skills","Time Management"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:02.324Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Electronics Simulation, HFSS, SIwave, Q3D, EMC Plus, Charge Plus, SI/PI, EMI/EMC, RF/Antenna, Multiphysics Engineering Solutions, Leadership, Mentorship, Communication, Problem-Solving, Organizational Skills, Time Management"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_199e305e-039"},"title":"Application Engineering, Sr Engineer","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 700 open roles</p>\n<p>Innovation Starts Here</p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Application Engineering, Sr Enginer</strong></p>\n<p>Bengaluru, Karnataka, India</p>\n<p>Save</p>\n<p><strong>Hire Type</strong> Employee<strong>Job ID</strong> 17054<strong>Date posted</strong> 04/20/2026</p>\n<p>A peek inside our office</p>\n<p>Po Popal</p>\n<p>Workplace Resources, Sr Director</p>\n<p><strong>Alternate Job Titles:</strong></p>\n<ul>\n<li>Applications Engineer – Static Timing Analysis</li>\n<li>PrimeTime Specialist</li>\n<li>STA Solutions Engineer</li>\n<li>Silicon Verification Engineer</li>\n<li>Customer Success Engineer – EDA Tools</li>\n</ul>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.</p>\n<p>Our Silicon Design &amp; Verification business is all about building high-performance silicon chips,faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance,eliminating months off their project schedules.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a seasoned engineer with a keen interest in cutting-edge semiconductor technology and a passion for delivering customer-centric solutions. With a strong background in static timing analysis, you understand the intricacies of chip design and the critical role of timing verification in successful tapeouts. You thrive on solving complex technical challenges, whether through competitive benchmarking, customer training, or advanced collaboration initiatives. Your experience with Synopsys PrimeTime sets you apart, and you’re adept at explaining technical concepts to both engineers and management audiences.</p>\n<p>You possess exceptional communication skills, enabling you to build relationships and foster trust with customers and internal teams alike. You are comfortable leading technical discussions, delivering workshops, and supporting users through the entire lifecycle of their projects. Your analytical mindset helps you dissect timing-related issues, process variations, and signal integrity challenges, ensuring that your customers achieve optimal results.</p>\n<p>As a collaborative team player, you value diverse perspectives and enjoy working across functions,including R&amp;D, marketing, and sales,to drive product enhancements and customer satisfaction. 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Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_199e305e-039","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/application-engineering-sr-enginer/44408/94212498304","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"Competitive salary and benefits package","x-skills-required":["Synopsys PrimeTime","static timing analysis","chip design","signal integrity","TCL scripting","physical design","synthesis","ECO methodologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:00.977Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Synopsys PrimeTime, static timing analysis, chip design, signal integrity, TCL scripting, physical design, synthesis, ECO methodologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_dcdf92e3-7b2"},"title":"Solutions Engineering, Sr Staff Engineer (DFT, RTL Design product Engineer)","description":"<p>At Synopsys, we drive the innovations that shape the way we live and connect. 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With at least 5 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges. Your expertise spans the entire physical design spectrum,from synthesis, place &amp; route, and clock tree synthesis (CTS) to timing optimization, static timing analysis (STA), timing closure, EMIR, and physical verification. You have experience in both block-level and full-chip floor-planning, and you’re adept at navigating timing constraints and closing timing on aggressive schedules. Your toolset includes industry-leading Synopsys solutions like Design Compiler, IC Compiler II, and PrimeTime, allowing you to deliver optimal results for high-frequency, low-power designs.</p>\n<p>Beyond your technical skills, you are a collaborative team player who communicates effectively across global teams, valuing diversity of thought and experience. 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If you are excited about contributing to leading-edge silicon design and want to make a tangible impact, Synopsys is the place for you.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Independently own and drive full RTL2GDSII physical design implementation for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.</li>\n<li>Execute synthesis, place &amp; route, clock tree synthesis (CTS), timing optimization, and static timing analysis (STA) to meet stringent performance and power targets.</li>\n<li>Perform block-level and full-chip floor-planning, physical verification, EMIR analysis, and timing closure activities.</li>\n<li>Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.</li>\n<li>Utilize and optimize Synopsys EDA tools, including Design Compiler, IC Compiler II, and PrimeTime, to deliver state-of-the-art silicon solutions.</li>\n<li>Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.</li>\n<li>Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.</li>\n<li>Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.</li>\n<li>Drive technical excellence and best practices within the team, influencing the future direction of physical design methodologies at Synopsys.</li>\n<li>Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.</li>\n<li>Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.</li>\n<li>Support strategic customer engagements and help expand Synopsys&#39; presence in the semiconductor ecosystem through successful project outcomes.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.</li>\n<li>5+ years of relevant experience in physical design, particularly in advanced technology nodes (7nm/5nm/3nm).</li>\n<li>Comprehensive hands-on experience with RTL2GDSII flows, including synthesis, place &amp; route, CTS, timing optimization, STA, EMIR, and physical verification.</li>\n<li>Proficiency with Synopsys EDA tools such as Design Compiler, IC Compiler II, and PrimeTime.</li>\n<li>Strong scripting and automation skills using Python, PERL, TCL, or similar languages.</li>\n<li>Solid understanding of timing constraints, timing closure, and floor-planning techniques for both block-level and full-chip designs.</li>\n<li>Exposure to high-frequency design and low-power design methodologies.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Proactive, self-motivated, and driven to achieve technical excellence.</li>\n<li>Exceptional problem-solving and analytical skills with a keen attention to detail.</li>\n<li>Excellent communication and interpersonal abilities, comfortable working in diverse and global teams.</li>\n<li>Collaborative team player who values knowledge sharing and mentoring others.</li>\n<li>Adaptable and open to learning new technologies and methodologies in a rapidly evolving field.</li>\n</ul>\n<p>The Team You’ll Be A Part Of: You’ll join a world-class team of physical design engineers at Synopsys, dedicated to delivering innovative system design solutions for our global customers. Our team thrives on collaboration, technical excellence, and a shared passion for pushing the boundaries of semiconductor design. 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Search Jobs Applications Engineering, Sr Staff Engineer Tokyo, Japan Apply Now Save Category Engineering Hire Type Employee Job ID 17115 Date posted 04/22/2026 Share this job Email LinkedIn X Facebook We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Role summary The Application Engineer is responsible for leveraging advanced-level engineering knowledge, architecting technology solutions and relationships to help customers solving complex engineering problems using Ansys&#39; entire software and services portfolio and offerings to support accounts with significant impact on software revenue. The role involves leading solution architecture for complex solution-focused customer engagements through presales, professional service activities. Key Duties and Responsibilities Become a recognised industry / technology expert within and outside of Synopsys. Provide senior level guidance and oversight on customers advanced technical support and solution deployment. Engage with sales and customers to position tailored services/solutions based on their business needs, leading workshops to understand as-is practices and define to-be scenarios. Select the right tools/application/technologies to address the possible to-be scenario. Engage with other technology experts (technical architects in the application engineering organisation, Product Dev/Mgt. etc.) to understand/assess tech maturity, risks, limitations etc. for different possibilities and finalise the to-be approach (solution) to be delivered. Collaborate with technology experts to build consensus around the designed architecture of the technical solution and relevant best practices to promote consistency and reuse. Create services/solution value proposition (in partnership with sales, other stakeholders) and manage objection handling (technical aspects) Be the main technical point of contact throughout the project lifecycle. Learning continuously, adapting and communicating to internal and external stakeholders. Engage and guide other application engineering experts (technical architects) with clear requirements for them to deliver their parts. Engage with Product teams (R&amp;D, Product Management) as needed for successful solution design and development. Define an adoption strategy, guide the customer and support other Synopsys stakeholders (account executives, PMO and Account team) Discover, execute, and deliver new/additional solution value. Take ownership of the tech stack delivery to our primary strategic customers. Lead customer engagement and project with across the teams/function and beyond regions Minimum Education/Certification Requirements and Experience Required education and degree type: Bachelors, Master or PhD in Mechanical/Chemical/Aerospace/Electrical Engineering/Computer Science or a related field. Required minimum years of professional experience in an engineering environment: 12 years for Bachelors, 10 years for Masters or 7 years for PhD Demonstrated use of relevant Ansys software or knowledge of other commercial CAE, CAD, EDA, PLM, SPDM software packages. Subject matter expert in one or more relevant disciplines within Synopsys&#39; business and is/will be sought out for advice by other Synopsys engineers Demonstrated understanding of enterprise system architecture and its deployment flow Deep experience in industry-specific engineering workflows Good documentation skills to describe and review the architecture documents, statement of work etc. Track record of delivering exceptional customer outcomes and revenue impact. Strong leadership and mentoring skills entail negotiating with stakeholders, understanding the needs of all parties Logical problem-solving, strong interpersonal and communication skills with the ability to facilitate and conduct webinars and presentations to customers and to a large range of audiences. Fluent in writing and speaking Japanese and English. Ability to organise and drive multiple projects which are complex in nature, coordinate colleagues across geographically diverse locations. Possesses a sense of urgency. Projects a professional image and demonstrates business acumen, driven to succeed. Author of publications in recognised journal in the relevant field of expertise. Ability to travel up to 50% of time. Preferred Qualifications and Skills Additional preferred requirements for the specific position being advertised Experience in related engineering domains like Multiple physics, Multidisciplinary Design Analysis and Optimisation (MDAO), Process Integration and Design Optimisation (PIDO), Model-Based Systems Engineering (MBSE) Understanding of infrastructure (On-premises, cloud) Programing skills: Python, Matlab, C, C++, Java, C# Experience in working under professional project management Experience with DevOps Practices In-depth Knowledge of Architectural Principles, Patterns, and Modelling Tools Preferred years of professional experience in an engineering environment: 16 years for Bachelors, 14 years for Masters or 11 years for PhD Demonstrated ability to understand business requirements and translate these into an execution plan that delivers value and meets business goals. Ability to interact effectively with senior business managers and C-level executives. The Team You&#39;ll Be A Part Of: You will join a dynamic and innovative team focused on developing and optimising advanced HPC designs. Our team collaborates closely with R&amp;D to drive technological advancements and provide top-tier support to our global customers. We are passionate about pushing the boundaries of what&#39;s possible in chip design and software security, and we are looking for like-minded individuals to join us on this exciting journey. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Now Save Relevant Jobs Applications Engineering, Sr Staff Engineer Seongnam-si, South Korea Engineering Staff DFT Applications Engineer Bengaluru, India Engineering Applications Engineering, Sr Staff Engineer Hsinchu, Taiwan Engineering BROWSE JOBS Find the open role that&#39;s right for you Similar Jobs Applications Engineering, Sr Staff Engineer Seongnam-si, South Korea Staff DFT Applications Engineer Bengaluru, India Applications Engineering, Sr Staff Engineer Hsinchu, Taiwan Applications Engineering, Staff Engineer Seongnam-si, South Korea Recently Viewed Jobs View all job opportunities here Saved Jobs View all job opportunities here View All Jobs</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_64792ffc-ad2","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/tokyo/applications-engineering-sr-staff-engineer/44408/94275399712","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Ansys software","CAE","CAD","EDA","PLM","SPDM","Python","Matlab","C","C++","Java","C#","DevOps","Architectural Principles","Patterns","Modelling Tools"],"x-skills-preferred":["Multiple physics","Multidisciplinary Design Analysis and Optimisation","Process Integration and Design Optimisation","Model-Based Systems Engineering"],"datePosted":"2026-04-24T14:14:32.691Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Tokyo"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Ansys software, CAE, CAD, EDA, PLM, SPDM, Python, Matlab, C, C++, Java, C#, DevOps, Architectural Principles, Patterns, Modelling Tools, Multiple physics, Multidisciplinary Design Analysis and Optimisation, Process Integration and Design Optimisation, Model-Based Systems Engineering"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8bdc9e27-30e"},"title":"Staff Engineer - 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You will also need to be able to work effectively in a collaborative environment and have a proven track record of building productive internal and external working relationships.</p>\n<p>If you are a motivated and experienced engineer looking for a challenging and rewarding role, we encourage you to apply for this position.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c9bb94df-1f8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hsinchu/r-and-d-engineering-staff-engineer/44408/93791047792","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"Competitive salaries","x-skills-required":["C++ programming","data structures and algorithms","EDA tools","physical design flows"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:13:51.850Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hsinchu"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C++ programming, data structures and algorithms, EDA tools, physical design flows"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_628dd746-d94"},"title":"Tire or Performance Engineer","description":"<p><strong>Job Description</strong></p>\n<p>We are looking for a talented tire or performance engineer to join our team. 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As a Senior Applications Engineer, you&#39;ll engage with customers to understand their timing closure challenges and provide expert guidance on the Synopsys TCM product suite.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Engaging with customers to understand their timing closure challenges and providing expert guidance on the Synopsys TCM product suite.</li>\n<li>Supporting the deployment, integration, and optimization of TCM solutions in advanced semiconductor design environments.</li>\n<li>Collaborating closely with R&amp;D and product teams to relay customer feedback and influence feature development.</li>\n<li>Developing and delivering technical presentations, workshops, and training sessions for internal and external stakeholders.</li>\n<li>Diagnosing and resolving complex technical issues, ensuring high standards of customer satisfaction and product reliability.</li>\n<li>Documenting best practices, creating user guides, and contributing to knowledge bases to support ongoing customer success.</li>\n</ul>\n<p>In this role, you&#39;ll have the opportunity to accelerate customer design cycles by enabling seamless integration and effective use of Synopsys TCM technologies, advance the adoption of timing constraint management solutions across leading semiconductor companies, and enhance product quality and user experience through proactive feedback and continuous improvement initiatives.</p>\n<p>If you&#39;re excited about working on cutting-edge products like Synopsys TCM, and making a tangible impact in the semiconductor industry, you&#39;ll find your next challenge here.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_14b45734-9c3","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/applications-engineering-sr-engineer-sta-timing-constraints/44408/93738746512","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["STA tools","Synopsys TCM","ASIC/FPGA design flows","physical design concepts","scripting languages (Tcl, Python, Shell)","troubleshooting skills"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:13:49.297Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"STA tools, Synopsys TCM, ASIC/FPGA design flows, physical design concepts, scripting languages (Tcl, Python, Shell), troubleshooting skills"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c7ea2375-1cc"},"title":"ASIC Physical Design, Sr Director","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>As a Sr Director of ASIC Physical Design, you will own and drive the end-to-end physical design flow for high-speed die-to-die interconnect and interface chips targeting 2 GHz+ on advanced process nodes (sub-7nm/5nm/3nm).</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Leading floorplanning, power planning, clock tree synthesis, place-and-route, and physical verification with emphasis on die-to-die interface placement and bump/pad ring constraints.</li>\n</ul>\n<ul>\n<li>Achieving timing closure across all corners and modes, with expertise in multi-corner multi-mode sign-off for high-speed serial and parallel interfaces.</li>\n</ul>\n<ul>\n<li>Driving power integrity, signal integrity, and thermal analysis to meet stringent tape-out criteria for high-bandwidth die-to-die links.</li>\n</ul>\n<ul>\n<li>Defining and owning physical design methodology, Synopsys tool flows, and best practices across the organization.</li>\n</ul>\n<ul>\n<li>Building, mentoring, and leading a globally distributed team, establishing effective communication and collaboration norms to foster cohesion and engineering excellence.</li>\n</ul>\n<ul>\n<li>Collaborating cross-functionally with RTL design, DV, architecture, CAD/EDA, and program management teams globally.</li>\n</ul>\n<ul>\n<li>Owning physical design schedules and milestones for multiple concurrent projects, communicating status to senior leadership and mitigating risks proactively.</li>\n</ul>\n<ul>\n<li>Championing automation and scripting to improve PPA outcomes and team productivity.</li>\n</ul>\n<p>The impact you will have:</p>\n<ul>\n<li>Enable the physical implementation of high-speed die-to-die interconnects that power large-scale AI accelerators, GPU clusters, and multi-die systems.</li>\n</ul>\n<ul>\n<li>Deliver ultra-low latency, high-bandwidth chip-to-chip communication at the core of next-generation AI infrastructure.</li>\n</ul>\n<ul>\n<li>Advance the adoption of cutting-edge process nodes and interface standards, positioning Synopsys as a leader in silicon innovation.</li>\n</ul>\n<ul>\n<li>Ensure robust engineering quality, execution velocity, and successful tape-outs across global teams.</li>\n</ul>\n<ul>\n<li>Drive organizational excellence by fostering a culture of accountability, growth, and technical mastery.</li>\n</ul>\n<ul>\n<li>Shape methodologies and tool flows that set industry benchmarks for high-speed, advanced-node physical design.</li>\n</ul>\n<ul>\n<li>Contribute to the strategic direction of AI silicon and interconnect products, impacting the broader technology ecosystem.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>15+ years of hands-on physical design experience, with deep expertise in high-frequency (≥2 GHz) chip design.</li>\n</ul>\n<ul>\n<li>Expertise with Synopsys IC Compiler II (ICC2), PrimeTime, Fusion Compiler, StarRC, IC Validator, and PrimePower.</li>\n</ul>\n<ul>\n<li>Track record of taping out high-speed interface ICs, die-to-die interconnect chips, SerDes, or similar designs at advanced process nodes (7nm, 5nm, 3nm).</li>\n</ul>\n<ul>\n<li>Understanding of die-to-die interface standards and protocols (UCIe, BoW, HBI, XSR, or proprietary) and their physical implementation.</li>\n</ul>\n<ul>\n<li>Experience with power intent flows (UPF/CPF), low-power design techniques, and dynamic/static power optimization.</li>\n</ul>\n<ul>\n<li>Strong scripting skills (Tcl, Python, Perl) for tool flow automation and PPA optimization.</li>\n</ul>\n<ul>\n<li>Proven ability to lead and grow globally distributed engineering teams of 10+ people.</li>\n</ul>\n<ul>\n<li>Cross-cultural communication and collaboration skills; experience working across US, Asia, or European engineering centers.</li>\n</ul>\n<ul>\n<li>BS or MS in Electrical Engineering, Computer Engineering, or related field (PhD preferred).</li>\n</ul>\n<p>As a Sr Director of ASIC Physical Design, you will join a globally distributed Silicon Engineering team focused on the physical implementation of cutting-edge AI silicon and high-speed die-to-die interconnects.</p>\n<p>Our team spans multiple sites and time zones, collaborating with process technology, packaging, RTL, DV, architecture, CAD/EDA, and program management teams.</p>\n<p>We pride ourselves on a culture of technical depth, low bureaucracy, and a relentless drive for engineering excellence.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</p>\n<p>Our total rewards include both monetary and non-monetary offerings.</p>\n<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c7ea2375-1cc","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ho-chi-minh-city/asic-physical-design-sr-director-in-hcmc-da-nang/44408/93750516784","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC Physical Design","High-Frequency Chip Design","Synopsys IC Compiler II","PrimeTime","Fusion Compiler","StarRC","IC Validator","PrimePower","Die-to-Die Interface Standards","Power Intent Flows","Low-Power Design Techniques","Dynamic/Static Power Optimization","Scripting Skills (Tcl, Python, Perl)","Leadership and Team Management"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:13:37.968Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ho Chi Minh City"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC Physical Design, High-Frequency Chip Design, Synopsys IC Compiler II, PrimeTime, Fusion Compiler, StarRC, IC Validator, PrimePower, Die-to-Die Interface Standards, Power Intent Flows, Low-Power Design Techniques, Dynamic/Static Power Optimization, Scripting Skills (Tcl, Python, Perl), Leadership and Team Management"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_772ce6ff-309"},"title":"SoC Design Manager","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>At Synopsys, we drive the innovations that shape the way the world lives, works, and connects. Our technology is foundational to the Era of Pervasive Intelligence,from autonomous systems and high-performance computing to artificial intelligence and advanced connectivity.</p>\n<p>As a global leader in electronic design automation, semiconductor IP, and system design solutions, we enable customers to deliver complex, high-performance silicon and software products with confidence.</p>\n<p><strong>Technical &amp; Program Leadership</strong></p>\n<ul>\n<li>Lead and oversee end-to-end SoC physical design execution, from specification through post-silicon bring-up, using Synopsys EDA tools and IP.</li>\n<li>Provide technical direction and architectural guidance on Place &amp; Route, timing closure, power integrity (IREM), extraction, and physical verification.</li>\n<li>Act as a senior escalation point for complex technical challenges, driving resolution through sound engineering judgment.</li>\n<li>Ensure consistent delivery excellence across turnkey projects and customer advisory engagements.</li>\n<li>Influence and evolve design methodologies and best practices within the broader SoC organization.</li>\n</ul>\n<p><strong>People Management &amp; Team Development</strong></p>\n<ul>\n<li>Build, lead, and develop a high-performing SoC design team in Vietnam, including hiring, onboarding, coaching, and performance management.</li>\n<li>Establish clear goals, expectations, and development plans aligned with Synopsys’ engineering and leadership frameworks.</li>\n<li>Mentor senior engineers and cultivate future technical and people leaders to support long-term capability growth.</li>\n<li>Foster a culture of technical rigor, accountability, inclusion, and continuous improvement.</li>\n</ul>\n<p><strong>Stakeholder &amp; Business Partnership</strong></p>\n<ul>\n<li>Partner closely with Business Units, R&amp;D, and Sales to align engineering execution with product strategy and customer needs.</li>\n<li>Serve as a trusted technical advisor to customers, customer design teams, and internal stakeholders.</li>\n<li>Contribute to workforce planning, delivery commitments, and risk management within the Vietnam organization.</li>\n<li>Play a key role in scaling and strengthening Synopsys’ SoC engineering capability in Vietnam as part of the global organization.</li>\n</ul>\n<p><strong>The Impact You Will Have</strong></p>\n<ul>\n<li>Enable scalable, high-quality delivery of advanced SoC designs.</li>\n<li>Elevate technical capability and execution maturity within Synopsys Vietnam.</li>\n<li>Drive innovation in physical design methodology and engineering best practices.</li>\n<li>Improve customer satisfaction through strong technical leadership and trusted advisory support.</li>\n<li>Develop and retain critical engineering talent in a highly competitive semiconductor market.</li>\n<li>Strengthen Synopsys’ reputation as a long-term technology and talent leader in Vietnam.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_772ce6ff-309","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ho-chi-minh-city/soc-design-manager/44408/94030515808","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Fusion Compiler","ICC2","Place & Route","Timing Analysis","Extraction","IREM","Physical Verification","TCL","PERL Scripting"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:13:23.555Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ho Chi Minh City"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Fusion Compiler, ICC2, Place & Route, Timing Analysis, Extraction, IREM, Physical Verification, TCL, PERL Scripting"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_65b38286-e1d"},"title":"Layout Design, Sr Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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You will design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below)</li>\n<li>Design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements</li>\n<li>Perform DRC, LVS, ERC, Antenna checks, and ensure timely completion of verification cycles</li>\n<li>Apply layout matching techniques and address ESD, latch-up, EMIR, DFM, and LEF generation issues</li>\n<li>Collaborate closely with cross-disciplinary teams to optimize layout for performance, power, and area</li>\n<li>Troubleshoot and debug layout challenges, continually improving methodologies and design outcomes</li>\n<li>Document design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products</li>\n<li>Ensure robust and reliable IP performance through meticulous layout design and physical verification</li>\n<li>Drive innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more</li>\n<li>Contribute to the world&#39;s broadest portfolio of silicon IP, enhancing Synopsys&#39; position as a technology leader</li>\n<li>Reduce risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements</li>\n<li>Foster a culture of collaboration, accountability, and technical excellence within the team and across the organization</li>\n<li>Help shape the next wave of semiconductor advancements, powering smart devices and connected systems globally</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>B.Tech/M.Tech degree in Electronics, Electrical, or related engineering discipline</li>\n<li>2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below)</li>\n<li>Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies</li>\n<li>Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies</li>\n<li>Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation</li>\n<li>Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms</li>\n<li>Ability to work independently and collaboratively, managing multiple tasks and priorities</li>\n</ul>\n<p>Team:</p>\n<p>You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR &amp; HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world&#39;s most advanced chips and devices.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_65b38286-e1d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-engineer/44408/93930643616","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["IC layout development","advanced process nodes","DRC, LVS, ERC, Antenna checks","physical verification methodologies","deep submicron effects","floorplan techniques","layout matching in CMOS, FinFET, GAA technologies","ESD, latch-up prevention","EMIR analysis","DFM considerations","LEF generation","Cadence Virtuoso","Synopsys Custom Compiler"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:13:15.595Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"IC layout development, advanced process nodes, DRC, LVS, ERC, Antenna checks, physical verification methodologies, deep submicron effects, floorplan techniques, layout matching in CMOS, FinFET, GAA technologies, ESD, latch-up prevention, EMIR analysis, DFM considerations, LEF generation, Cadence Virtuoso, Synopsys Custom Compiler"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_642c88a4-a92"},"title":"ASIC Physical Design, Sr Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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This group is dedicated to integrating and validating Synopsys&#39;s broad portfolio of IP blocks,logic, memory, interfaces, analog, security, and embedded processors,into test chips at the forefront of semiconductor innovation. The team works collaboratively across architecture, RTL, circuit, and covercell disciplines to deliver robust, silicon-proven IP solutions that power next-generation products for global customers.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_642c88a4-a92","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/nepean/asic-physical-design-sr-staff-engineer-16724/44408/93743819072","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC physical design","RTL-to-GDSII flow","Static timing analysis","Physical verification","Design Compiler","PrimeTime","IC Compiler II/FC","Calibre","RedHawk","FinFet technologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:12:52.721Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Nepean"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC physical design, RTL-to-GDSII flow, Static timing analysis, Physical verification, Design Compiler, PrimeTime, IC Compiler II/FC, Calibre, RedHawk, FinFet technologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7375c418-b8a"},"title":"SOC Engineering, Sr Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7375c418-b8a","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/soc-engineering-sr-staff-engineer/44408/94212497968","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$120,000 - $180,000 per year","x-skills-required":["RTL2GDSII flows","synthesis","place & route","clock tree synthesis (CTS)","timing optimization","static timing analysis (STA)","physical verification","EMIR analysis","timing closure","floor-planning","Synopsys EDA tools","Design Compiler","IC Compiler II","PrimeTime","Python","PERL","TCL","high-frequency design","low-power design methodologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:12:44.698Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL2GDSII flows, synthesis, place & route, clock tree synthesis (CTS), timing optimization, static timing analysis (STA), physical verification, EMIR analysis, timing closure, floor-planning, Synopsys EDA tools, Design Compiler, IC Compiler II, PrimeTime, Python, PERL, TCL, high-frequency design, low-power design methodologies","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":120000,"maxValue":180000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c6b1618d-cd4"},"title":"Layout Design, Staff Engineer - High Speed Serdes","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>You are a passionate engineer with a keen eye for precision and detail, thriving in collaborative environments and excited by the challenge of delivering world-class layout designs for cutting-edge semiconductor products. With at least five years of hands-on experience in layout or mask design, you have a deep understanding of the nuances of IC layout and the ability to resolve complex issues with innovative solutions.</p>\n<p>Designing and developing complex layout structures for integrated circuits, ensuring compliance with design specifications and manufacturing requirements. Collaborating with cross-functional teams including circuit designers, verification engineers, and project managers to optimize layout solutions. Utilizing industry-standard EDA tools for layout creation, verification, and optimization. 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innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect.</p>\n<p>Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.</p>\n<p>We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>Join us to transform the future through continuous technological innovation.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Collaborating with cross-functional teams during early design stages to optimize and define SIPI (Signal Integrity/Power Integrity) performance requirements, including bump mapping and power estimation.</li>\n<li>Designing and developing advanced silicon package solutions such as silicon interposers, RDL fanout packages, and silicon bridge packages.</li>\n<li>Modeling and analyzing advanced package designs to ensure optimal electrical, thermal, and mechanical performance.</li>\n<li>Representing Synopsys on business unit projects as a technical leader and subject matter expert in advanced packaging.</li>\n<li>Resolving a wide range of design and integration issues using creative, data-driven approaches.</li>\n<li>Supporting customer engagements in exploring and implementing advanced package solutions with Synopsys IPs.</li>\n<li>Collaborating with global teams to share best practices and drive innovation in advanced packaging methodologies.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>Bachelor’s degree in Electrical or Electronic Engineering (Master’s or PhD preferred).</li>\n<li>Minimum of 10 years’ relevant experience in advanced package design, model extraction, and analysis.</li>\n<li>Expert knowledge of advanced circuit and transmission line theory.</li>\n<li>Hands-on experience with TSMC, Intel, Samsung, or OSAT advanced package technologies.</li>\n<li>Proficiency in multi-physics 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Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Applications Engineering, Staff Engineer</strong></p>\n<p>United States Off-siteSave</p>\n<p><strong>Remote Eligible</strong> Yes<strong>Hire Type</strong> Employee<strong>Job ID</strong> 16527<strong>Base Salary Range</strong> $112000-$168000<strong>Date posted</strong> 04/07/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a seasoned Physical Verification Specialist, deeply passionate about advancing semiconductor technology and eager to make your mark in a high-impact, customer-facing role. With over seven years of hands-on industry experience, you are adept at DRC, LVS, FILL, and PERC, and have a track record of delivering innovative solutions for advanced physical verification challenges. Your expertise spans EDA tools such as IC Validator, Calibre, or Assura, and you possess a comprehensive understanding of runset development and backend physical design flows. You thrive in dynamic environments, seamlessly managing multiple customer engagements and collaborating with cross-functional teams to drive success. Your programming skills in Python, TCL, or Perl enable you to automate and optimize verification flows, while your attention to detail ensures robust technical documentation and effective troubleshooting. You are a proactive problem-solver, continually seeking to expand your knowledge and stay ahead of emerging technologies. Your exceptional communication and interpersonal skills empower you to build strong relationships with customers and colleagues alike, ensuring their needs are met and their goals achieved. Above all, you are motivated by the opportunity to shape the future of semiconductor design, contributing your expertise and enthusiasm to a team that values innovation, diversity, and excellence.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Engaging directly with customers to understand their physical verification challenges and deliver tailored solutions.</li>\n</ul>\n<ul>\n<li>Supporting the sale and adoption of the IC Validator product, enhancing customer performance, quality, and development timelines.</li>\n</ul>\n<ul>\n<li>Providing deep expertise in physical verification for advanced node designs, ensuring robust and accurate results.</li>\n</ul>\n<ul>\n<li>Managing multiple customer activities, including product demonstrations, evaluations, and competitive benchmarking.</li>\n</ul>\n<ul>\n<li>Conducting training sessions, resolving technical issues, and offering ongoing technical account management.</li>\n</ul>\n<ul>\n<li>Collaborating with account teams to develop customized flows and solutions that address unique customer needs.</li>\n</ul>\n<ul>\n<li>Creating and maintaining flows in TCL/Python, as well as authoring DRC/LVS/FILL/PERC rule decks.</li>\n</ul>\n<ul>\n<li>Working closely with R&amp;D, Product Engineering, and Sales teams to drive tool enhancement and customer success.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerating customer adoption of Synopsys’ IC Validator, driving improved design performance and faster development cycles.</li>\n</ul>\n<ul>\n<li>Enhancing the quality and reliability of semiconductor designs through advanced physical verification methodologies.</li>\n</ul>\n<ul>\n<li>Reducing time-to-market for customers by streamlining verification workflows and resolving technical challenges.</li>\n</ul>\n<ul>\n<li>Supporting the ongoing innovation of Synopsys products through direct feedback and close collaboration with R&amp;D.</li>\n</ul>\n<ul>\n<li>Strengthening customer relationships and satisfaction through expert guidance and responsive support.</li>\n</ul>\n<ul>\n<li>Positioning Synopsys as the preferred partner for cutting-edge physical verification solutions in the semiconductor industry.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BS or MS degree in Electronic Engineering, Computer Science, or related field with strong knowledge of VLSI and device components.</li>\n</ul>\n<ul>\n<li>Strong scripting/programming skills, with proficiency in Python, TCL, Perl, or shell scripting.</li>\n</ul>\n<ul>\n<li>7+ years of industry experience in physical verification flows (LVS/DRC/FILL/PERC) and runset development.</li>\n</ul>\n<ul>\n<li>Hands-on experience with EDA tool products such as IC Validator, Calibre, or Assura.</li>\n</ul>\n<ul>\n<li>Understanding of backend physical design flows (FC/Innovus), custom layouts (Custom Compiler/Virtuoso layout), and PEX flows.</li>\n</ul>\n<ul>\n<li>Ability to produce clear and comprehensive technical documentation.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Innovative thinker with a passion for learning and exploring new technologies.</li>\n</ul>\n<ul>\n<li>Resilient and able to perform well under high-pressure situations.</li>\n</ul>\n<ul>\n<li>Proactive, customer-centric, and results-oriented.</li>\n</ul>\n<ul>\n<li>Strong communication skills with proficiency in English.</li>\n</ul>\n<ul>\n<li>Excellent interpersonal skills and a collaborative mindset.</li>\n</ul>\n<ul>\n<li>Detail-oriented, analytical, and skilled at troubleshooting and problem-solving.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a dynamic Applications Engineering team dedicated to driving customer success in physical verification. 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Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You are a seasoned engineering leader with a passion for innovation and a deep understanding of physical design methodologies for cutting-edge semiconductor technologies. With a proven track record of successful project tape-outs, you thrive in collaborative, multidisciplinary environments, and you enjoy mentoring and guiding teams to achieve ambitious technical goals.</p>\n<p>Your experience spans advanced FinFET nodes and the latest SERDES standards, and you possess a nuanced appreciation for both digital and mixed-signal architectures. You are methodology-driven, adept at software and scripting, and you have a strong grasp of CAD automation. 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Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You Are:</p>\n<p>You are an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology. With 5-8 years of industry experience,primarily in Physical Verification (PV),you thrive on solving complex layout and verification challenges for advanced process nodes. You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. 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Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team. Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys&#39; technical edge.</p>\n<p>The Impact You Will Have:</p>\n<p>Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market. Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps. Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges. Contribute to the development of next-generation verification methodologies and best practices within Synopsys. Strengthen Synopsys&#39; reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.</p>\n<p>What You&#39;ll Need:</p>\n<p>B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field. 8-10 years of hands-on experience in the Physical Verification (PV) domain. Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS. Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development. Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements. Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks. Exposure to competitive EDA tools and awareness of their strengths and limitations.</p>\n<p>Who You Are:</p>\n<p>An analytical thinker with strong problem-solving abilities and meticulous attention to detail. A collaborative team player who fosters knowledge sharing and mentorship. Effective communicator, capable of translating technical concepts to diverse audiences. Adaptable and proactive, with a passion for continuous learning and innovation. Customer-focused, with a commitment to delivering high-quality solutions on time. Self-driven, organized, and able to manage multiple priorities in a fast-paced environment.</p>\n<p>The Team You&#39;ll Be A Part Of:</p>\n<p>You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You&#39;ll work closely with foundry partners, internal R&amp;D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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As a Staff Engineer, you will be responsible for leading the design and development of next-generation DDR and HBM PHY IP layout, driving technical innovation and best practices.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Lead the design and development of next-generation DDR and HBM PHY IP layout</li>\n<li>Provide technical mentorship and guidance to junior engineers</li>\n<li>Take ownership of layout planning, execution, and quality review processes</li>\n<li>Collaborate with cross-functional teams to meet project goals and customer requirements</li>\n<li>Manage effort estimation, project scheduling, and execution in multi-disciplinary team settings</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>BTech/MTech degree in Electronics, Electrical Engineering, or a related field</li>\n<li>Minimum 5 years of relevant experience in physical layout design, particularly in advanced nodes (7nm and below)</li>\n<li>Strong command of deep submicron effects, advanced floorplan techniques, and process technologies such as CMOS, FinFET, and GAA</li>\n<li>Expertise in layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and bond-pad/IO frame design</li>\n<li>Demonstrated ability to lead projects, manage schedules, and deliver high-quality results within tight timelines</li>\n</ul>\n<p>Preferred Qualifications:</p>\n<ul>\n<li>Experience with industry-standard EDA tools for layout and verification</li>\n<li>Strong problem-solving skills and ability to work in a fast-paced environment</li>\n<li>Excellent communication and collaboration skills</li>\n</ul>\n<p>Benefits:</p>\n<ul>\n<li>Comprehensive medical and healthcare plans</li>\n<li>Time away from work programs</li>\n<li>Family support programs</li>\n<li>ESPP</li>\n</ul>\n<p>At Synopsys, we value diversity and inclusion and are committed to creating a workplace where everyone feels valued and supported. We are an equal opportunity employer and welcome applications from qualified candidates of all backgrounds.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8ec6d1f4-b98","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-staff-engineer/44408/93942161216","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["physical layout design","deep submicron effects","advanced floorplan techniques","process technologies","layout matching","ESD","latch-up","PERC","EMIR","DFM","LEF generation","bond-pad/IO frame design"],"x-skills-preferred":["industry-standard EDA tools","problem-solving skills","communication skills","collaboration skills"],"datePosted":"2026-04-24T14:09:19.554Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"physical layout design, deep submicron effects, advanced floorplan techniques, process technologies, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad/IO frame design, industry-standard EDA tools, problem-solving skills, communication skills, collaboration skills"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_529617b7-a03"},"title":"Layout Design, Sr Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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You will design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Develop high-quality layouts for DDR and HBM PHY IPs using advanced CMOS, FinFET, and GAA process technologies (7nm and below)</li>\n<li>Design layout floorplans, routing, and conduct physical verifications to ensure compliance with industry standards and internal quality requirements</li>\n<li>Perform DRC, LVS, ERC, Antenna checks, and ensure timely completion of verification cycles</li>\n<li>Apply layout matching techniques and address ESD, latch-up, EMIR, DFM, and LEF generation issues</li>\n<li>Collaborate closely with cross-disciplinary teams to optimize layout for performance, power, and area</li>\n<li>Troubleshoot and debug layout challenges, continually improving methodologies and design outcomes</li>\n<li>Document design flows, methodologies, and best practices to facilitate knowledge sharing and continuous improvement</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the integration of advanced silicon IP into customer SoCs, enabling rapid time-to-market with differentiated products</li>\n<li>Ensure robust and reliable IP performance through meticulous layout design and physical verification</li>\n<li>Drive innovation in memory interface IPs, supporting the demands of AI, cloud computing, IoT, and more</li>\n<li>Contribute to the world&#39;s broadest portfolio of silicon IP, enhancing Synopsys&#39; position as a technology leader</li>\n<li>Reduce risk for customers by delivering high-quality, verified IP solutions that meet stringent requirements</li>\n<li>Foster a culture of collaboration, accountability, and technical excellence within the team and across the organization</li>\n<li>Help shape the next wave of semiconductor advancements, powering smart devices and connected systems globally</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>BTech/MTech degree in Electronics, Electrical, or related engineering discipline</li>\n<li>2+ years of hands-on experience in IC layout development for advanced process nodes (7nm and below)</li>\n<li>Expertise in DRC, LVS, ERC, Antenna checks, and physical verification methodologies</li>\n<li>Strong understanding of deep submicron effects, floorplan techniques, and layout matching in CMOS, FinFET, GAA technologies</li>\n<li>Experience with ESD, latch-up prevention, EMIR analysis, DFM considerations, and LEF generation</li>\n<li>Proficiency with layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or similar EDA platforms</li>\n<li>Ability to work independently and collaboratively, managing multiple tasks and priorities</li>\n</ul>\n<p>Team:</p>\n<p>You will join a dynamic and innovative team within the Silicon IP group, focused on developing industry-leading DDR &amp; HBM PHY IPs. Our team thrives on collaboration, technical excellence, and a shared vision to push the boundaries of semiconductor technology. You will work alongside experts in layout, verification, and system integration, contributing to solutions that power the world&#39;s most advanced chips and devices.</p>\n<p>Rewards and Benefits:</p>\n<ul>\n<li>Comprehensive medical and healthcare plans that work for you and your family</li>\n<li>In addition to company holidays, we have ETO and FTO Programs</li>\n<li>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more</li>\n<li>Purchase Synopsys common stock at a 15% discount, with a 24-month look-back</li>\n<li>Save for your future with our retirement plans that vary by region and country</li>\n<li>Competitive salaries</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_529617b7-a03","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-engineer/44408/93942161104","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["DRC","LVS","ERC","Antenna checks","physical verification","layout matching","ESD","latch-up prevention","EMIR analysis","DFM considerations","LEF generation","Cadence Virtuoso","Synopsys Custom Compiler"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:08:58.635Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"DRC, LVS, ERC, Antenna checks, physical verification, layout matching, ESD, latch-up prevention, EMIR analysis, DFM considerations, LEF generation, Cadence Virtuoso, Synopsys Custom Compiler"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_d0dacac5-f8f"},"title":"Layout Design, Sr Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Our total rewards include both monetary and non-monetary offerings.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_d0dacac5-f8f","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-engineer/44408/93942161152","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["IC layout design","advanced CMOS, FinFET, and GAA process technologies","deep submicron effects","layout floorplanning","physical verification","ESD, latch-up, EMIR, DFM, and LEF generation issues","layout matching techniques","Muhammad Ali","Cadence Virtuoso","Synopsys Custom Compiler"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:08:57.493Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"IC layout design, advanced CMOS, FinFET, and GAA process technologies, deep submicron effects, layout floorplanning, physical verification, ESD, latch-up, EMIR, DFM, and LEF generation issues, layout matching techniques, Muhammad Ali, Cadence Virtuoso, Synopsys Custom Compiler"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8e31fbbb-a5e"},"title":"R&D Engineering, Sr Engineer","description":"<p>You are a passionate engineer with a strong foundation in software development and a keen interest in thermal and fluids analysis. You thrive in dynamic, collaborative environments and are eager to contribute your expertise to cutting-edge R&amp;D projects. With a background in Computer Science, Mechanical Engineering, or a related field, you bring not only technical prowess in languages like C++ and C#, but also a curiosity for multi-physics modeling and simulation. You are adaptable, self-driven, and motivated to deliver high-quality, maintainable solutions that advance engineering simulation technology.</p>\n<p>As someone who enjoys tackling complex challenges, you value continuous learning and are familiar with modern software engineering practices. You understand the importance of rigorous debugging, efficient code design, and scalability. Your ability to grasp intricate systems and communicate effectively with cross-functional teams sets you apart. You are comfortable working independently and collaboratively, and you consistently meet project deadlines while maintaining a high standard of excellence. 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capabilities in thermal and fluids simulation software, contributing to industry-leading engineering tools.</li>\n</ul>\n<ul>\n<li>Enable customers to achieve accurate and efficient thermal analysis in their designs, supporting innovation across multiple industries.</li>\n</ul>\n<ul>\n<li>Drive performance improvements and scalability in simulation products, enhancing user experience and reliability.</li>\n</ul>\n<ul>\n<li>Support the integration of multi-physics modeling, broadening the scope and utility of Synopsys software solutions.</li>\n</ul>\n<ul>\n<li>Help shape the future of simulation technology through active participation in R&amp;D and collaborative problem-solving.</li>\n</ul>\n<ul>\n<li>Contribute to a culture of excellence and continuous improvement within the engineering team.</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>Bachelor’s degree in Computer Science, Mechanical Engineering, or related field with 2+ years of relevant experience, OR a Master’s degree in a related field.</li>\n</ul>\n<ul>\n<li>Strong expertise in C++ and C# with at least 2 years of hands-on experience.</li>\n</ul>\n<ul>\n<li>Familiarity with Fortran and an understanding of legacy and modern programming paradigms.</li>\n</ul>\n<ul>\n<li>Solid grasp of data structures, algorithms, and advanced debugging techniques.</li>\n</ul>\n<ul>\n<li>Ability to quickly learn and understand complex systems, with a proven track record of delivering high-quality work within deadlines.</li>\n</ul>\n<p><strong>Nice to Have:</strong></p>\n<ul>\n<li>Knowledge of Functional Mock-up Interface standard, .NET framework, and development experience with physical design or analysis tools.</li>\n</ul>\n<ul>\n<li>Multi-physics experience including thermal and fluids modeling, computer graphics, and geometry processing.</li>\n</ul>\n<ul>\n<li>Experience contributing to Engineering Simulation applications such as Finite Element Analysis (FEA) and fluids modeling.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Analytical thinker with strong problem-solving skills.</li>\n</ul>\n<ul>\n<li>Effective communicator and collaborator who thrives in team environments.</li>\n</ul>\n<ul>\n<li>Adaptable and eager to learn new technologies and methodologies.</li>\n</ul>\n<ul>\n<li>Detail-oriented with a commitment to code quality and maintainability.</li>\n</ul>\n<ul>\n<li>Proactive, self-motivated, and results-driven.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8e31fbbb-a5e","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/waterloo/r-and-d-engineering-sr-engineer-16532/44408/93821762272","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["C++","C#","Fortran","data structures","algorithms","advanced debugging techniques"],"x-skills-preferred":["Functional Mock-up Interface standard",".NET framework","physical design or analysis tools","multi-physics experience","computer graphics","geometry processing"],"datePosted":"2026-04-24T14:08:18.189Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Canada"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C++, C#, Fortran, data structures, algorithms, advanced debugging techniques, Functional Mock-up Interface standard, .NET framework, physical design or analysis tools, multi-physics experience, computer graphics, geometry processing"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_21b20e0c-c8a"},"title":"Software Developer - Battlefield QV","description":"<p>Electronic Arts creates next-level entertainment experiences that inspire players and fans around the world. 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As a member of the Brand Design team, you will translate and expand Synthesia&#39;s brand into physical and experiential environments globally.</p>\n<p>Key responsibilities include evolving the visual design of our event presence, designing booths, spatial environments, signage systems, print assets, and merchandise from design to production. You will also develop cohesive event identities across physical and digital touchpoints, design for digital experiential moments, and storyboard and design motion and screen-based content for events and keynotes.</p>\n<p>The ideal candidate will have 6+ years of experience in brand design, visual design, or experiential design, with strong hands-on events experience. They will be a multidisciplinary designer with a wide skill set and comfortable working across different mediums and crafts. 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A strong sense of ownership, a proactive, organised, and ownership-driven mindset, and a producer mindset are also necessary.</p>\n<p>The successful candidate will be comfortable collaborating with and directing external partners, vendors, and agencies, and will have strong communication skills and confidence presenting and defending design decisions to stakeholders.</p>\n<p>Nice to have skills include experience incorporating AI tools into your workflow to accelerate ideation, iteration, or content creation, experience in building websites in no-code tools such as Framer/Splash, basic 3D modular design, and industrial design knowledge.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_3ffe033f-9f8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synthesia","sameAs":"https://synthesia.ai/","logo":"https://logos.yubhub.co/synthesia.ai.png"},"x-apply-url":"https://jobs.ashbyhq.com/synthesia/2bb161ef-7355-474c-a051-dc57322f8225","x-work-arrangement":"remote","x-experience-level":"senior","x-job-type":"Full time","x-salary-range":null,"x-skills-required":["brand design","visual design","experiential design","print production","large-format design","Figma","motion design","typography","layout","physical-to-digital brand translation"],"x-skills-preferred":["AI tools","no-code tools","3D modular design","industrial design"],"datePosted":"2026-04-24T13:14:10.156Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"UK Remote"}},"jobLocationType":"TELECOMMUTE","employmentType":"FULL_TIME","occupationalCategory":"Design","industry":"Technology","skills":"brand design, visual design, experiential design, print production, large-format design, Figma, motion design, typography, layout, physical-to-digital brand translation, AI tools, no-code tools, 3D modular design, industrial design"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_10c26a94-827"},"title":"AI Machine Learning Principal Engineer","description":"<p>What Makes a Honda, is Who makes a Honda</p>\n<p>Honda has a clear vision for the future, and it’s a joyful one. We are looking for individuals with the skills, courage, persistence, and dreams that will help us reach our future-focused goals. At our core is innovation. Honda is constantly innovating and developing solutions to drive our business with record success. We strive to be a company that serves as a source of “power” that supports people around the world who are trying to do things based on their own initiative and that helps people expand their own potential. To this end, Honda strives to realize “the joy and freedom of mobility” by developing new technologies and an innovative approach to achieve a “zero environmental footprint.”</p>\n<p>We are looking for qualified individuals with diverse backgrounds, experiences, continuous improvement values, and a strong work ethic to join our team.</p>\n<p>If your goals and values align with Honda’s, we want you to join our team to Bring the Future!</p>\n<p><strong>Job Purpose</strong></p>\n<p>Lead the design, development, and deployment of advanced AI and machine learning solutions supporting Honda’s automotive R&amp;D initiatives, with a focus on production-grade AI for vehicle development, simulation, manufacturing quality, and digital twins,owning solutions end-to-end and mentoring engineers while partnering with CAE, CAD, manufacturing, and data platform teams.</p>\n<p><strong>Key Accountabilities</strong></p>\n<ul>\n<li>Lead development and validation of AI/ML solutions with measurable impact for automotive engineering - CAE, and manufacturing use cases.</li>\n<li>Design and deploy AI surrogate models using Graph Convolutional Neural Networks (GCNNs) to augment/replace physics-based CAE.</li>\n<li>Architect and deploy scalable cloud-based AI systems on AWS/Azure aligned with enterprise governance.</li>\n<li>Own the full AI lifecycle: data ingestion, feature engineering, training, evaluation, deployment, and monitoring.</li>\n<li>Implement MLOps and GenAIOps best practices (versioning, drift detection, CI/CD, traceability).</li>\n<li>Develop and deploy agentic AI solutions for CAE in the cloud and deploy AI agents to execute/augment/monitor workflows.</li>\n<li>Support ETL activities related to ADC data (CAE) structure.</li>\n<li>Establish design standards, code quality, and documentation to support reuse and auditability.</li>\n<li>Mentor and technically guide mid-level and junior engineers.</li>\n</ul>\n<p><strong>Qualifications, Experience, and Skills</strong></p>\n<ul>\n<li>Bachelor’s or Master’s degree in Computer Science, Engineering, Data Science, or related field, or equivalent experience.</li>\n<li>8+ years of experience developing and deploying ML/AI systems; 3+ years in production environments.</li>\n</ul>\n<p>_Other Job-Specific Skills_</p>\n<ul>\n<li>Hands-on experience with graph neural networks (GCNNs, GNNs, GATs, MPNNs)</li>\n<li>Advanced proficiency in Python; C++ or Java is a strong plus for automotive contexts</li>\n<li>Deep expertise in ML frameworks (PyTorch, TensorFlow, scikit-learn)</li>\n<li>Strong foundation in statistics, optimization, and numerical methods</li>\n<li>Hands-on experience deploying AI solutions on AWS/Azure (e.g., Amazon Bedrock)</li>\n<li>Experience with LangGraph / LangChain &amp; Strands SDK.</li>\n<li>Experience with containers, pipelines, and MLOps tooling (Docker, MLflow, CI/CD)</li>\n<li>Knowledge of model governance, compliance, and responsible AI frameworks</li>\n<li>CAE/physics-informed ML, surrogate modelling, or simulation experience (preferred).</li>\n<li>Prior knowledge of automotive or related design engineering work is a plus.</li>\n</ul>\n<p><strong>Job Dimensions</strong></p>\n<p><strong>Decisions Expected</strong></p>\n<p><strong>Working Conditions</strong></p>\n<ul>\n<li>Work is primarily conducted at an office desk; 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Here, everyone is part of the story. Part of a community that connects across the globe. A place where creativity thrives, new perspectives are invited, and ideas matter. A team where everyone makes play happen.</p>\n<p>Our shipped titles include critically acclaimed multi-platform games Apex Legends, Titanfall, Titanfall 2, Star Wars™ Jedi: Fallen Order, Star Wars™ Jedi: Survivor and Medal of Honor: Above and Beyond. Join us for the opportunity to create groundbreaking games with some of the best developer talent in the industry.</p>\n<p>We&#39;re looking for an accomplished Senior Technical Animator - Character Rigging R&amp;D who will embrace our philosophy and share their hard-earned expertise to provide support to our Apex Legends Animation and Character teams. As a Senior Technical Animator, you will play a key role in empowering other developers by working closely with the Tech Anim, Character Art and Animation Departments. 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As a Senior Programmer at d3t, you will be a key role in our balanced engineering and mixed discipline teams. You will collaborate with teams internally and with high-profile external clients across the world to own and deliver systems and tech on a variety of games, platforms, and engines.</p>\n<p>Our seniors are role models on the teams and have the opportunity to work on a vast range of tasks and projects. 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Working pattern - 3 days per week in the studio: Wednesday, Thursday, and another day of your choice.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_25ebc5b3-a6a","directApply":true,"hiringOrganization":{"@type":"Organization","name":"d3t","sameAs":"https://www.d3t.co.uk/","logo":"https://logos.yubhub.co/d3t.co.uk.png"},"x-apply-url":"https://apply.workable.com/j/66F5CF398F","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"contract","x-salary-range":null,"x-skills-required":["Languages: Multiple including C++ expertise","Engines: Professional experienced in at least two of the following Unreal, Unity, Frostbite, Proprietary","Knowledge: Owned the development of systems or features in any of (e.g., gameplay, UI, physics, networking, memory, animation, core tech, graphics etc.)","Technology: Experienced with IDEs, source control","Enthusiasm: Will take on any challenge or responsibility","Growth: Driven to learn and improve","Role Model: Confident supporting junior teammates","Teamwork: Enjoy working as part of a team and supporting others","Communication: Clear, enthusiastic, and able to discuss technical solutions and updates with multiple disciplines","Experience: 6+ years"],"x-skills-preferred":["Released games","Console and/or Mobile development","Full development cycle","Porting games","Remasters, Remakes","Tools development","Build and infrastructure","Sub-team leadership","Profiling"],"datePosted":"2026-04-24T13:09:55.319Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Gateshead"}},"employmentType":"CONTRACTOR","occupationalCategory":"Engineering","industry":"Technology","skills":"Languages: Multiple including C++ expertise, Engines: Professional experienced in at least two of the following Unreal, Unity, Frostbite, Proprietary, Knowledge: Owned the development of systems or features in any of (e.g., gameplay, UI, physics, networking, memory, animation, core tech, graphics etc.), Technology: Experienced with IDEs, source control, Enthusiasm: Will take on any challenge or responsibility, Growth: Driven to learn and improve, Role Model: Confident supporting junior teammates, Teamwork: Enjoy working as part of a team and supporting others, Communication: Clear, enthusiastic, and able to discuss technical solutions and updates with multiple disciplines, Experience: 6+ years, Released games, Console and/or Mobile development, Full development cycle, Porting games, Remasters, Remakes, Tools development, Build and infrastructure, Sub-team leadership, Profiling"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_ffa56333-9b3"},"title":"Lead, Data Center Physical Security Operations (North America)","description":"<p>As Anthropic&#39;s Lead for Data Center Security Operations in North America, you will own the physical security program across our NA data center footprint , spanning owned sites and colocation partners. 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We need someone who can set direction without waiting for mature playbooks, and who treats security as an enabler of business outcomes.</p>\n<p>Responsibilities:</p>\n<p>You will own a region of North America data center security operations program across owned and colocation sites.</p>\n<ul>\n<li>You&#39;ll partner with data center build and engineering teams on new-site design and activation, ensuring security scope is defined, delivered, and turned over to operations cleanly.</li>\n</ul>\n<ul>\n<li>You&#39;ll lead the regional vendor portfolio such as integrators, guard-force providers, and general contractors with meaningful budget and SLA ownership.</li>\n</ul>\n<ul>\n<li>You&#39;ll author and maintain the policies, standards, and SOPs that govern physical security in the region, keeping them aligned with company-wide frameworks.</li>\n</ul>\n<ul>\n<li>You&#39;ll lead physical security incident response and investigations, and you&#39;ll represent the region in cross-functional forums that shape infrastructure, compute, and real estate decisions.</li>\n</ul>\n<p>You may be a good fit if you</p>\n<ul>\n<li>Have extensive experience operating physical security at hyperscale or at a major colocation operator across multiple sites, with direct ownership of the operating model, vendors, and on-call.</li>\n</ul>\n<ul>\n<li>Have personally led the security scope on new-build data center projects from design through construction, commissioning, and turnover to operations.</li>\n</ul>\n<ul>\n<li>Have worked across both owned data centers and colocation space, and understand how the operator/tenant dynamic changes your controls, vendors, and incident response.</li>\n</ul>\n<ul>\n<li>Can author physical security policies, standards, and SOPs that get adopted and followed.</li>\n</ul>\n<ul>\n<li>Drive security outcomes through cross-functional partners (infrastructure, construction, real estate, compliance, legal) by shaping decisions, not by blocking them.</li>\n</ul>\n<ul>\n<li>Manage a real vendor portfolio, integrators, guard force, general contractors with SLAs, budget, and performance accountability.</li>\n</ul>\n<ul>\n<li>Adapt well when design and strategy shift mid-stream and can re-scope a program without losing momentum.</li>\n</ul>\n<ul>\n<li>Calibrate security to business reality can explain when you chose not to apply a control and why.</li>\n</ul>\n<p>Strong candidates may have</p>\n<ul>\n<li>CPP (Certified Protection Professional) or PSP (Physical Security Professional) certification.</li>\n</ul>\n<ul>\n<li>Experience standing up a data center security function from 0→1 (not just running an established one).</li>\n</ul>\n<ul>\n<li>Background in a regulated environment, critical infrastructure, financial services, federal/defense, or similar.</li>\n</ul>\n<ul>\n<li>Direct experience leading an external audit or customer security review of data center physical controls.</li>\n</ul>\n<p>Strong candidates need not have</p>\n<ul>\n<li>A specific university, credential, or prior employer. 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As a Mid-Level Programmer at d3t, you will work on a variety of programming disciplines under the guidance of our experienced programming Leads and TDs. You will work directly on features, systems, and tools for our high-profile global clients on a variety of games, platforms, and engines.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Be open to working on a variety of programming disciplines (e.g. gameplay, core tech, low level, UI, tools) on proprietary or commercial engines and targeting a variety of platforms.</li>\n<li>Write code to a high and performant standard by following expected coding standards and taking part in code reviews.</li>\n<li>Collaborate and communicate with mixed discipline internal and global teams to implement, review, and test code and systems.</li>\n<li>Own work including planning, time estimations, and updating tech leads, production, and designers on progress.</li>\n<li>Write documentation to plan and support your work.</li>\n<li>Continually update own knowledge and skill sets.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Languages: C++</li>\n<li>Engines: Professional experience in at least one of the following: Unreal, Unity, Frostbite, Proprietary</li>\n<li>Knowledge: Any of (e.g. gameplay, UI, physics, networking, memory, animation, core tech, graphics etc.)</li>\n<li>Technology: Experience with IDEs and source control</li>\n<li>Enthusiasm: Will take on any challenge</li>\n<li>Growth: A desire to learn and improve</li>\n<li>Teamwork: Enjoy working as part of a team and supporting others</li>\n<li>Communication: Clear, enthusiastic, and able to discuss technical ideas and updates with multiple disciplines</li>\n<li>Experience: 2+ years (can be inclusive of internships)</li>\n</ul>\n<p>This opportunity will be a 6-month fixed term contract (with possible extension) based in either of our UK studio sites (Daresbury or Newcastle), on a hybrid working basis. Working pattern - 3 days per week in the studio: Wednesday, Thursday, and another day of your choice. We value work/life balance and have a discretionary flexible hours system and operate a no-crunch policy as a studio.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5d302008-113","directApply":true,"hiringOrganization":{"@type":"Organization","name":"d3t","sameAs":"https://www.d3t.co.uk/","logo":"https://logos.yubhub.co/d3t.co.uk.png"},"x-apply-url":"https://apply.workable.com/j/166CBD2F1E","x-work-arrangement":"hybrid","x-experience-level":"mid","x-job-type":"contract","x-salary-range":null,"x-skills-required":["C++","Unreal","Unity","Frostbite","Proprietary","gameplay","UI","physics","networking","memory","animation","core tech","graphics"],"x-skills-preferred":[],"datePosted":"2026-04-24T13:08:56.667Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Gateshead"}},"employmentType":"CONTRACTOR","occupationalCategory":"Engineering","industry":"Technology","skills":"C++, Unreal, Unity, Frostbite, Proprietary, gameplay, UI, physics, networking, memory, animation, core tech, graphics"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_38c10a5f-35e"},"title":"CPU/Storage/PoP-WAN Program Manager","description":"<p>We are seeking a highly technical Program Manager to lead execution across CPU, Storage, PoP, and WAN infrastructure programs that directly unlock OpenAI&#39;s next generation compute capacity.</p>\n<p>In this role, you will own complex cross-functional programs spanning compute cluster activation, storage deployment, PoP bring-up, and backbone expansion. You will coordinate hardware readiness, site readiness, network pathing, storage availability, vendor execution, and engineering dependencies required to turn contracted infrastructure into live training and inference capacity.</p>\n<p>This role requires strong technical fluency across hardware systems, network infrastructure, storage architecture, and deployment execution. You should be comfortable operating from rack-level implementation details through executive-level capacity planning discussions.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Lead end-to-end execution of CPU / GPU cluster activation programs across OpenAI&#39;s global infrastructure footprint</li>\n<li>Drive readiness to convert contracted compute capacity into schedulable production clusters</li>\n<li>Own deployment programs for new PoPs, backbone nodes, WAN expansion, and interconnection initiatives</li>\n<li>Build integrated schedules spanning procurement, logistics, installation, storage readiness, network turn-up, testing, and production handoff</li>\n<li>Coordinate BOM readiness, server delivery, racks, optics, cabling, storage hardware, and vendor milestones</li>\n<li>Partner with engineering teams to align compute, storage, and networking dependencies before cluster activation</li>\n<li>Manage deployment of storage systems supporting training and inference workloads, including readiness, validation, performance checks, and scaling plans</li>\n<li>Coordinate backbone capacity expansion, cross-connects, inter-region pathing, and cloud interconnect readiness with Azure and third-party providers</li>\n<li>Lead physical deployment execution including rack-and-stack, hardware bring-up, L1 validation, and site acceptance criteria</li>\n<li>Build repeatable deployment playbooks, dashboards, governance cadences, and operating mechanisms for scale</li>\n<li>Identify risks early across supply chain, site readiness, technical constraints, and vendor execution, then drive mitigation plans</li>\n<li>Communicate milestones, escalations, and capacity forecasts to senior leadership</li>\n</ul>\n<p>Qualifications:</p>\n<ul>\n<li>8+ years of experience in technical program management, infrastructure deployment, network deployment, or data center operations</li>\n<li>Strong experience delivering programs involving compute, storage, networking, or large-scale infrastructure systems</li>\n<li>Working knowledge of servers, clusters, storage arrays, routers, switches, optics, and structured cabling</li>\n<li>Experience owning cross-functional programs across engineering, operations, supply chain, and external vendors</li>\n<li>Strong understanding of deployment lifecycles from planning and procurement through production handoff</li>\n<li>Ability to reason across physical infrastructure execution and logical systems architecture dependencies</li>\n<li>Proven ability to build integrated schedules and drive accountability across multiple stakeholders</li>\n<li>Strong executive communication skills with experience managing critical escalations and leadership updates</li>\n<li>Comfortable operating in fast-moving environments with aggressive timelines and evolving priorities</li>\n<li>Highly analytical with strong problem-solving and execution instincts</li>\n</ul>\n<p>Preferred Skills:</p>\n<ul>\n<li>Experience at a hyperscaler, cloud provider, AI infrastructure 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We get up every day, roll up our sleeves and build a better world -- together. At Ford, we’re all a part of something bigger than ourselves. Are you ready to change the way the world moves?</p>\n<p>Ford’s Electric Vehicles, Digital and Design (EVDD) team is charged with delivering the company’s vision of a fully electric transportation future. EVDD is customer-obsessed, entrepreneurial, and data-driven and is dedicated to delivering industry-leading customer experience for electric vehicle buyers and owners.</p>\n<p>Join our dynamic and agile team pioneering Ford&#39;s EV future. As a Thermal Systems Engineer focused on the coolant subsystem, you will be responsible for the &#39;circulatory system&#39; of our electric passenger vehicles. Your work is vital to vehicle safety, longevity, and efficiency, as you design the systems that regulate the temperature of the high-voltage (HV) battery, drive units, power electronics, and other components. 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Our Security team protects OpenAI&#39;s technology, people, and products. We are technical in what we build but operational in how we do our work, and we are committed to supporting all products and research at OpenAI.</p>\n<p>As part of this, our Secure Manufacturing &amp; Stealth is a dedicated function that partners closely with supply chain and operations teams to protect OpenAI&#39;s most sensitive projects. We design and enforce safeguards that ensure our innovations remain confidential until launch, while enabling our engineers and partners to move quickly and effectively. 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You will work closely with the Head of Secure Manufacturing &amp; Stealth to identify risks across production environments and ensure that appropriate safeguards are implemented throughout the hardware lifecycle. In this role, you will serve as the primary security partner to supply chain and operations teams, coordinating with engineering, legal, and external vendors to protect sensitive projects while enabling efficient manufacturing and product development.</p>\n<p>This role is based in the Asia-Pacific region. This position requires travel up to ~25% to international vendor and partner locations.</p>\n<p>In this role, you will:</p>\n<ul>\n<li>Own the strategy and execution of supply chain programs that protect OpenAI&#39;s most advanced projects and systems.</li>\n</ul>\n<ul>\n<li>Lead cross-functional initiatives with Engineering, Operations, Legal, and Security to establish controls for preventing leaks, data loss, and supply chain compromise.</li>\n</ul>\n<ul>\n<li>Conduct proactive risk assessments and investigations across production and partner environments, including third-party and vendor ecosystems.</li>\n</ul>\n<ul>\n<li>Develop, enforce, and audit policies and practices to protect confidentiality and control access at production and integration sites.</li>\n</ul>\n<ul>\n<li>Collaborate with technical and operational teams to close detection gaps, strengthen monitoring capabilities, and implement tailored countermeasures across cyber, physical, and human domains.</li>\n</ul>\n<ul>\n<li>Partner with external suppliers, vendors, and law enforcement to ensure global consistency in security practices and incident response.</li>\n</ul>\n<ul>\n<li>Continuously refine processes and security controls based on lessons learned and the evolving threat landscape.</li>\n</ul>\n<p>You might thrive in this role if you:</p>\n<ul>\n<li>Have 8+ years of experience in global production, supply chain security, product secrecy, counterintelligence, insider risk, or related investigative/operational domains.</li>\n</ul>\n<ul>\n<li>Bring a deep understanding of production environments, hardware lifecycle, and supply chain risks, with hands-on experience implementing safeguards in global operations.</li>\n</ul>\n<ul>\n<li>Demonstrate unimpeachable integrity, sound judgment, and the ability to handle confidential matters with discretion.</li>\n</ul>\n<ul>\n<li>Possess strong expertise in security tooling and risk frameworks, and physical security systems.</li>\n</ul>\n<ul>\n<li>Have proven ability to lead complex programs and write clear, actionable reports for technical and non-technical audiences.</li>\n</ul>\n<ul>\n<li>Excel at cross-functional collaboration, building trust with engineers, operations, legal, and external partners to drive adoption of security controls.</li>\n</ul>\n<p>About OpenAI</p>\n<p>OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.</p>\n<p>We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.</p>\n<p>For additional information, please see OpenAI&#39;s Affirmative Action and Equal Employment Opportunity Policy Statement.</p>\n<p>Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.</p>\n<p>To notify OpenAI that you believe this job posting is non-compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance.</p>\n<p>We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link.</p>\n<p>OpenAI Global Applicant Privacy Policy</p>\n<p>At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_d69adec5-3dd","directApply":true,"hiringOrganization":{"@type":"Organization","name":"OpenAI","sameAs":"https://openai.com/","logo":"https://logos.yubhub.co/openai.com.png"},"x-apply-url":"https://jobs.ashbyhq.com/openai/25d4cedb-62f5-47a4-b506-a637fd529a7e","x-work-arrangement":"hybrid","x-experience-level":null,"x-job-type":"Full time","x-salary-range":null,"x-skills-required":["global production","supply chain security","product secrecy","counterintelligence","insider risk","security tooling","risk frameworks","physical security systems"],"x-skills-preferred":[],"datePosted":"2026-04-24T12:23:26.418Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Seoul, South Korea; Singapore"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"global production, supply chain security, product secrecy, counterintelligence, insider risk, security tooling, risk frameworks, physical security systems"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_9987ab40-db5"},"title":"Buyer, Glass","description":"<p>We are seeking a Supply Chain Commodity Buyer to lead for Ford&#39;s North American Exterior Glass commodity into the future. The evolution of both combustion and electric vehicles (EV) is driving the need for new/additional glass technologies. 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You will operate across technical infrastructure, delivery execution, and partnership management to ensure infrastructure programs move quickly, efficiently, and reliably from buildout through operational readiness.</p>\n<p>This is a people management role requiring strong physical infrastructure experience, delivery leadership through turn-up, and the ability to navigate complex multi-partner environments with urgency and clarity.</p>\n<p><strong>Key Responsibilities:</strong></p>\n<ul>\n<li>Own operational delivery for major Stargate infrastructure programs across partner-operated datacenter campuses</li>\n</ul>\n<ul>\n<li>Serve as OpenAI’s primary delivery interface with strategic infrastructure partners</li>\n</ul>\n<ul>\n<li>Coordinate execution across construction, facilities, hardware deployment, and infrastructure operations teams</li>\n</ul>\n<ul>\n<li>Drive operational readiness for large-scale AI compute infrastructure</li>\n</ul>\n<ul>\n<li>Manage day-to-day collaboration with partner operations, construction, and delivery teams</li>\n</ul>\n<ul>\n<li>Ensure alignment between partner execution and OpenAI infrastructure priorities</li>\n</ul>\n<ul>\n<li>Identify and remove blockers impacting datacenter deployment and operational readiness</li>\n</ul>\n<ul>\n<li>Drive resolution of complex operational issues across multiple organizations</li>\n</ul>\n<ul>\n<li>Establish operational rhythms, reporting, and escalation paths for major delivery programs</li>\n</ul>\n<ul>\n<li>Work closely with internal teams including infrastructure engineering, datacenter operations, hardware deployment, networking, and supply chain</li>\n</ul>\n<ul>\n<li>Align technical execution with commercial and operational commitments</li>\n</ul>\n<ul>\n<li>Ensure infrastructure programs meet schedule, reliability, and scale targets</li>\n</ul>\n<ul>\n<li>Balance tactical operational execution with long-term infrastructure strategy</li>\n</ul>\n<ul>\n<li>Develop scalable processes for managing large infrastructure partnerships</li>\n</ul>\n<p><strong>Qualifications:</strong></p>\n<ul>\n<li>12+ years of experience in infrastructure delivery, datacenter operations, or large-scale technical program execution</li>\n</ul>\n<ul>\n<li>Experience managing complex partner relationships in infrastructure, cloud, or hyperscale environments</li>\n</ul>\n<ul>\n<li>Strong understanding of physical infrastructure operations (datacenters, facilities, construction, or network/hardware deployment)</li>\n</ul>\n<ul>\n<li>Experience coordinating cross-functional programs across engineering, operations, and external partners</li>\n</ul>\n<ul>\n<li>Ability to navigate ambiguity and drive outcomes across distributed teams</li>\n</ul>\n<p><strong>Preferred Skills:</strong></p>\n<ul>\n<li>Experience with hyperscale datacenter development or operations</li>\n</ul>\n<ul>\n<li>Experience managing infrastructure delivery with major cloud or infrastructure providers</li>\n</ul>\n<ul>\n<li>Background in construction, datacenter campus buildouts, or infrastructure deployment programs</li>\n</ul>\n<ul>\n<li>Strong operational leadership in large-scale mission-critical environments</li>\n</ul>\n<ul>\n<li>Track record of leading complex infrastructure initiatives with significant external partners</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_11cb452d-85e","directApply":true,"hiringOrganization":{"@type":"Organization","name":"OpenAI","sameAs":"https://openai.com","logo":"https://logos.yubhub.co/openai.com.png"},"x-apply-url":"https://jobs.ashbyhq.com/openai/176b9de4-a5cf-4655-987c-872da1f5fe57","x-work-arrangement":"remote","x-experience-level":"senior","x-job-type":"Full time","x-salary-range":"$230K – $335K","x-skills-required":["infrastructure delivery","datacenter operations","large-scale technical program execution","complex partner relationships","physical infrastructure operations","cross-functional programs","ambiguity and drive outcomes"],"x-skills-preferred":["hyperscale datacenter development","infrastructure delivery with major cloud or infrastructure providers","construction","datacenter campus buildouts","operational leadership in large-scale mission-critical environments"],"datePosted":"2026-04-24T12:20:45.594Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Remote - 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We get up every day, roll up our sleeves and build a better world -- together. At Ford, we’re all a part of something bigger than ourselves. Are you ready to change the way the world moves?</p>\n<p>Ford’s Electric Vehicles, Digital and Design (EVDD) team is charged with delivering the company’s vision of a fully electric transportation future. EVDD is customer-obsessed, entrepreneurial, and data-driven and is dedicated to delivering industry-leading customer experience for electric vehicle buyers and owners.</p>\n<p>As a Senior Business Architect – Transformation Lead at Ford’s ADVEV group, you will lead business and technology transformations to establish and evolve new capabilities that support Ford’s electric vehicle vision. You will define key problem statements, design new operating models and processes, and integrate these with existing infrastructure through cross-functional collaboration.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Own and deliver end-to-end transformation initiatives to establish new business capabilities supporting ADVEV objectives</li>\n<li>Lead cross-functional teams spanning Engineering, Manufacturing, IT, Supply Chain, Logistics and more to drive change in processes, tools and people</li>\n<li>Apply strategic thinking and create influence without authority when leading transformations</li>\n<li>Define clear problem statements to develop current state and future state operating models using process mapping techniques</li>\n<li>Find relevant stakeholders and conduct discovery phases, identify bottlenecks and pain points; innovate actionable solutions</li>\n<li>Manage stakeholder relationships; prioritize competing needs and scope transformation projects accordingly</li>\n<li>Apply well-formulated strategies to drive decision-making and accountability</li>\n<li>Facilitate business process acceptance and ensure smooth adoption of changes</li>\n<li>Control project scope within dynamic conditions ensuring timeline, cost, and quality goals</li>\n<li>Analyze impacts of change vs inaction, identify risks and dependencies, and develop mitigation strategies</li>\n<li>Incorporate organizational change management including communication, training and rollout of process/tool changes, to drive new capability adoption</li>\n<li>Maintain flexibility and agility to adapt to evolving stakeholder needs, organizational priorities, and navigate through setbacks and uncertainties</li>\n</ul>\n<p>Qualifications:</p>\n<ul>\n<li>Bachelor&#39;s degree in Engineering, Business, or equivalent experience</li>\n<li>Minimum 5 years of experience in business architecture, transformation, or consulting roles within organizations designing and manufacturing complex hardware products; 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The role is driven by the need to mitigate risk, ensure operational continuity, and comply with industry security standards while supporting OpenAI&#39;s growth objectives.</p>\n<p>The ideal candidate will not only safeguard our data center&#39;s physical environments but contribute to building scalable, future-proof security systems that evolve with OpenAI&#39;s growth.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Overseeing the design and implementation of physical security features, including vehicle controls, physical barriers, secure doors, and man traps.</li>\n<li>Collaborating with architects and engineers to incorporate security measures during the design phase.</li>\n<li>Managing the deployment of CCTV, access control systems, alarms, and monitoring solutions.</li>\n<li>Working with IT and security teams to integrate physical security systems with network infrastructure.</li>\n<li>Managing the installation, and commissioning of technical security systems for assigned regions.</li>\n<li>Developing and implementing security operations protocols for data center sites.</li>\n<li>Ensuring regular maintenance, testing, and upgrades of security systems.</li>\n<li>Training and supporting on-site security teams in system operations and emergency procedures.</li>\n<li>Serving as the primary point of contact for all physical security technology matters during construction and operational phases within the region.</li>\n<li>Liaising with internal teams, external partners, and vendors to align security measures with organizational goals.</li>\n<li>Ensuring compliance with industry standards and best practices for data center security.</li>\n<li>Conducting regular security audits and providing recommendations for continuous improvement.</li>\n</ul>\n<p>The role is preferred to be based in San Francisco, Seattle or New York City but may consider remote work. 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Ability and willingness to travel approximately 25% to regional and international locations to support data center security operations, audits, and risk assessments.</p>\n<p>You might thrive in this role if you have:</p>\n<ul>\n<li>Professional Experience: 12+ years in corporate security and/or law enforcement/military environments.</li>\n<li>Physical security: 7+ years of leadership and experience in data center physical security operational environments.</li>\n<li>Technical Experience: Implementing and optimizing advanced security technologies,such as access control, surveillance, visitor management systems, and intrusion detection systems.</li>\n<li>Vendor Management: A successful track record of evaluating and managing third-party security vendors and contracted services.</li>\n<li>Relationship Building: Demonstrated ability to partner effectively with internal teams and external agencies, forging strong, collaborative relationships.</li>\n<li>Audit and Assessment: Proven skill in conducting industry audits and assessing physical security risk to ensure data centers meet and exceed industry standards and best practices.</li>\n<li>Adaptability &amp; Resilience: Comfortable working in a dynamic environment, swiftly pivoting in response to emerging threats or organizational changes.</li>\n</ul>\n<p>We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_790b7914-f76","directApply":true,"hiringOrganization":{"@type":"Organization","name":"OpenAI","sameAs":"https://openai.com","logo":"https://logos.yubhub.co/openai.com.png"},"x-apply-url":"https://jobs.ashbyhq.com/openai/762a9c07-2c58-4b65-ada0-1fd30aeae803","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"Full time","x-salary-range":"$203K – $225K • Offers Equity","x-skills-required":["physical security","access control","surveillance","visitor management systems","intrusion detection systems","vendor management","relationship building","audit and assessment","adaptability","resilience"],"x-skills-preferred":[],"datePosted":"2026-04-24T12:18:55.815Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco"}},"employmentType":"FULL_TIME","occupationalCategory":"Security","industry":"Technology","skills":"physical security, access control, surveillance, visitor management systems, intrusion detection systems, vendor management, relationship building, audit and assessment, adaptability, resilience","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":203000,"maxValue":225000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_17f76fc7-8cf"},"title":"Risk Analyst, Corporate Security","description":"<p><strong>Compensation</strong></p>\n<p>$142.5K – $245K • Offers Equity</p>\n<p>The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. 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In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.</p>\n<p><strong>Benefits</strong></p>\n<ul>\n<li>Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts</li>\n</ul>\n<ul>\n<li>Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)</li>\n</ul>\n<ul>\n<li>401(k) retirement plan with employer match</li>\n</ul>\n<ul>\n<li>Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)</li>\n</ul>\n<ul>\n<li>Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees</li>\n</ul>\n<ul>\n<li>13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)</li>\n</ul>\n<ul>\n<li>Mental health and wellness support</li>\n</ul>\n<ul>\n<li>Employer-paid basic life and disability coverage</li>\n</ul>\n<ul>\n<li>Annual learning and development stipend to fuel your professional growth</li>\n</ul>\n<ul>\n<li>Daily meals in our offices, and meal delivery credits as eligible</li>\n</ul>\n<ul>\n<li>Relocation support for eligible employees</li>\n</ul>\n<ul>\n<li>Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.</li>\n</ul>\n<p><strong>About the Team</strong></p>\n<p>The Corporate Security team at OpenAI is dedicated to ensuring the safety and security of our people and facilities. We focus on advancing artificial intelligence responsibly while safeguarding our technologies and intellectual properties worldwide.</p>\n<p><strong>About the Role</strong></p>\n<p>As the Risk Analyst, you will spearhead efforts to identify and mitigate physical security risks associated with potential threats to OpenAI&#39;s employees, executives, and facilities globally. This role is pivotal in maintaining a secure environment, allowing for the uninterrupted progression of our AI technologies.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Conduct ongoing assessments to identify and analyze potential physical security threats and counterintelligence concerns related to OpenAI&#39;s personnel and facilities.</li>\n</ul>\n<ul>\n<li>Develop and implement risk mitigation strategies that complement the existing crisis management and cybersecurity measures.</li>\n</ul>\n<ul>\n<li>Maintain active liaison with federal law enforcement and intelligence agencies in the US and abroad to ensure timely sharing of threat intelligence.</li>\n</ul>\n<ul>\n<li>Work closely with the Crisis Management and Information Security teams to ensure a coordinated and comprehensive approach to organizational security.</li>\n</ul>\n<ul>\n<li>Support other Corporate Security programs, including executive protection and event security, ensuring alignment with risk management strategies.</li>\n</ul>\n<ul>\n<li>Prepare and present detailed security risk reports and strategic mitigation plans to senior management.</li>\n</ul>\n<ul>\n<li>Assist in the design and delivery of security training programs focused on physical security and counterintelligence awareness and practices.</li>\n</ul>\n<ul>\n<li>Travel 25-30% of the time for city, market and site assessment (both domestic and international).</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>Possess a Bachelor’s degree in security management, criminal justice, or a related field; a Master’s degree is preferred.</li>\n</ul>\n<ul>\n<li>Have substantial experience (6+ years) in managing physical security and counterintelligence risks in both a corporate and governmental environment.</li>\n</ul>\n<ul>\n<li>Exhibit strong leadership and communication skills, with the ability to collaborate effectively with various internal and external stakeholders.</li>\n</ul>\n<ul>\n<li>Are adept at strategic planning and problem-solving within a high-security context.</li>\n</ul>\n<ul>\n<li>Have experience conducting liaison with federal and international law enforcement and intelligence agencies.</li>\n</ul>\n<ul>\n<li>Hold or are capable of obtaining a security clearance as required.</li>\n</ul>\n<p><strong>About OpenAI</strong></p>\n<p>OpenAI is an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_17f76fc7-8cf","directApply":true,"hiringOrganization":{"@type":"Organization","name":"OpenAI","sameAs":"https://openai.com/","logo":"https://logos.yubhub.co/openai.com.png"},"x-apply-url":"https://jobs.ashbyhq.com/openai/8ec58023-f644-4e92-b384-72f8db83cd33","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"Full time","x-salary-range":"$142.5K – $245K","x-skills-required":["security management","criminal justice","physical security","counterintelligence","risk analysis","strategic planning","problem-solving","leadership","communication","collaboration"],"x-skills-preferred":[],"datePosted":"2026-04-24T12:17:48.515Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"New York City; Seattle; Washington, DC"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"security management, criminal justice, physical security, counterintelligence, risk analysis, strategic planning, problem-solving, leadership, communication, collaboration","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":142500,"maxValue":245000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_60337c07-55f"},"title":"Lead, Data Center Physical Security Operations (North America)","description":"<p>As Anthropic&#39;s Lead for Data Center Security Operations in North America, you will own the physical security program across our NA data center footprint , spanning owned sites and colocation partners. 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He also suggests joining online communities and forums to stay connected with other professionals in the field and learn about new developments and techniques.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_d7c57c55-9e5","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Williams F1 Team","sameAs":"https://careers.williamsf1.com","logo":"https://logos.yubhub.co/careers.williamsf1.com.png"},"x-apply-url":"https://careers.williamsf1.com/job/senior-systems-engineer-in-grove-wantage-jid-363","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["computational fluid dynamics (CFD)","aerodynamics","data analysis","design development","testing"],"x-skills-preferred":["mathematics","physics","problem-solving","communication"],"datePosted":"2026-04-24T12:15:06.052Z","employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Motorsport","skills":"computational fluid dynamics (CFD), aerodynamics, data analysis, design development, testing, mathematics, physics, problem-solving, communication"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4d8d8fcc-050"},"title":"DIA Maching Lrng Eng","description":"<p>At Ford Motor Company, we believe freedom of movement drives human progress. We also believe in providing you with the freedom to define and realize your dreams. With our incredible plans for the future of mobility, we have a wide variety of opportunities for you to accelerate your career potential as you help us define tomorrow’s transportation.</p>\n<p>The future of smart mobility hinges on the intelligent application of data, metrics, and analytics. As part of our Global Data Insight &amp; Analytics (GDI&amp;A) team, you&#39;ll play a pivotal role. We serve as Ford&#39;s trusted advisers, providing clear insights into business conditions, customer needs, and the competitive environment. Our work empowers key decision-makers to act decisively and positively. By leveraging your expertise in data and analytics, you can contribute to timely, evidence-based decision-making.</p>\n<p>Ford&#39;s GDI&amp;A department is on the hunt for talented individuals skilled in Machine Learning, Big Data, Statistics, Econometrics, and Optimization. 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on our Tactical Recon &amp; Strike team, you&#39;ll be at the forefront of cutting-edge autonomous systems development. You&#39;ll tackle diverse challenges in autonomy, systems integration, robotics, and networking, making critical engineering decisions that directly impact mission success.</p>\n<p>Your role will be pivotal in ensuring Anduril&#39;s products work seamlessly together to achieve a variety of crucial outcomes. You&#39;ll develop innovative solutions for complex robotics problems, balance pragmatic engineering trade-offs with mission-critical requirements, and collaborate across teams to integrate software with hardware systems.</p>\n<p>Contributing to the entire product lifecycle, from concept to deployment, you&#39;ll rapidly prototype and iterate on software solutions. We&#39;re looking for someone who thrives in a fast-paced environment and isn&#39;t afraid to tackle ambiguous problems. Your &#39;Whatever It Takes&#39; mindset will be key in executing tasks efficiently, scalably, and pragmatically, always keeping the mission at the forefront of your work.</p>\n<p>This role offers the opportunity to make a significant impact on next-generation defense technology, working with state-of-the-art robotics and autonomous systems. You&#39;ll be part of a team that values innovation, quick iteration, and delivering high-quality solutions that meet real-world needs.</p>\n<p>Must be eligible to obtain and maintain an active U.S. Secret security clearance. This position will be located at our office in Atlanta, GA (relocation benefits provided.)</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Develop and maintain core robotics libraries, including frame transformations, targeting, and guidance systems, that will be utilized across all Anduril robotics platforms</li>\n</ul>\n<ul>\n<li>Lead the development and implementation of major features for our products, such as designing and building Software-in-the-Loop simulators for advanced systems like Altius</li>\n</ul>\n<ul>\n<li>Lead and mentor a group software engineers to help drive team success and to successfully hit tight project deadlines</li>\n</ul>\n<ul>\n<li>Optimize performance of existing products, primarily focused on our Altius Drone product line</li>\n</ul>\n<ul>\n<li>Collaborate closely with hardware and manufacturing teams throughout the product development lifecycle, providing timely feedback to influence and enhance final hardware designs</li>\n</ul>\n<ul>\n<li>Troubleshoot and resolve complex issues in deployed systems, ensuring optimal performance in the field</li>\n</ul>\n<ul>\n<li>Contribute to the design and implementation of multi-agent coordination systems for UAVs</li>\n</ul>\n<ul>\n<li>Participate in the full software development lifecycle, from concept and design through testing and deployment</li>\n</ul>\n<ul>\n<li>Stay current with emerging technologies and industry trends, recommending and implementing innovations to improve our products and processes</li>\n</ul>\n<p>Required Qualifications:</p>\n<ul>\n<li>Bachelor&#39;s degree in Robotics, Computer Science, or related field</li>\n</ul>\n<ul>\n<li>7+ years of professional software development experience</li>\n</ul>\n<ul>\n<li>Experience as a lead of a small software engineering team</li>\n</ul>\n<ul>\n<li>Strong proficiency in C++ or Rust, with experience in Linux development environments</li>\n</ul>\n<ul>\n<li>Demonstrated expertise in data structures, algorithms, concurrency, and code optimization</li>\n</ul>\n<ul>\n<li>Proven experience troubleshooting and analyzing remotely deployed software systems</li>\n</ul>\n<ul>\n<li>Hands-on experience working with and testing electrical and mechanical systems</li>\n</ul>\n<ul>\n<li>Ability to collaborate effectively with cross-functional teams, including hardware and manufacturing</li>\n</ul>\n<ul>\n<li>Strong problem-solving skills and a &#39;Whatever It Takes&#39; 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Experience with reliability engineering, SLA development, and failure-mode analysis.</li>\n</ul>\n<ul>\n<li>Proficiency in statistical modeling and simulation for infrastructure capacity or power utilization.</li>\n</ul>\n<ul>\n<li>Familiarity with SCADA/BMS/EPMS, telemetry pipelines, and control systems. Experience building software that bridges IT and OT.</li>\n</ul>\n<ul>\n<li>Exposure to accelerator deployments and their power management interfaces strongly preferred.</li>\n</ul>\n<ul>\n<li>Demand response, grid interaction, or behind-the-meter generation experience is a plus.</li>\n</ul>\n<ul>\n<li>Ability to translate between infrastructure engineering, software teams, and external partners.</li>\n</ul>\n<p><strong>Required Qualifications</strong></p>\n<ul>\n<li>Bachelor&#39;s degree in Electrical Engineering, Mechanical Engineering, Power Systems, Controls Engineering, or a related field.</li>\n</ul>\n<ul>\n<li>5+ years of experience in data center infrastructure or facility engineering.</li>\n</ul>\n<ul>\n<li>Demonstrated experience with data center power distribution and cooling system architectures.</li>\n</ul>\n<ul>\n<li>Experience building or operating software-based power management, load scheduling, or control systems.</li>\n</ul>\n<ul>\n<li>Proficiency in Python or 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you&#39;ll utilise best-in-class technology to identify potential business disruptions as early as possible and streamline critical emergency response and notification to minimise impact to our people, assets, operations, or brand reputation.</p>\n<p>This position is needed to maintain a broad situational awareness over internal and external physical events that could impact employee safety or pose a threat to business assets or operations across Twilio&#39;s global footprint.</p>\n<p>GSOC Operators monitor a variety of data sources including internal access control systems, external incident aggregators, travel safety applications, and general open source reporting materials.</p>\n<p>GSOC Operators serve as the primary contact for employees with physical safety and security questions or concerns.</p>\n<p>When an incident occurs, the GSOC Operator may dispatch security resources, escalate to crisis management teams, send broad communications to Twilio employees, or execute a mass notification to account for employee safety.</p>\n<p>Responsibilities:</p>\n<p>Monitoring and Surveillance - Utilise various physical security asset monitoring and surveillance systems to detect potential unauthorized access, suspicious activity, or other security incidents</p>\n<p>Monitor open-source threat intelligence and other internal SaaS tools to maintain situational awareness of persistent or emergency global events with potential or direct impact to operations</p>\n<p>Security Operations Support - Support access control and visitor management processes</p>\n<p>Manage security-related calls for service and provide general guidance to employees, vendors, and guests</p>\n<p>Maintain awareness of business travellers and personnel accessing Twilio facilities</p>\n<p>Partner with local site security teams to escalate and dispatch resources for incident and alarm response</p>\n<p>Review travel requests to elevated risk locations, assist travellers through the approval process, and cross-reference live itineraries with external incidents</p>\n<p>Incident Management - Perform the first point of incident intake across a variety of emergencies, including medical emergencies, natural disasters, fire/evacuation, travel disruptions, and security incidents</p>\n<p>Assess and triage events and incidents to determine their impact to operations</p>\n<p>Dispatch and coordinate response with emergency response personnel</p>\n<p>Communicate effectively on emerging incidents to large audiences to share situational awareness or tactical updates as warranted</p>\n<p>Maintain real-time incident documentation for reporting and analysis</p>\n<p>Perform Life-Safety checks for Twilio in areas impacted by potentially life-threatening conditions</p>\n<p>Participate in post-incident reviews to document and implement corrective action and improvements to future response</p>\n<p>Operational Excellence - Maintain a strong understanding of security and emergency standard operating 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written</li>\n</ul>\n<ul>\n<li>Ability to work &#39;non-standard&#39; shift hours, to overlap as needed with colleagues and stakeholders in other global locations, including weekend and holiday hours</li>\n</ul>\n<ul>\n<li>English Language Proficiency</li>\n</ul>\n<p>Desired:</p>\n<ul>\n<li>Customer service mindset</li>\n</ul>\n<ul>\n<li>Comfortable with a high-tech work environment</li>\n</ul>\n<ul>\n<li>Eager to learn new tools and processes</li>\n</ul>\n<ul>\n<li>Ability to work independently and as part of a team</li>\n</ul>\n<ul>\n<li>Proficiency in Google Suite</li>\n</ul>\n<p>Additional Language Proficiency</p>\n<p>Shift Details: Variable (8–10-hour shifts)</p>\n<p>Must be flexible to work holidays, weekends, and occasional overtime.</p>\n<p>Travel: Approximately 10% travel is anticipated to help you participate in project or team in-person meetings to help you connect in a meaningful way.</p>\n<p>What We Offer:</p>\n<p>Working at Twilio offers many benefits, including competitive pay, generous time off, ample parental and wellness leave, healthcare, a retirement savings programme, and much more. Offerings vary by location.</p>\n<p>Compensation:</p>\n<ul>\n<li>Please note this role is open to candidates outside of California, Colorado, Hawaii, Illinois, Maryland, Massachusetts, Minnesota, New Jersey, New York, Vermont, Washington D.C., and Washington State.</li>\n</ul>\n<p>The estimated pay ranges for this role are as follows:</p>\n<ul>\n<li>Based in Colorado, Hawaii, Illinois, Maryland, Massachusetts, Minnesota, Vermont or Washington D.C.: $26.27 - $32.84</li>\n</ul>\n<ul>\n<li>Based in New York, New Jersey, Washington State, or California (outside of the San Francisco Bay area): $27.77 - $34.71</li>\n</ul>\n<ul>\n<li>Based in the San Francisco Bay area, California: $30.85 - $38.56</li>\n</ul>\n<ul>\n<li>This role may be eligible to participate in Twilio&#39;s equity plan and corporate bonus plan.</li>\n</ul>\n<p>All roles are generally eligible for the following benefits: health care insurance, 401(k) retirement account, paid sick time, paid personal time off, paid parental leave.</p>\n<p>The successful candidate&#39;s starting salary will be determined based on permissible, non-discriminatory factors such as skills, experience, and geographic location.</p>\n<p>Applications for this role are intended to be accepted until November 15 but may change based on business needs.</p>\n<p>Twilio thinks big. Do you? We like to solve problems, take initiative, pitch in when needed, and are always up for trying new things. That&#39;s why we seek out colleagues who embody our values , something we call Twilio Magic. Additionally, we empower employees to build positive change in their communities by supporting their volunteering and donation efforts. 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