{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/pcie-and-cxl-protocols"},"x-facet":{"type":"skill","slug":"pcie-and-cxl-protocols","display":"Pcie And Cxl Protocols","count":1},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_ec579fde-89b"},"title":"R&D Engineering, Architect- FPGA Design-PCIe Protocol","description":"<p>You are a visionary engineering leader with deep expertise in FPGA design and advanced protocol integration, ready to architect and deliver solutions that bridge real-world interfaces with cutting-edge emulation and prototyping platforms.</p>\n<p>Designing, developing, and maintaining Speed Adapter solutions for advanced protocols, including PCIe and CXL.\nImplementing protocol functionality on FPGA-based platforms to bridge real-world I/O with DUTs running at reduced speeds on emulation and prototyping systems.\nCollaborating with IP, emulation, and prototyping teams to deliver comprehensive, end-to-end system-level validation solutions.\nDeveloping and debugging RTL, firmware, and system-level components for Speed Adapter products.\nSupporting seamless integration with ZeBu and HAPS platforms, including creating example designs and reference flows.\nParticipating in customer escalations, conducting root-cause analysis, and delivering solutions for complex system-level issues.\nContributing to roadmap planning, feature definition, and technical differentiation versus competitive solutions.</p>\n<p>Enable customers to connect pre-silicon designs to real devices, testers, and hosts with unmatched fidelity and performance.\nAdvance industry-leading system-level validation technology for top semiconductor and hyperscale customers.\nShape the adoption and implementation of next-generation protocols such as PCIe Gen6/Gen7 and CXL3.x/4.0.\nDrive innovation in hardware-assisted verification, influencing patent-pending technologies that differentiate Synopsys solutions.\nEnhance integration across IP, emulation, prototyping, and real-world connectivity to deliver robust validation platforms.\nSupport global teams and customers, fostering technical excellence and collaborative problem-solving.</p>\n<p>12 years+ relevant experience\nBachelor&#39;s or Master&#39;s degree in Electrical Engineering, Computer Engineering, or related field.\nStrong hands-on experience with PCIe and/or CXL protocols, including implementation and debugging.\nSolid understanding of digital design, RTL development, and FPGA-based systems.\nExperience with system-level validation, emulation, or prototyping environments.\nFamiliarity with high-speed serial interfaces and real-world I/O connectivity.\nStrong debugging skills across RTL, firmware, and hardware/software boundaries.\nAbility to work effectively in a cross-geography, cross-functional team.</p>\n<p>Innovative thinker with a strategic mindset.\nCollaborative team player who values diverse perspectives.\nExcellent communicator and technical mentor.\nResilient problem-solver, able to navigate ambiguity and complexity.\nCustomer-focused, with a commitment to delivering high-impact solutions.\nAdaptable and proactive, eager to stay ahead in a fast-evolving technology landscape.</p>\n<p>You&#39;ll join the Speed Adapter engineering team within Synopsys&#39; HW-Assisted Verification (HAV) organization.\nThis talented group is dedicated to developing and deploying industry-leading Speed Adapter solutions that bridge advanced protocols and real-world interfaces with ZeBu emulation and HAPS prototyping platforms.\nThe team collaborates globally across IP, emulation, and prototyping domains to deliver robust, high-performance system validation solutions, directly impacting the success of top semiconductor and hyperscale customers.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.\nOur total rewards include both monetary and non-monetary offerings.\nYour recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work.\nSynopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses.\nSynopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package.\nThe actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education.\nYour recruiter can share more specific details on the total rewards package upon request.</p>\n<p>At Synopsys, innovation is driven by our incredible team around the world.\nWe feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day.\nWe&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_ec579fde-89b","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/r-and-d-engineering-architect-fpga-design-pcie-protocol/44408/92655118112","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$208,000 - $312,000","x-skills-required":["FPGA design","Advanced protocol integration","PCIe and CXL protocols","Digital design","RTL development","System-level validation","Emulation and prototyping environments","High-speed serial interfaces","Real-world I/O connectivity","Debugging skills"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:22:28.918Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"FPGA design, Advanced protocol integration, PCIe and CXL protocols, Digital design, RTL development, System-level validation, Emulation and prototyping environments, High-speed serial interfaces, Real-world I/O connectivity, Debugging skills","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":208000,"maxValue":312000,"unitText":"YEAR"}}}]}