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YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_b3746239-557"},"title":"HPC Network Engineer","description":"<p>As an HPC Network Engineer at Mistral AI, you will design, deploy, and optimize high-performance network infrastructures for our HPC clusters and AI workloads. You will collaborate with cross-functional teams to ensure seamless integration of networking solutions with our compute, storage, and cloud platforms.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li><p>Design, implement, and optimize high-performance, low-latency network architectures for HPC environments, including InfiniBand, RoCE, and high-speed Ethernet.</p>\n</li>\n<li><p>Collaborate with HPC, DevOps, and AI research teams to integrate networking solutions with compute clusters, storage systems, and cloud platforms.</p>\n</li>\n<li><p>Troubleshoot and resolve complex network issues to minimize downtime and maximize performance.</p>\n</li>\n<li><p>Follow escalation procedures and ensure solutions are provided in a timely manner. Ensure escalation is progressing accordingly with the given severity.</p>\n</li>\n<li><p>Monitor network performance, capacity, and security, implementing improvements as needed.</p>\n</li>\n<li><p>Stay updated with emerging HPC networking technologies and best practices, and drive their adoption within Mistral.</p>\n</li>\n<li><p>Develop and maintain documentation for network architectures, configurations, and operational procedures.</p>\n</li>\n</ul>\n<p>Qualifications &amp; Experience:</p>\n<p>Technical Skills:</p>\n<ul>\n<li><p>Proficiency in HPC networking protocols (InfiniBand, RoCE, TCP/IP, MPLS).</p>\n</li>\n<li><p>Hands-on experience with network hardware (switches, routers, NICs) from vendors like Mellanox, Cisco, or Arista.</p>\n</li>\n<li><p>Knowledge of network automation tools (Ansible, Python scripting).</p>\n</li>\n<li><p>Familiarity with HPC environments, parallel computing, and distributed systems.</p>\n</li>\n<li><p>Experience with network security best practices.</p>\n</li>\n</ul>\n<p>Soft Skills:</p>\n<ul>\n<li><p>Strong problem-solving and analytical skills.</p>\n</li>\n<li><p>Ability to thrive in a fast-paced, collaborative environment.</p>\n</li>\n<li><p>Excellent communication skills (English required; French is a plus).</p>\n</li>\n<li><p>Teaching and documentation skills to ensure knowledge is archived and distributed to team members.</p>\n</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_b3746239-557","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Mistral AI","sameAs":"https://mistral.ai","logo":"https://logos.yubhub.co/mistral.ai.png"},"x-apply-url":"https://jobs.lever.co/mistral/6857fa38-ce30-4513-9930-acf7d78d42ed","x-work-arrangement":"hybrid","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["HPC networking protocols","InfiniBand","RoCE","TCP/IP","MPLS","network hardware","switches","routers","NICs","Mellanox","Cisco","Arista","network automation tools","Ansible","Python scripting","HPC environments","parallel computing","distributed systems","network security best practices"],"x-skills-preferred":[],"datePosted":"2026-04-17T12:47:44.875Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"France, USA, UK, Germany, Singapore"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"HPC networking protocols, InfiniBand, RoCE, TCP/IP, MPLS, network hardware, switches, routers, NICs, Mellanox, Cisco, Arista, network automation tools, Ansible, Python scripting, HPC environments, parallel computing, distributed systems, network security best practices"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_84d9536b-d9b"},"title":"Staff R&D Compilation Engineer – ZeBu Emulation Platform","description":"<p>Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.</p>\n<p>They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Design, implement, and optimize compilation algorithms for mapping large-scale processor hardware descriptions onto the ZeBu emulator</li>\n<li>Develop scalable solutions to handle multi-billion-gate designs within tight runtime and memory constraints</li>\n<li>Apply advanced problem-solving skills to debug complex compilation, placement, and performance issues</li>\n<li>Develop and maintain high-quality, modular, and extensible object-oriented software in C++</li>\n<li>Collaborate closely with hardware architects, performance engineers, and emulator platform teams to ensure seamless integration and performance</li>\n<li>Contribute to continuous improvement of compilation flows, algorithms, and infrastructure for enhanced efficiency and robustness</li>\n<li>Participate in code reviews, design discussions, and knowledge sharing sessions with the broader engineering community</li>\n</ul>\n<p><strong>Impact</strong></p>\n<ul>\n<li>Enable leading semiconductor companies to verify next-generation processor designs before commercialization</li>\n<li>Drive performance and scalability improvements, reducing compile and placement times for massive hardware designs</li>\n<li>Advance state-of-the-art compilation technologies in emulation, directly shaping the future of chip verification</li>\n<li>Enhance robustness and reliability of the ZeBu emulation platform, ensuring successful deployment in real-world scenarios</li>\n<li>Foster innovation and collaboration within the ZeBu Compiler Team and across Synopsys engineering groups</li>\n<li>Support industry leaders in achieving faster time-to-market for their products through efficient emulation workflows</li>\n<li>Champion best practices in software engineering, contributing to the overall quality and maintainability of the codebase</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>3-5 years of relevant experience</li>\n<li>Strong skills in problem solving and algorithmic thinking, with proven experience in tackling challenging technical problems</li>\n<li>Solid expertise in object-oriented programming (preferably C++)</li>\n<li>Deep understanding of data structures and algorithms, with the ability to design efficient and scalable solutions</li>\n<li>Experience working with complex systems and large codebases</li>\n<li>Strong analytical skills and meticulous attention to detail</li>\n<li>Exposure to performance optimization, memory efficiency, or parallel computing (preferred)</li>\n<li>Familiarity with hardware description languages (Verilog, SystemVerilog, VHDL) (preferred)</li>\n<li>Experience with emulation, FPGA, EDA tools, or large-scale system software (preferred)</li>\n</ul>\n<p><strong>Team</strong></p>\n<p>You’ll join the ZeBu Compiler Team,a group of passionate engineers dedicated to advancing emulation technology for the world’s leading semiconductor companies. The team focuses on developing innovative compilation algorithms, scalable software solutions, and robust infrastructure to enable efficient verification of massive hardware designs. Collaboration, knowledge sharing, and a commitment to excellence define the team’s culture, empowering each member to make a meaningful impact.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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As part of our team, you will work on our Autonomous Driving Platform software, implementing performant and scalable solutions for data collection and autonomous vehicle fleets.</p>\n<p>Our team is responsible for developing platform and middleware features for self-driving cars. This includes software that interacts with various sensors including Cameras, LIDAR, RADAR, GPS, IMU, Vehicle CAN etc. We are seeking candidates with interests in inventing, developing, and maintaining application framework and tools on multi-computer and heterogeneous architectures.</p>\n<p>The role encompasses working with various teams across the stack, from platform and embedded software to cloud infrastructure, underpinned by safety and performance. It extends an opportunity to contribute to the technology that will drive the cars of the future!</p>\n<p><strong>What you&#39;ll be doing:</strong></p>\n<ul>\n<li>Integrating sensors into our AV driving software stack.</li>\n<li>Develop and improve startup user experience of our AV stack</li>\n<li>Working on areas such as sensor abstraction layers, data processing and performance optimization, data serialization, and service frameworks.</li>\n<li>Collaborate with hardware, platform software, product, safety, performance, algorithms and cloud teams.</li>\n</ul>\n<p><strong>What we need to see:</strong></p>\n<ul>\n<li>BS or MS degree in Computer Science, Electrical Engineering, or related field (or equivalent experience).</li>\n<li>6+ year of professional experience working on system software.</li>\n<li>Excellent programming skills in C++, C and Python.</li>\n<li>Familiarity with source control tools.</li>\n<li>Solid understanding of Linux, QNX, ROS, and/or real-time operating systems.</li>\n<li>Experience in developing user-space system software, with a willingness to delve into kernel-space and/or low-level hardware when needed.</li>\n<li>Knowledge about embedded system programming, threading, mutex, synchronization, communication, and parallel computing to build highly-scalable and efficient applications.</li>\n<li>Familiarity with hardware architecture for CPU/GPU and memory alongside performance.</li>\n<li>Prior experience working in the following areas: Autonomous Vehicles, Robotics, Self-Driving-Cars, GPU technology, Embedded Systems, Computer Vision.</li>\n<li>Outstanding communication skills and teamwork.</li>\n</ul>\n<p><strong>Ways to stand out from the crowd:</strong></p>\n<ul>\n<li>Deep understanding of system architecture, CPU/GPU/Memory/Storage, everything related to performance optimization.</li>\n<li>Experience in Autonomous Vehicle or Robotic System Building.</li>\n<li>Hand-on experience in embedded development, operating systems and real-time software.</li>\n</ul>\n<p>You will also be eligible for equity and benefits.</p>\n<p>Applications for this job will be accepted at least until March 13, 2026.</p>\n<p>This posting is for an existing vacancy.</p>\n<p>NVIDIA uses AI tools in its recruiting processes.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_93964b93-680","directApply":true,"hiringOrganization":{"@type":"Organization","name":"NVIDIA","sameAs":"https://nvidia.wd5.myworkdayjobs.com","logo":"https://logos.yubhub.co/nvidia.com.png"},"x-apply-url":"https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-System-Software-Engineer---AV-Platform_JR2014181","x-work-arrangement":null,"x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["C++","C","Python","Linux","QNX","ROS","Real-time operating systems","Embedded system programming","Threading","Mutex","Synchronization","Communication","Parallel computing","Hardware architecture","CPU","GPU","Memory","Autonomous Vehicles","Robotics","Self-Driving-Cars","GPU technology","Embedded Systems","Computer Vision"],"x-skills-preferred":[],"datePosted":"2026-03-09T20:43:40.797Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Santa Clara"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C++, C, Python, Linux, QNX, ROS, Real-time operating systems, Embedded system programming, Threading, Mutex, Synchronization, Communication, Parallel computing, Hardware architecture, CPU, GPU, Memory, Autonomous Vehicles, Robotics, Self-Driving-Cars, GPU technology, Embedded Systems, Computer Vision"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_dc4c75ca-c4c"},"title":"Sr. Staff R&D Engineer, OPC & ILT Machine Learning Modeling","description":"<p>You are an accomplished and innovative engineer with a deep passion for tackling complex, physics-driven challenges in high-performance software environments. Your expertise in Python and C++ stands out, alongside your proficiency in parallel computing, statistical analysis, and optimization. Collaborative by nature, you communicate effectively and enjoy working with diverse, cross-functional teams, sharing knowledge and learning from others. You are motivated by the prospect of continuous learning and growth, and you embrace new technologies such as machine learning, computational lithography, and advanced image processing. Your drive for excellence, adaptability, and enthusiasm for innovation make you a critical contributor to complex engineering projects. If you are looking to make a tangible impact in the world of semiconductor software, and you enjoy solving hard problems while modernizing infrastructure, this opportunity is designed for you.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Maintaining and improving existing functionalities within advanced modeling software platforms.</li>\n<li>Understanding and translating technical requirements from customers into robust model solutions.</li>\n<li>Designing innovative, physics-driven model solutions by analyzing measurement data and proposing sophisticated algorithms.</li>\n<li>Creating detailed specifications and comprehensive test plans for proposed model solutions.</li>\n<li>Collaborating with cross-functional teams—including software, hardware, and customer-facing groups—to ensure seamless solution integration.</li>\n<li>Applying modern computational techniques to optimize performance and scalability of modeling components.</li>\n<li>Exploring new modeling approaches and integrating machine learning and image processing methods.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Enhancing Synopsys Proteus OPC modeling solutions to meet the evolving needs of semiconductor customers worldwide.</li>\n<li>Driving innovation in computational lithography and etch modeling, enabling cutting-edge chip design and fabrication.</li>\n<li>Modernizing infrastructure, improving efficiency, and reducing time-to-market for new technology releases.</li>\n<li>Solving challenging problems in advanced software engineering, contributing to Synopsys’ reputation as a technology leader.</li>\n<li>Expanding the capabilities of regression and modeling tools, supporting key industry advancements.</li>\n<li>Enabling successful integration of new modeling techniques, ensuring scalability and reliability for customers.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MS in CS/EE/Physics/Applied Math or related fields with 8+ years of experience, or PhD with 5+ years.</li>\n<li>Strong programming skills in Python and C++.</li>\n<li>Expertise in data structures and algorithms, with proven experience in parallel computing.</li>\n<li>Deep understanding of physical modeling and statistical analysis/optimization.</li>\n<li>Experience in image/polygon processing; preferred exposure to machine learning, image processing, and computational lithography.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Excellent communicator, able to convey complex concepts clearly to technical and non-technical audiences.</li>\n<li>Team player who values collaboration and thrives in a diverse, multidisciplinary environment.</li>\n<li>Curious and eager to learn, always seeking new ways to improve and innovate.</li>\n<li>Detail-oriented with strong analytical and problem-solving skills.</li>\n<li>Adaptable, resilient, and comfortable tackling ambiguous challenges.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join the Synopsys Proteus OPC modeling team, a group dedicated to advanced regression and etch modeling solutions. The team’s core focus is on developing and optimizing model components, exploring new modeling techniques, and modernizing infrastructure to address challenging problems in advanced software engineering. You’ll work alongside experts in computational lithography and software development, collaborating to deliver industry-leading solutions for semiconductor manufacturing.</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_dc4c75ca-c4c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/sr-staff-r-and-d-engineer-opc-and-ilt-machine-learning-modeling-15156/44408/91697076384","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$165000-$248000","x-skills-required":["Python","C++","Parallel computing","Statistical analysis","Optimization","Image processing","Machine learning","Computational lithography"],"x-skills-preferred":["Data structures","Algorithms","Physical modeling"],"datePosted":"2026-03-09T11:05:04.953Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Python, C++, Parallel computing, Statistical analysis, Optimization, Image processing, Machine learning, Computational lithography, Data structures, Algorithms, Physical modeling","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":165000,"maxValue":248000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_b376a3b3-b21"},"title":"Machine Learning Systems Engineer, Research Tools","description":"<p><strong>About the Role:</strong></p>\n<p>We are seeking an experienced Machine Learning Systems Engineer to join our Encodings and Tokenization team at Anthropic. This cross-functional role will be instrumental in developing and optimising the encodings and tokenization systems used throughout our Finetuning workflows. As a bridge between our Pretraining and Finetuning teams, you&#39;ll build critical infrastructure that directly impacts how our models learn from and interpret data. Your work will be foundational to Anthropic&#39;s research progress, enabling more efficient and effective training of our AI systems while ensuring they remain reliable, interpretable, and steerable.</p>\n<p><strong>Responsibilities:</strong></p>\n<ul>\n<li>Design, develop, and maintain tokenization systems used across Pretraining and Finetuning workflows</li>\n<li>Optimise encoding techniques to improve model training efficiency and performance</li>\n<li>Collaborate closely with research teams to understand their evolving needs around data representation</li>\n<li>Build infrastructure that enables researchers to experiment with novel tokenization approaches</li>\n<li>Implement systems for monitoring and debugging tokenization-related issues in the model training pipeline</li>\n<li>Create robust testing frameworks to validate tokenization systems across diverse languages and data types</li>\n<li>Identify and address bottlenecks in data processing pipelines related to tokenization</li>\n<li>Document systems thoroughly and communicate technical decisions clearly to stakeholders across teams</li>\n</ul>\n<p><strong>You May Be a Good Fit If You:</strong></p>\n<ul>\n<li>Have significant software engineering experience with demonstrated machine learning expertise</li>\n<li>Are comfortable navigating ambiguity and developing solutions in rapidly evolving research environments</li>\n<li>Can work independently while maintaining strong collaboration with cross-functional teams</li>\n<li>Are results-oriented, with a bias towards flexibility and impact</li>\n<li>Have experience with machine learning systems, data pipelines, or ML infrastructure</li>\n<li>Are proficient in Python and familiar with modern ML development practices</li>\n<li>Have strong analytical skills and can evaluate the impact of engineering changes on research outcomes</li>\n<li>Pick up slack, even if it goes outside your job description</li>\n<li>Enjoy pair programming (we love to pair!)</li>\n<li>Care about the societal impacts of your work and are committed to developing AI responsibly</li>\n</ul>\n<p><strong>Strong Candidates May Also Have Experience With:</strong></p>\n<ul>\n<li>Working with machine learning data processing pipelines</li>\n<li>Building or optimising data encodings for ML applications</li>\n<li>Implementing or working with BPE, WordPiece, or other tokenization algorithms</li>\n<li>Performance optimisation of ML data processing systems</li>\n<li>Multi-language tokenisation challenges and solutions</li>\n<li>Research environments where engineering directly enables scientific progress</li>\n<li>Distributed systems and parallel computing for ML workflows</li>\n<li>Large language models or other transformer-based architectures (not required)</li>\n</ul>\n<p><strong>Logistics</strong></p>\n<ul>\n<li>Education requirements: We require at least a Bachelor&#39;s degree in a related field or equivalent experience.</li>\n<li>Location-based hybrid policy: Currently, we expect all staff to be in one of our offices at least 25% of the time. However, some roles may require more time in our offices.</li>\n<li>Visa sponsorship: We do sponsor visas! However, we aren&#39;t able to successfully sponsor visas for every role and every candidate. But if we make you an offer, we will make every reasonable effort to get you a visa, and we retain an immigration lawyer to help with this.</li>\n</ul>\n<p><strong>How we&#39;re different</strong></p>\n<p>We believe that the highest-impact AI research will be big science. At Anthropic we work as a single cohesive team on just a few large-scale research efforts. And we value impact — advancing our long-term goals of steerable, trustworthy AI — rather than work on smaller and more specific puzzles.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_b376a3b3-b21","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anthropic","sameAs":"https://job-boards.greenhouse.io","logo":"https://logos.yubhub.co/anthropic.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/anthropic/jobs/4952079008","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$320,000 - $405,000 USD","x-skills-required":["Machine Learning","Software Engineering","Python","Data Pipelines","ML Infrastructure","Tokenization","Encoding","BPE","WordPiece"],"x-skills-preferred":["Distributed Systems","Parallel Computing","Large Language Models","Transformer-Based Architectures"],"datePosted":"2026-03-08T13:44:14.348Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco, CA | New York City, NY | Seattle, WA"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Machine Learning, Software Engineering, Python, Data Pipelines, ML Infrastructure, Tokenization, Encoding, BPE, WordPiece, Distributed Systems, Parallel Computing, Large Language Models, Transformer-Based Architectures","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":320000,"maxValue":405000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7badeaf5-492"},"title":"Hardware / Software CoDesign Engineer","description":"<p><strong>Hardware / Software CoDesign Engineer</strong></p>\n<p><strong>Location</strong></p>\n<p>San Francisco</p>\n<p><strong>Employment Type</strong></p>\n<p>Full time</p>\n<p><strong>Location Type</strong></p>\n<p>Hybrid</p>\n<p><strong>Department</strong></p>\n<p>Scaling</p>\n<p><strong>Compensation</strong></p>\n<ul>\n<li>$342K – $555K • Offers Equity</li>\n</ul>\n<p>The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.</p>\n<p><strong>Benefits</strong></p>\n<ul>\n<li>Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts</li>\n</ul>\n<ul>\n<li>Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)</li>\n</ul>\n<ul>\n<li>401(k) retirement plan with employer match</li>\n</ul>\n<ul>\n<li>Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)</li>\n</ul>\n<ul>\n<li>Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees</li>\n</ul>\n<ul>\n<li>13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)</li>\n</ul>\n<ul>\n<li>Mental health and wellness support</li>\n</ul>\n<ul>\n<li>Employer-paid basic life and disability coverage</li>\n</ul>\n<ul>\n<li>Annual learning and development stipend to fuel your professional growth</li>\n</ul>\n<ul>\n<li>Daily meals in our offices, and meal delivery credits as eligible</li>\n</ul>\n<ul>\n<li>Relocation support for eligible employees</li>\n</ul>\n<ul>\n<li>Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.</li>\n</ul>\n<p><strong>About the Team</strong></p>\n<p>OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.</p>\n<p><strong>About the Role</strong></p>\n<p>As an Engineer on our hardware optimization and co-design team, you will co-design future hardware from different vendors for programmability and performance. You will work with our kernel, compiler and machine learning engineers to understand their unique needs related to ML techniques, algorithms, numerical approximations, programming expressivity, and compiler optimizations. You will evangelize these constraints with various vendors to develop and influence future hardware architectures towards efficient training and inference on our models. If you are excited about efficiently distributing a large language model across devices, dealing with and optimizing system-wide/rack-wide networking bottlenecks and eventually tailoring the compute pipe and memory hierarchy of the hardware platform, simulating workloads at different abstractions and working closely with our partners, this is the perfect opportunity!</p>\n<p><strong>In this role, you will:</strong></p>\n<ul>\n<li>Co-design future hardware for programmability and performance with our hardware vendors</li>\n</ul>\n<ul>\n<li>Assist hardware vendors in developing optimal kernels and add support for it in our compiler</li>\n</ul>\n<ul>\n<li>Develop performance estimates for critical kernels for different hardware configurations and drive decisions on compute core and memory hierarchy features</li>\n</ul>\n<ul>\n<li>Build system performance models at different abstraction levels and carry out analysis to drive decisions on scale up, scale out, front end networking</li>\n</ul>\n<ul>\n<li>Work with machine learning engineers, kernel engineers and compiler developers to understand their vision and needs from high performance accelerators</li>\n</ul>\n<ul>\n<li>Manage communication and coordination with internal and external partners</li>\n</ul>\n<ul>\n<li>Influence the roadmap of hardware partners to optimize them for OpenAI’s workloads.</li>\n</ul>\n<ul>\n<li>Evaluate potential partners’ accelerators and platforms.</li>\n</ul>\n<ul>\n<li>As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.</li>\n</ul>\n<p><strong>You might thrive in this role if you have:</strong></p>\n<ul>\n<li>4+ years of industry experience, including experience harnessing compute at scale and optimizing ML platform code to run efficiently on target hardware.</li>\n</ul>\n<ul>\n<li>Strong experience in software/hardware co-design</li>\n</ul>\n<ul>\n<li>Deep understanding of GPU and/or other AI accelerators</li>\n</ul>\n<ul>\n<li>Experience with CUDA, Triton or a related accelerator programming language</li>\n</ul>\n<ul>\n<li>Experience driving Machine Learning accuracy with low precision formats</li>\n</ul>\n<ul>\n<li>Experience with system performance modeling and analysis to optimize ML model deployment</li>\n</ul>\n<ul>\n<li>Strong coding skills in C/C++ and Python</li>\n</ul>\n<ul>\n<li>Are familiar with the fundamentals of deep learning computing and chip architecture/microarchitecture.</li>\n</ul>\n<p><strong>These attributes are nice to have:</strong></p>\n<ul>\n<li>PhD in Computer Science and Engineering with a specialization in Computer Architecture, Parallel Computing. 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