You are a dedicated engineer with a passion for analog and mixed-signal IC design, eager to push the boundaries of semiconductor technology. You thrive in environments where innovation, precision, and collaboration are key. Your technical expertise is matched by your curiosity and willingness to continuously learn, adapting to new challenges and technologies. You enjoy working hands-on, taking ownership of the design process from conception to silicon validation. With a keen eye for detail and a strong analytical mindset, you excel at optimizing performance and robustness in high-speed interfaces. You are comfortable navigating complex circuit architectures, and your experience allows you to anticipate issues and implement creative solutions. You value open communication and teamwork, working effectively with layout and lab teams in a multicultural setting. Your documentation skills ensure clarity and reproducibility throughout the design cycle. You are motivated by the opportunity to make a tangible impact on industry-leading products, and you seek growth not only in technical depth but also in architectural responsibility. Ultimately, you are a proactive contributor, ready to help Synopsys shape the next generation of high-speed analog solutions.

Design, analyze, and optimize high-speed analog and mixed-signal circuits such as voltage regulators, DACs, AFE/DFE, TX drivers, serializers, and supporting blocks. Conduct detailed circuit behavior analysis, tuning performance and proposing improvements for power, speed, and robustness. Perform timing closure for small digital blocks using NanoTime, ensuring accurate integration with analog designs. Lead technical interactions with layout teams, guiding floorplanning, matching, and parasitic-aware design to achieve block specifications. Participate actively in design reviews, layout reviews, and silicon bring-up processes to ensure quality and reliability. Support lab characterization and debug, correlating simulation results with silicon measurements for optimal validation. Document architectures, design decisions, testbenches, simulation results, and silicon learnings to maintain clarity and foster knowledge sharing.

Advance Synopsys' leadership in high-speed SerDes IP and analog interface technology. Enable the development of state-of-the-art products used across diverse industries, from data centers to automotive. Drive innovation in design methodologies, influencing future product architectures and performance standards. Enhance cross-functional collaboration, ensuring seamless integration between design, layout, and validation teams. Improve product robustness and yield through meticulous analysis, testing, and documentation. Accelerate time-to-market for cutting-edge chips by optimizing design cycles and validation processes. Contribute to a culture of continuous improvement and technical excellence within Synopsys' engineering community.

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We are looking for a passionate and highly skilled engineer who thrives in a collaborative, fast-paced environment. With a deep understanding of analog design principles, you have honed your expertise in static timing analysis (STA) and timing characterization over 4-8 years in the semiconductor industry. You are driven by curiosity and a desire to solve complex challenges, always seeking innovative solutions to enhance performance and reliability.

As a STA and Timing Characterization Specialist, you will be responsible for driving DDR, HBM, and UCIE timing generation and validation in partnership with circuit design and layout teams. You will perform static timing analysis (STA) and timing characterization, ensuring robust timing constraints and accurate correlation with design requirements. You will also debug and resolve timing violations at both circuit and system levels, applying deep transistor-level simulation expertise.

You will utilize SiliconSmart, NanoTime, and advanced scripting to automate timing analysis workflows and improve efficiency. You will collaborate closely with internal development teams to communicate findings, propose solutions, and implement best practices. You will provide technical leadership, mentoring junior engineers, and championing quality and accountability throughout project lifecycles.

As a member of our team, you will be empowered to drive innovation and technical excellence, contributing to Synopsys' global leadership in chip design and integration.

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