You will spend a significant portion of your time on technical execution while managing a multi-disciplinary team to evolve our software stack. You will directly contribute to the codebase and technical strategy, focusing on acting as a Mountain View-based bridge between our co-design time and the Gemini core team.

You will lead a small team of ML software engineers across numerics, performance optimization, novel training techniques, and novel model exploration. You will drive team cohesion by synthesizing fragmented technical opinions into a single, high-quality execution plan.

You will partner closely with the hardware team to define requirements for next-generation ML accelerators. You will oversee technical execution across a virtual team including Google-internal and external partners.

We value diversity of experience, knowledge, backgrounds, and perspectives and harness these qualities to create extraordinary impact. We are committed to equal employment opportunity regardless of sex, race, religion or belief, ethnic or national origin, disability, age, citizenship, marital, domestic or civil partnership status, sexual orientation, gender identity, pregnancy, or related condition (including breastfeeding) or any other basis as protected by applicable law.

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At Google DeepMind, we've built a unique culture and work environment where long-term ambitious research can flourish. We are a team of scientists, engineers, machine learning experts and more, working together to advance the state of the art in artificial intelligence.

The role requires a blend of deep technical expertise, strategic thinking, and strong leadership. You will lead a multi-disciplinary team to evolve the software side of our hw-sw co-design project.

Responsibilities:

• Closely collaborate with our hardware team to define and drive strategy for next-generation machine learning accelerators.
• Manage relationships and technical execution across a virtual team that spans both Google and outside partners.
• Drive the team to deliver high-quality aligned to tight schedules.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 10+ years of experience in ASIC design and development.
• 3+ years of Management Experience
• Proven track record of technical leadership and successfully delivering complex silicon projects (tape-outs) to production.
• Deep expertise in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow.
• Experience with managing silicon vendors and other external partners.

Preferred Qualifications:

• Master's or Ph.D. in a related field.
• Experience leading and managing teams across the full silicon development cycle, from RTL to bringup.
• Experience with high-performance compute IPs (e.g., GPUs, ML accelerators).
• Knowledge of high-performance and low-power architectures for ML acceleration.
• Excellent communication, and leadership skills.

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