{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/low-power-design-techniques"},"x-facet":{"type":"skill","slug":"low-power-design-techniques","display":"Low Power Design Techniques","count":1},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4b712e08-c1e"},"title":"Staff Engineer (Machine Learning)","description":"<p><strong>Job Description</strong></p>\n<p>At Synopsys, we&#39;re seeking a Staff Engineer (Machine Learning) to join our Machine Learning Center of Excellence (ML CoE) within our Silicon Design &amp; Verification business. As a key member of this highly innovative team, you&#39;ll be responsible for designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.</p>\n<p><strong>Key Responsibilities:</strong></p>\n<ul>\n<li>Designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.</li>\n<li>Integrating ML-driven solutions into a variety of EDA tools, building on the success of DSO.ai and expanding beyond physical implementation.</li>\n<li>Automating chip design flows with scripting languages (Perl, Python, Tcl, shell scripts) to increase efficiency and reproducibility.</li>\n<li>Collaborating with cross-functional teams to identify design bottlenecks and propose innovative solutions for enhancing power, performance, and area (PPA).</li>\n<li>Conducting research and prototyping novel chip design methodologies, demonstrating new concepts, and driving them to productization.</li>\n<li>Staying current with industry trends in silicon design, machine learning, and EDA, and championing their adoption within Synopsys&#39; product lines.</li>\n</ul>\n<p><strong>Impact:</strong></p>\n<ul>\n<li>Accelerate the development of next-generation silicon chips by enabling smarter, faster design optimization through AI and machine learning.</li>\n<li>Reduce time-to-market for customers by eliminating months off project schedules, directly impacting their competitiveness.</li>\n<li>Enhance the performance, power efficiency, and cost-effectiveness of chips designed with Synopsys&#39; tools, driving industry-leading outcomes.</li>\n<li>Shape the evolution of EDA software by pioneering ML-driven methodologies adopted by semiconductor leaders worldwide.</li>\n<li>Enable customers to autonomously explore vast design spaces, achieving optimal results with reduced manual intervention.</li>\n<li>Strengthen Synopsys&#39; position as the global leader in silicon design and verification by delivering innovative, high-impact solutions.</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>Bachelor&#39;s, Master&#39;s, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related discipline.</li>\n<li>5+ years of experience in chip design, EDA, or related fields.</li>\n<li>Expertise in at least one domain of chip design (architectural, micro-architectural, RTL, circuit, or physical design).</li>\n<li>Strong programming and automation skills using Perl, Python, Tcl, or shell scripting.</li>\n<li>Solid understanding of Unix/Linux environments and design flow automation.</li>\n<li>Knowledge of industry-standard RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, and signoff flows.</li>\n<li>Familiarity with low power design techniques, computer architecture, and machine learning principles.</li>\n</ul>\n<p><strong>Who We&#39;re Looking For:</strong></p>\n<ul>\n<li>A creative problem solver who approaches challenges with curiosity and resilience.</li>\n<li>An effective communicator who collaborates well with multidisciplinary teams.</li>\n<li>Detail-oriented with a passion for quality and continuous improvement.</li>\n<li>Self-driven, adaptable, and comfortable with ambiguity in fast-paced environments.</li>\n<li>Committed to learning, growth, and sharing knowledge with others.</li>\n</ul>\n<p><strong>The Team You&#39;ll Be A Part Of:</strong></p>\n<p>You&#39;ll join the Machine Learning Center of Excellence (ML CoE) within Synopsys&#39; Silicon Design &amp; Verification business. This highly innovative team is at the forefront of integrating AI and ML into chip design, collaborating with experts across architecture, implementation, and verification. Together, you&#39;ll drive the development of ML-based design optimization solutions and set new standards for the semiconductor industry.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_4b712e08-c1e","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/dublin/staff-engineer-machine-learning/44408/92577691360","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["machine learning","chip design","EDA","Perl","Python","Tcl","shell scripting","Unix/Linux environments","design flow automation","RTL design","synthesis","place and route","verification","ATPG","custom-circuit design","signoff flows","low power design techniques","computer architecture"],"x-skills-preferred":[],"datePosted":"2026-03-10T12:09:01.596Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Dublin"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"machine learning, chip design, EDA, Perl, Python, Tcl, shell scripting, Unix/Linux environments, design flow automation, RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, signoff flows, low power design techniques, computer architecture"}]}