caa1b66e-3b3 Layout Design, Staff Engineer As a part of our team you will be responsible for delivering fully-verified, clean layout. This includes the following:

What you'll do

Crafting sophisticated layout for mixed signal and analog circuits in deep sub-micron CMOS technologies.

  • Reviewing and analyzing floorplans and intricate circuits with circuit designers.
  • Running complete sets of design verification tools available on AMS blocks.
  • Working with the circuit design team to plan/schedule work and coordinate vital layout tradeoffs as needed.
  • Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout.
  • Exceeding engineering specifications and expectations by working closely with the circuit design team.

What you need

  • B.Tech/M.Tech with 5+ years of relevant experience.
  • Proven experience in analog/mixed-signal layout design of deep sub-micron CMOS circuits.
  • Experience in implementing analog layouts to achieve tight matching, low noise, and low power consumption.
  • High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.

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]]> employee staff onsite analog/mixed-signal layout design, deep sub-micron CMOS circuits, custom and standard cell based floor-planning, analog layouts, tight matching, low noise, low power consumption Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys technology is at the heart of innovations that are changing the way people work and play. Self-driving cars. Machines that learn. Lightning-fast communication across billions of devices in the datasphere. These breakthroughs are ushering in the era of Smart Everything―where devices are getting smarter and connected, and security is an integral part of the design. https://careers.synopsys.com https://careers.synopsys.com/job/pune/layout-design-staff-engineer/44408/92296851936 Pune 2026-03-06