This role is ideal for someone who thrives at the intersection of space operations, RF systems, and software-driven telemetry and control.

Responsibilities:

• Lead daily and long-term payload operations, including performance monitoring, anomaly resolution, and optimization of on-orbit communications systems.
• Support mission design and execution, including link budget validation, mission configuration, and payload commissioning.
• Develop and maintain software tools and dashboards for payload telemetry, trending, and health monitoring.
• Define and implement telemetry and telecommand (TT&C) strategies to ensure safe and reliable operations.
• Coordinate cross-functionally between mission operations, ground software, and RF hardware teams to ensure seamless command and control.
• Perform data analysis of our payload and TT&C performance across the fleet to ensure consistent performance and health of our satellites.
• Participate in mission rehearsals and payload readiness reviews, contributing to mission planning and operations documentation.
• Assist in defining and developing automation strategies for on-orbit payload control and fault detection.

Requirements:

• B.S. or M.S. in Electrical Engineering or related technical field.
• 0–7 years of experience in satellite operations, mission engineering, or RF systems engineering.
• Proficiency in Python and comfort developing telemetry visualization or automation tools.
• Experience with telemetry databases, command systems, or mission control software.
• Ability to diagnose and resolve complex system-level issues across hardware and software boundaries.
• Solid understanding of RF systems, modulation/demodulation, and link budgets.
• On call support for payload and TT&C systems, up to one week per month.
• Willing and able to obtain a security clearance.
• Excellent written and verbal communication skills, with a collaborative mindset.

Bonus:

• Experience in geostationary satellite payload operations.
• Familiarity with ground system architectures and RF test instrumentation.
• Experience with software development tools such as Git.
• Knowledge of embedded systems or spacecraft flight software interfaces.
• Experience with automation frameworks or machine learning applied to telemetry analysis.

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Senior System Architect, Analog Design-13383

United States Off-siteSave

Remote Eligible YesHire Type EmployeeJob ID 13383Base Salary Range $166000-$249000Date posted 11/19/2025

We Are:

At Synopsys, we drive innovations that shape the way we live and connect. Our Enterprise SerDes team leads in high-speed chip design, enabling tomorrow's connectivity for PCIe and Ethernet. Join us to create the future of pervasive intelligence.

You Are:

You are an expert in system-level architecture for serial-link transceivers, with 15+ years of experience and a passion for pushing technology boundaries. You thrive in cross-functional teams, communicate complex ideas clearly, and have a track record of successful product development. Your deep knowledge of high-speed analog/digital design and strong leadership make you an ideal fit.

What You’ll Be Doing:

• Architecture: definition of architecture and specifications for the transmitter and receiver
• Modelling: design and maintenance of the system level model
• Signal/Power Integrity: analyzing different signal and power integrity requirements
• Sign-off: system level simulation of the design performance across multiple protocols and channels
• Silicon: qualification and correlation of performance and algorithms in silicon
• Customers: assisting customers on system level performance and algorithmic issues

What You’ll Need:

• You have a MSc or PhD in Electrical or Computer Engineering with 15+ yrs of experience.
• Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool
• Knowledge of circuit topologies in high-speed Rx/Tx SerDes PHY
• Understanding of Tx/Rx equalization techniques.
• Knowledge of CDR architectures and CDR loop dynamics
• Experience in analyzing link budgets for either NRZ and PAM4 high-speed serial links
• Knowledge about common high-speed serial data protocols including Ethernet, OIF, JESD, CPRI
• Experience in lab testing of high-speed serial links

Due to the cross disciplinary nature of this position, key qualifications include one or more of the following...

• Modelling - experience in Matlab/Simulink/C modeling of circuits and systems
• Communications theory - equalization, coding, noise/crosstalk filtering
• Digital - background in digital signal process (DSP)
• Analog - background in high-speed analog CMOS circuit design
• Hardware - awareness on per-protocol handing of RX and TX adaptation; hands on experience in measurement of transceiver performance

The Impact You Will Have:

• Drive next-gen connectivity solutions.
• Advance Synopsys’ technical leadership.
• Enable superior performance for customers.
• Mentor and elevate team expertise.
• Contribute to industry standards.
• Promote collaboration and innovation

Who You Are:

• Innovative, collaborative, and detail-oriented leader.
• Strong communicator and problem-solver.
• Committed to diversity and continuous learning.

The Team You’ll Be A Part Of:

You’ll join a collaborative group of analog, digital, and hardware engineers driving enterprise connectivity innovation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share details during the hiring process.

#LI-NK4

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What you'll do

• Developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
• Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.

What you need

• M.Sc. or Ph.D. in Electrical or Computer Engineering.
• Strong experience modeling circuits and systems in MATLAB/Simulink.
• Expertise in designing high-speed analog CMOS circuits.
• Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.
• Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.
• Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
• Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
• Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.

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What you'll do

• Developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
• Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.
• Designing and proposing advanced algorithms to calibrate and adapt transceivers for optimal performance.
• Correlating simulated performance with silicon measurements to ensure accuracy and reliability.
• Providing expert assistance to customers for system-level performance issues and troubleshooting.
• Collaborating with cross-functional teams of analog, digital, and hardware engineers throughout all stages of development.
• Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.

What you need

• M.Sc. or Ph.D. in Electrical or Computer Engineering.
• Strong experience modeling circuits and systems in MATLAB/Simulink.
• Expertise in designing high-speed analog CMOS circuits.
• Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.
• Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.
• Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
• Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
• Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.

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