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High growth potential is possible as well as additional leadership opportunities.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Executing rapid evaluation of engineering concepts in a wide range of fields</li>\n<li>Performing trade studies and physics-based analysis of blue-sky engineering problems</li>\n<li>Designing, implementing, and testing complex electro-mechanical systems</li>\n<li>Leading design reviews, running analysis, visiting vendors, defining and executing hardware test plans</li>\n<li>Building prototypes, analyzing failures, and transitioning successful projects into production</li>\n<li>Supporting critical hardware demonstrations with customers as needed</li>\n<li>Traveling to test sites as needed</li>\n</ul>\n<p>Required qualifications include:</p>\n<ul>\n<li>Experience in an immersive technical project (collegiate project teams or professional settings)</li>\n<li>3+ years of mechanical design experience in a professional setting</li>\n<li>Experience designing mechanical parts (CAD) and understanding of manufacturing methods (machining, sheet metal, composites, 3D printing, injection molding, composite lamination, etc)</li>\n<li>Ability to read, interpret, and manipulate schematics, wiring diagrams, and layouts</li>\n<li>High competence with, and fluid use of, engineering first principles</li>\n<li>BS, MS, or PhD in an engineering field, or equivalent work experience</li>\n<li>Eligible to obtain and maintain an active U.S. Secret security clearance</li>\n</ul>\n<p>Preferred qualifications include:</p>\n<ul>\n<li>Experience developing aircraft subsystem layouts, performing architectural trade studies, and evaluating vendor performance data</li>\n<li>Competency in engineering analysis, including structural, thermal, and electrical</li>\n<li>Hands-on prototyping (soldering, board assembly, harnessing)</li>\n<li>Outstanding leadership and interpersonal skills</li>\n<li>Familiarity with designing for rugged environments</li>\n<li>Experience integrating electrical and mechanical subsystems (sensors, payloads, weapons, etc.) onto air vehicles</li>\n<li>Experience in developing a variety of electronics hardware products (UAVs, wearables, firearms, high power electric propulsion, optical systems, or other complex mechanisms)</li>\n<li>Practical experience with electrical engineering tools (Oscilloscopes, power supplies, electronic loads, multimeters)</li>\n<li>Understanding of MIL-STD requirements such as MIL-STD-1275, MIL-STD-461, MIL-STD-810, MIL-DTL-38999</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c02708b1-3cb","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril","sameAs":"https://www.anduril.com/","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/5064478007","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$129,000-$171,000 USD","x-skills-required":["mechanical design","CAD","manufacturing methods","engineering first principles","U.S. Secret security clearance"],"x-skills-preferred":["aircraft subsystem layouts","architectural trade studies","vendor performance data","engineering analysis","structural analysis","thermal analysis","electrical analysis","hands-on prototyping","leadership","interpersonal skills","designing for rugged environments","integrating electrical and mechanical subsystems","developing electronics hardware products","electrical engineering tools","MIL-STD requirements"],"datePosted":"2026-04-18T15:47:16.201Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Costa Mesa, California, United States"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"mechanical design, CAD, manufacturing methods, engineering first principles, U.S. Secret security clearance, aircraft subsystem layouts, architectural trade studies, vendor performance data, engineering analysis, structural analysis, thermal analysis, electrical analysis, hands-on prototyping, leadership, interpersonal skills, designing for rugged environments, integrating electrical and mechanical subsystems, developing electronics hardware products, electrical engineering tools, MIL-STD requirements","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":129000,"maxValue":171000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_105de82a-7dd"},"title":"Manager - Test Automation Engineering","description":"<p>We are looking to bring on a Manager - Test Automation Engineering to lead, design and deliver test systems for Anduril&#39;s electronic products. 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As a Mechanical Engineer, you will design, develop, and integrate hardware for high-speed air vehicles. You will own full design lifecycles, from initial concept to real-world deployment. You will apply first principles of physics to guide all decisions and design processes. You will lead design reviews, conduct analyses, visit vendors, and define and execute hardware test plans. You will build prototypes, analyze failures, and transition successful projects into production. You will support critical hardware demonstrations with customers as needed. You will travel to test sites or vendor locations as needed.</p>\n<p>The ideal candidate will have 5+ years of mechanical engineering experience in advanced air vehicle programs. They will be familiar with hypersonic missile systems and military standards. They will have hands-on experience integrating electrical and mechanical subsystems into high-speed air vehicles. They will be proficient in designing mechanical parts using CAD software and a strong understanding of manufacturing methods, including machining, sheet metal work, composites, 3D printing, injection molding, and composite lamination. They will have a strong understanding of mechanical engineering fundamentals and first principles. They will hold a BS or higher degree in Mechanical, Aerospace, or Electrical Engineering. They will be eligible to obtain and maintain an active U.S. Secret security clearance.</p>\n<p>Preferred qualifications include experience using Siemens NX and Teamcenter software. Expertise in air vehicle subsystem layouts, architectural trade studies, and vendor data evaluations is also desirable. An active DoD Top Secret security clearance is preferred. Proficiency in advanced engineering analysis, including structural, thermal, and/or electrical domains, is also a plus.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c59397c0-a59","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril","sameAs":"https://www.anduril.com/","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/5032457007","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$129,000-$171,000 USD","x-skills-required":["mechanical engineering","CAD software","manufacturing methods","hypersonic missile systems","military standards","electrical and mechanical subsystems","Siemens NX","Teamcenter software"],"x-skills-preferred":["air vehicle subsystem layouts","architectural trade studies","vendor data evaluations","advanced engineering analysis","structural analysis","thermal analysis","electrical analysis"],"datePosted":"2026-04-18T15:46:39.325Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Costa Mesa, California, United States"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"mechanical engineering, CAD software, manufacturing methods, hypersonic missile systems, military standards, electrical and mechanical subsystems, Siemens NX, Teamcenter software, air vehicle subsystem layouts, architectural trade studies, vendor data evaluations, advanced engineering analysis, structural analysis, thermal analysis, electrical analysis","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":129000,"maxValue":171000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_aed62813-195"},"title":"Director, UX","description":"<p>We are seeking a Director of UX to lead the design vision, customer research, and end-to-end product experience across iOS, Android, and web. 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In this role, you will take ownership of fast-paced board-level design from concept through production, working on high-reliability systems for demanding environments.</p>\n<p>You will collaborate cross-functionally with other electrical, firmware/software, mechanical, and manufacturing/quality teams to design, validate, and deliver robust electronic solutions.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Primarily digital and power-based designs, but analog design is a possibility.</li>\n<li>Own the entire PCB design lifecycle, including requirements, major component selection, block diagrams, schematic, circuit analysis, placement, routing, DFA/DFM review, prototype testing, and documentation.</li>\n<li>Create and maintain BOMs, design files, netlists, and manufacturing documentation.</li>\n<li>Work closely with mechanical engineers to integrate PCBs into enclosures and assemblies.</li>\n<li>Lead or support prototype bring-up, debugging, and testing with support from the firmware/software teams (Capability to write firmware/software for bring-up is a plus).</li>\n<li>Perform signal integrity, power budgeting, and thermal analysis as needed.</li>\n<li>Review and optimize designs for EMC/EMI compliance and environmental robustness.</li>\n<li>Interface with fabrication and assembly vendors, addressing build issues and driving quality improvements.</li>\n<li>Participate and cross-collaborate in design reviews and peer reviews to ensure high standards.</li>\n<li>Contribute to and improve engineering processes, libraries, and design guidelines.</li>\n<li>Support ITAR/export compliance and follow relevant standards such as MIL-STD’s, IPC-610/6012, etc.</li>\n</ul>\n<p>Required Qualifications:</p>\n<ul>\n<li>Bachelor’s degree in Electrical Engineering or related field.</li>\n<li>3+ years of professional experience in PCB schematic and layout design.</li>\n<li>Proficiency with Altium Designer (or other equivalent EDA tools).</li>\n<li>Experience with multi-layer board design and high-speed or mixed-signal circuitry.</li>\n<li>Strong understanding of electronic components, circuit theory, and board-level design principles.</li>\n<li>Ability to interpret datasheets, standards, and mechanical constraints.</li>\n<li>Proven experience with design for manufacturing (DFM) and design for test (DFT).</li>\n</ul>\n<p>Preferred Qualifications:</p>\n<ul>\n<li>Experience in defense, aerospace, or other safety/mission-critical industries.</li>\n<li>Familiarity with ruggedized systems, high-temperature settings, water-intrusion protection, and other environmental requirements.</li>\n<li>Knowledge of MIL-STD, IPC standards, or similar frameworks.</li>\n<li>Experience with SPICE simulations, Signal Integrity Analysis, or reliability engineering.</li>\n<li>Ability to work with firmware, FPGA, or embedded teams.</li>\n<li>Active or previous security clearance (or ability to obtain one).</li>\n<li>Ownership mentality and attention to detail.</li>\n<li>Ability to work both independently and in multidisciplinary teams.</li>\n<li>Strong organizational and time management skills.</li>\n<li>Comfortable working in a fast-paced, product-focused environment.</li>\n</ul>\n<p>Benefits:</p>\n<ul>\n<li>Medical Insurance: Comprehensive health insurance plans covering a range of services</li>\n<li>Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care</li>\n<li>Saronic pays 100% of the premium for employees and 80% for dependents</li>\n<li>Time Off: Generous PTO and Holidays</li>\n<li>Parental Leave: Paid maternity and paternity leave to support new parents</li>\n<li>Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses</li>\n<li>Retirement Plan: 401(k) plan</li>\n<li>Stock Options: Equity options to give employees a stake in the company’s success</li>\n<li>Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage</li>\n<li>Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office</li>\n</ul>\n<p>Physical Demands:</p>\n<ul>\n<li>Prolonged periods of sitting at a desk and working on a computer.</li>\n<li>Occasional standing and walking within the office.</li>\n<li>Manual dexterity to operate a computer keyboard, mouse, and other office equipment.</li>\n<li>Visual acuity to read screens, documents, and reports.</li>\n<li>Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.</li>\n<li>Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).</li>\n</ul>\n<p>Additional Information:</p>\n<p>This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5532a7a5-18c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Saronic Technologies","sameAs":"https://www.saronictechnologies.com/","logo":"https://logos.yubhub.co/saronictechnologies.com.png"},"x-apply-url":"https://jobs.lever.co/saronic/7f7a08af-f20e-4091-84df-be2d50ab5bc3","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Altium Designer","PCB schematic and layout design","Multi-layer board design","High-speed or mixed-signal circuitry","Electronic components","Circuit theory","Board-level design principles","Design for manufacturing (DFM)","Design for test (DFT)"],"x-skills-preferred":["Defense","Aerospace","Ruggedized systems","High-temperature settings","Water-intrusion protection","MIL-STD","IPC standards","SPICE simulations","Signal Integrity Analysis","Reliability engineering","Firmware","FPGA","Embedded teams"],"datePosted":"2026-04-17T12:57:45.417Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Altium Designer, PCB schematic and layout design, Multi-layer board design, High-speed or mixed-signal circuitry, Electronic components, Circuit theory, Board-level design principles, Design for manufacturing (DFM), Design for test (DFT), Defense, Aerospace, Ruggedized systems, High-temperature settings, Water-intrusion protection, MIL-STD, IPC standards, SPICE simulations, Signal Integrity Analysis, Reliability engineering, Firmware, FPGA, Embedded teams"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c13b1cdc-08a"},"title":"Outside Machinist","description":"<p>We are seeking an experienced Outside Machinist to join our team at Saronic-Franklin. As an Outside Machinist, you will be responsible for installing, aligning, and testing main propulsion plant machinery, as well as performing overhaul, maintenance, and installation of valves, pumps, turbines, and heat exchangers.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Reading, interpreting, and following blueprints and sketches to understand project specifications</li>\n<li>Strong mechanical aptitude and attention to detail</li>\n<li>Figuring material take-offs on drawings for required cut lengths</li>\n<li>Marking reference points and transposing them to workpieces using measuring devices, squares, chalk, and/or soapstone</li>\n<li>Planning pipe system layout, installation, or repair per specifications</li>\n<li>Installing large and small machinery, including pipe systems, pumps, and motors</li>\n<li>Using precision instruments to achieve proper alignment and fit</li>\n<li>Operating machine tools and portable equipment to modify or fabricate parts as needed</li>\n</ul>\n<p>In addition to technical skills, we are looking for someone who can work independently and as part of a team in a fast-paced ship production environment. You should be able to maintain a clean and safe work area, as well as a positive attitude towards customers and represent Saronic professionally.</p>\n<p>If you are a motivated and experienced machinist looking for a new challenge, please apply today!</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c13b1cdc-08a","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Saronic Technologies","sameAs":"https://www.saronic-tech.com/","logo":"https://logos.yubhub.co/saronic-tech.com.png"},"x-apply-url":"https://jobs.lever.co/saronic/8d723b57-f257-48bc-a52a-4a84fc274b79","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$60,000 - $80,000 per year","x-skills-required":["mechanical aptitude","attention to detail","blueprint reading","pipe system layout","precision instrument operation","machine tool operation"],"x-skills-preferred":["welding","metal fabrication","pipefitting"],"datePosted":"2026-04-17T12:56:36.132Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Franklin"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"mechanical aptitude, attention to detail, blueprint reading, pipe system layout, precision instrument operation, machine tool operation, welding, metal fabrication, pipefitting","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":60000,"maxValue":80000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_3a2afbe4-052"},"title":"Senior Visual Designer (Web)","description":"<p>We&#39;re a dynamic web design team focused on creating seamless, high-performing digital experiences that drive lead generation and brand engagement. We design and optimize web pages, campaign assets, and interactive content to ensure every user interaction reflects our brand&#39;s identity and supports conversion goals.</p>\n<p>In this role, you&#39;ll create visually compelling, on-brand web pages and interactive elements that enhance our digital presence. You&#39;ll use your expertise in design, front-end development, and light animation to build responsive, engaging user experiences. Collaborating with cross-functional teams, you&#39;ll bring creative concepts to life, ensuring a cohesive and polished web experience that aligns with our brand vision.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Design and implement visually engaging, responsive web pages that enhance the user experience and reflect brand identity.</li>\n<li>Develop interactive elements and light animations to create a more dynamic, engaging site experience.</li>\n<li>Collaborate with developers to ensure seamless translation of designs into code, maintaining design fidelity.</li>\n<li>Work closely with marketing and product teams to align design solutions with project goals and brand standards.</li>\n<li>Maintain and expand the design system, contributing to a cohesive and scalable web design framework.</li>\n</ul>\n<p><strong>Qualifications</strong></p>\n<ul>\n<li>6+ years of experience in web or digital design with a strong portfolio showcasing responsive and visually compelling work.</li>\n<li>Proficiency in Figma and basic Adobe Creative Suite.</li>\n<li>Strong understanding of design principles, typography, color, and layout.</li>\n<li>Excellent communication and collaboration skills to work cross-functionally.</li>\n<li>Attention to detail with the ability to manage multiple projects in a fast-paced environment.</li>\n<li>Familiarity with design systems and component-based web design.</li>\n<li>Basic front-end skills (HTML, CSS, and light JavaScript) to support collaboration with developers.</li>\n<li>Experience with creating light animations or interactive elements (e.g., CSS animations, After Effects).</li>\n<li>Nice-to-have: building websites in Webflow</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_3a2afbe4-052","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Plaid","sameAs":"https://designedbyplaid.com/","logo":"https://logos.yubhub.co/designedbyplaid.com.png"},"x-apply-url":"https://jobs.lever.co/plaid/aed3a2ea-6f19-44fb-9eb2-a90f73af61c7","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$166,800-$250,800 per year","x-skills-required":["Figma","Adobe Creative Suite","design principles","typography","color","layout","HTML","CSS","JavaScript","light animation","interactive elements"],"x-skills-preferred":["Webflow"],"datePosted":"2026-04-17T12:51:34.898Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco"}},"employmentType":"FULL_TIME","occupationalCategory":"Design","industry":"Finance","skills":"Figma, Adobe Creative Suite, design principles, typography, color, layout, HTML, CSS, JavaScript, light animation, interactive elements, Webflow","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":166800,"maxValue":250800,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_43360bef-537"},"title":"UI Engineer - Apps Team","description":"<p>We&#39;re seeking a Senior UI Engineer to join our App Team in Bengaluru, India. As a UI Engineer, you will play a key role in designing and developing high-quality user interfaces for our Enterprise platform.</p>\n<p>The Forward Enterprise platform delivers a vendor-agnostic &#39;digital twin&#39; of the network, based on a mathematical model. It scales to support hundreds of thousands of network devices, whether cloud, hybrid cloud, or on-prem. It serves as a single source of truth for the network, enabling network operators to instantly verify security posture, accelerate troubleshooting, avoid outages, and modernize network management.</p>\n<p>As a Senior UI Engineer, you will be responsible for:</p>\n<ul>\n<li>Designing and developing high-quality user interfaces for our Enterprise platform</li>\n<li>Collaborating with cross-functional teams to ensure seamless integration and deployment</li>\n<li>Troubleshooting and resolving technical issues in a timely manner</li>\n<li>Staying up-to-date with the latest front-end technologies and trends</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>5+ years of professional front-end engineering experience</li>\n<li>Ability to write high-quality and unit-tested JavaScript</li>\n<li>Comfortable debugging and profiling web apps with browser dev tools</li>\n<li>Care about code quality, user experience, and visual design</li>\n</ul>\n<p>Nice to Haves:</p>\n<ul>\n<li>Mastery of CSS and HTML fundamentals</li>\n<li>Familiarity with the latest CSS layout standards (flexbox, grid)</li>\n<li>Comfortable working directly with Web APIs and the DOM</li>\n<li>Experience building single-page applications using at least one of the major front-end frameworks (React, Angular, Vue)</li>\n<li>A good eye for visual design; you get annoyed when things aren&#39;t pixel-perfect</li>\n<li>Knowledge of patterns and best practices related to interaction design and information architecture</li>\n<li>Experience designing and integrating with REST APIs</li>\n<li>Comfortable with version control, continuous integration, and pre-commit code reviews</li>\n</ul>\n<p>This position is a regular, full-time opportunity with Forward Networks in Bangalore, India.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_43360bef-537","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Forward Networks","sameAs":"https://www.forwardnetworks.com/","logo":"https://logos.yubhub.co/forwardnetworks.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/forwardnetworks/jobs/5967116003","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["JavaScript","CSS","HTML","Web APIs","DOM","Front-end frameworks (React, Angular, Vue)","Version control","Continuous integration","Pre-commit code reviews"],"x-skills-preferred":["Mastery of CSS and HTML fundamentals","Familiarity with the latest CSS layout standards (flexbox, grid)","Experience building single-page applications","A good eye for visual design","Knowledge of patterns and best practices related to interaction design and information architecture","Experience designing and integrating with REST APIs"],"datePosted":"2026-04-17T12:34:39.308Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"JavaScript, CSS, HTML, Web APIs, DOM, Front-end frameworks (React, Angular, Vue), Version control, Continuous integration, Pre-commit code reviews, Mastery of CSS and HTML fundamentals, Familiarity with the latest CSS layout standards (flexbox, grid), Experience building single-page applications, A good eye for visual design, Knowledge of patterns and best practices related to interaction design and information architecture, Experience designing and integrating with REST APIs"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4a5bb7fb-dbf"},"title":"Head of Brand Design","description":"<p>We&#39;re redefining what&#39;s possible in legal technology. Our mission is to empower plaintiff law firms with AI-driven solutions that elevate how they operate, serve clients, and grow.</p>\n<p>Our technology augments the capabilities of attorneys across every stage of a case - from intake and document review to strategy and settlement - so they can focus on what truly matters: achieving the best outcomes for their clients.</p>\n<p>We&#39;re looking for a Head of Brand Design to own and evolve Eve&#39;s visual identity system. This is not a traditional creative director role focused on campaigns and advertising. You&#39;ll build the design infrastructure that makes Eve&#39;s brand unmistakable , from foundational systems to the details that make every touchpoint feel intentional.</p>\n<p>You&#39;ll lead a small team of designers and creatives and partner closely with marketing, product, and leadership to translate our positioning into a cohesive visual language.</p>\n<p>The ideal candidate is a systems-thinker who obsesses over craft, builds scalable frameworks, and can execute hands-on when needed.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Own the visual identity system: Define and maintain Eve&#39;s design language , typography, color, imagery, iconography, motion principles , ensuring consistency across every touchpoint.</li>\n</ul>\n<ul>\n<li>Build scalable brand infrastructure: Create component libraries, templates, and guidelines that empower teams to produce on-brand work without bottlenecks.</li>\n</ul>\n<ul>\n<li>Lead brand design execution: Oversee design for web, product marketing, events, video, print, and environmental experiences , from concept through production.</li>\n</ul>\n<ul>\n<li>Elevate craft across the organization: Set the bar for visual quality. Establish design reviews, feedback processes, and quality standards that raise the floor for all creative output.</li>\n</ul>\n<ul>\n<li>Partner cross-functionally: Collaborate with Product Design on brand-product alignment, with Marketing on campaign visuals, and with leadership on strategic brand evolution.</li>\n</ul>\n<ul>\n<li>Build and lead the team: Hire, mentor, and develop brand designers. Create an environment where high-quality work ships fast.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>8+ years in brand design, visual design, or design systems , with 3+ years leading teams. Agency + in-house experience is ideal.</li>\n</ul>\n<ul>\n<li>A portfolio that demonstrates systems thinking: We want to see visual identity systems you&#39;ve built or evolved, not just campaign work. Show us how you create frameworks that scale.</li>\n</ul>\n<ul>\n<li>Deep craft in typography, layout, color, and composition: You have strong opinions about kerning and grid systems. Details matter to you.</li>\n</ul>\n<ul>\n<li>Fluency in Figma: You build organized, scalable files. Experience with design tokens, component libraries, and handoff workflows.</li>\n</ul>\n<ul>\n<li>Experience with web and digital brand expression: You understand responsive design, motion principles, and how brand translates to interactive experiences.</li>\n</ul>\n<ul>\n<li>Comfort with ambiguity and speed: You thrive in fast-moving environments where you&#39;re building the plane while flying it.</li>\n</ul>\n<ul>\n<li>AI-native mindset: You use AI tools in your workflow and are excited about how they&#39;re changing creative work.</li>\n</ul>\n<p><strong>How to Apply</strong></p>\n<p>Please include a portfolio that shows visual identity systems, brand guidelines, or design infrastructure you&#39;ve built. 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As a Staff Engineer, you will be responsible for developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool. You will collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.</p>\n<p>Your responsibilities will include:</p>\n<ul>\n<li>Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.</li>\n<li>Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.</li>\n<li>Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.</li>\n<li>Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.</li>\n<li>Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.</li>\n<li>Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.</li>\n<li>Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys&#39; technical edge.</li>\n</ul>\n<p>You will accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. 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You will strengthen Synopsys&#39; reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.</p>\n<p>To be successful in this role, you will need:</p>\n<ul>\n<li>B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.</li>\n<li>5-8 years of hands-on experience in the Physical Verification (PV) domain.</li>\n<li>Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.</li>\n<li>Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.</li>\n<li>Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.</li>\n<li>Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.</li>\n<li>Exposure to competitive EDA tools and awareness of their strengths and limitations.</li>\n</ul>\n<p>You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>We are seeking an accomplished architect with expertise in high-speed analog and mixed-signal IC design. You will thrive on solving complex challenges and leading teams to deliver innovative transceiver solutions for silicon photonics.</p>\n<p>Key responsibilities include:</p>\n<p>Architecting 224G &amp; 448G analog transceiver solutions for silicon photonics.\nCollaborating across engineering teams to drive integration and innovation.\nMentoring engineers and supporting technical growth.\nRepresenting Synopsys in industry forums.\nShaping technical roadmaps for emerging markets.\nEnsuring designs meet stringent performance and reliability standards.</p>\n<p>As an Analog Design Architect, you will advance Synopsys&#39; leadership in silicon photonics and high-speed analog design. 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They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.</p>\n<p>As a Sr. Manager of R&amp;D Engineering, you will lead a team of engineers in developing cutting-edge CMOS embedded memory technologies. You will be responsible for designing architecture and circuit implementation for ultra-high-speed, ultra-low-power, or high-density designs. You will also perform schematic entry, circuit simulation, layout planning, and supervision, as well as verify and validate designs to ensure high quality and performance.</p>\n<p>The ideal candidate will have a strong background in memory compiler development, with a minimum of 8-10 years of experience in CMOS memory design, circuit simulation, and memory layout design. You will also have experience with layout parasitic extraction and verification tools, as well as programming skills in C-Shell, Perl, C++, or JavaScript.</p>\n<p>As a leader, you will be responsible for mentoring and guiding a team of engineers, enhancing workflows and methodologies, and driving project success. You will also be expected to communicate effectively with cross-functional teams, including CAD and Frontend engineers, to automate memory compilers and generate EDA models.</p>\n<p>At Synopsys, we offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_e76957dd-344","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/r-and-d-engineering-sr-manager/44408/93159885760","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS memory design","circuit simulation","memory layout design","layout parasitic extraction and verification tools","C-Shell","Perl","C++","JavaScript"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:22:43.393Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS memory design, circuit simulation, memory layout design, layout parasitic extraction and verification tools, C-Shell, Perl, C++, JavaScript"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_63c3f231-21b"},"title":"Analog Layout Design, Sr Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p>As an experienced Analog Layout Senior Engineer, you will work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees. You will floor plan, power design, signal routing strategy, EMIR awareness, and parasitic optimization for layout blocks from schematics. You will apply Analog Layout techniques to ensure design meets performance with minimum area and good yield. You will build and enhance layout flow for faster, higher quality design processes.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees.</li>\n<li>Floor plan, power design, signal routing strategy, EMIR awareness, and parasitic optimization for layout blocks from schematics.</li>\n<li>Apply Analog Layout techniques to ensure design meets performance with minimum area and good yield.</li>\n<li>Build and enhance layout flow for faster, higher quality design processes.</li>\n<li>Perform layout verification for DRC/LVS/ERC/ANT/ESD/DFM.</li>\n<li>Conduct PERC verification for ESD/LUP checks.</li>\n<li>Complete all design quality checks and data quality checks.</li>\n<li>Collaborate with Place and Route engineers to integrate analog layouts into the top level.</li>\n<li>Work with the Package team to ensure the integration of top die and package.</li>\n<li>Participate in design reviews across the global team.</li>\n<li>Engage in package design, including interposer and RDL design.</li>\n<li>Collaborate closely with design teams in Vietnam, USA, Canada, and other countries to ensure the success of the whole product.</li>\n<li>Join research programs to implement new ideas for future products and flows.</li>\n<li>Lead a layout team to complete a full design block.</li>\n<li>Mentor junior layout engineers or interns.</li>\n</ul>\n<p><strong>Impact</strong></p>\n<ul>\n<li>Drive the development of high-performance Analog IPs that power cutting-edge technologies.</li>\n<li>Enhance the layout design process for improved efficiency and quality.</li>\n<li>Ensure the robustness and reliability of our designs through meticulous verification processes.</li>\n<li>Contribute to the integration of complex layouts into top-level designs.</li>\n<li>Foster collaboration and knowledge sharing across global teams.</li>\n<li>Mentor and develop the next generation of layout engineers.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>BS in Electronics Engineering, Electromechanics, Telecommunications.</li>\n<li>2+ years of experience in custom layout.</li>\n<li>Proficiency with layout entry tools: Cadence, Synopsys.</li>\n<li>Experience with layout verification tools: Mentor Calibre, Synopsys ICV.</li>\n<li>Understanding of basic semiconductor fabrication processes and MOSFET fundamentals.</li>\n<li>Knowledge of high-speed layout techniques, ESD, Latchup, Antenna, EMIR.</li>\n<li>Experience mentoring/leading junior layout engineers.</li>\n<li>Ability to write layout review presentations and layout verification reports.</li>\n<li>Good English communication skills.</li>\n</ul>\n<p><strong>Team</strong></p>\n<p>You will join a dynamic and innovative team focused on developing high-performance Analog IPs. Our team collaborates closely with colleagues in Vietnam, USA, Canada, and other countries to ensure the success of our products. We value teamwork, knowledge sharing, and continuous improvement, and we are committed to fostering a supportive and inclusive work environment.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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You will automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Develop and validate DRC, LVS, and Fill runsets for the Synopsys IC Validator tool</li>\n<li>Collaborate with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes</li>\n<li>Automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python</li>\n<li>Troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges</li>\n<li>Interface directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions</li>\n<li>Mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses</li>\n<li>Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market</li>\n<li>Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps</li>\n<li>Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges</li>\n<li>Contribute to the development of next-generation verification methodologies and best practices within Synopsys</li>\n<li>Strengthen Synopsys&#39; reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field</li>\n<li>5-8 years of hands-on experience in the Physical Verification (PV) domain</li>\n<li>Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS</li>\n<li>Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development</li>\n<li>Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements</li>\n<li>Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks</li>\n<li>Exposure to competitive EDA tools and awareness of their strengths and limitations</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>An analytical thinker with strong problem-solving abilities and meticulous attention to detail</li>\n<li>A collaborative team player who fosters knowledge sharing and mentorship</li>\n<li>Effective communicator, capable of translating technical concepts to diverse audiences</li>\n<li>Adaptable and proactive, with a passion for continuous learning and innovation</li>\n<li>Customer-focused, with a commitment to delivering high-quality solutions on time</li>\n<li>Self-driven, organized, and able to manage multiple priorities in a fast-paced environment</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>We are hiring a Staff Engineer to lead the design and development of cutting-edge DDR/HBM PHY layout IPs for next-generation technologies.</p>\n<p>As a Staff Engineer, you will be responsible for leading the design and development of cutting-edge DDR/HBM PHY layout IPs for next-generation technologies. You will work on hands-on execution of layout development, ensuring precision and adherence to industry standards.</p>\n<p>You will also mentor and support junior engineers, fostering technical growth and knowledge sharing within the team.</p>\n<p>Estimating project efforts, planning schedules, and executing projects in cross-functional settings will be another key responsibility.</p>\n<p>Collaborating with teams to support critical layout, floorplanning requirements, layout reviews, and quality checks will also be a part of your role.</p>\n<p>Managing the release process, ensuring timely delivery and consistent quality of layout deliverables will be your additional responsibility.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li><p>Lead the design and development of cutting-edge DDR/HBM PHY layout IPs for next-generation technologies.</p>\n</li>\n<li><p>Hands-on execution of layout development, ensuring precision and adherence to industry standards.</p>\n</li>\n<li><p>Mentor and support junior engineers, fostering technical growth and knowledge sharing within the team.</p>\n</li>\n<li><p>Estimating project efforts, planning schedules, and executing projects in cross-functional settings.</p>\n</li>\n<li><p>Collaborating with teams to support critical layout, floorplanning requirements, layout reviews, and quality checks.</p>\n</li>\n<li><p>Managing the release process, ensuring timely delivery and consistent quality of layout deliverables.</p>\n</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li><p>BTech/MTech degree in Electrical Engineering, Electronics, or related field.</p>\n</li>\n<li><p>5+ years of relevant experience in layout design for CMOS, FinFET, GAA process technologies (7nm and below).</p>\n</li>\n<li><p>Expertise in layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements.</p>\n</li>\n<li><p>Strong understanding of floorplan techniques and deep submicron effects.</p>\n</li>\n<li><p>Proven ability to lead projects and deliver best product quality within tight timelines.</p>\n</li>\n</ul>\n<p>Preferred Qualifications:</p>\n<ul>\n<li><p>Collaborative and team-oriented, with a commitment to inclusion and diversity.</p>\n</li>\n<li><p>Detail-oriented, with strong problem-solving and analytical skills.</p>\n</li>\n<li><p>Effective communicator, both written and verbal, with excellent interpersonal abilities.</p>\n</li>\n<li><p>Adaptable and eager to learn, embracing new technologies and methodologies.</p>\n</li>\n<li><p>Empathetic mentor, fostering accountability, ownership, and technical growth in others.</p>\n</li>\n</ul>\n<p>Benefits:</p>\n<ul>\n<li><p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n</li>\n<li><p>In addition to company holidays, we have ETO and FTO Programs.</p>\n</li>\n<li><p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n</li>\n<li><p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n</li>\n<li><p>Save for your future with our retirement plans that vary by region and country.</p>\n</li>\n<li><p>Competitive salaries.</p>\n</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_471316cf-932","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/analog-layout-staff-engineer/44408/92693931728","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["layout design","CMOS","FinFET","GAA process technologies","layout matching techniques","ESD","latch-up","PERC","EMIR","DFM","LEF generation","bond-pad layout","IO frame and pitch requirements"],"x-skills-preferred":["collaborative and team-oriented","detail-oriented","effective communicator","adaptable and eager to learn","empathetic mentor"],"datePosted":"2026-04-05T13:21:26.995Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"layout design, CMOS, FinFET, GAA process technologies, layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements, collaborative and team-oriented, detail-oriented, effective communicator, adaptable and eager to learn, empathetic mentor"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_6eb810f3-99d"},"title":"Layout Design, Staff Engineer-16003","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>As a Layout Design Engineer, you will be designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces. You will collaborate with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces.</li>\n<li>Collaborating with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</li>\n<li>Performing floor planning, layout entry, and comprehensive verification to ensure design quality and compliance with foundry rules.</li>\n<li>Applying advanced techniques to mitigate signal integrity issues, ESD, and latch-up risks, including differential routing, shielding, and substrate biasing.</li>\n<li>Optimizing layouts for reliability, matching, and minimizing parasitic effects such as EM and IR drop.</li>\n<li>Supporting design porting activities to enable seamless migration of layouts across multiple foundry nodes and technology platforms.</li>\n<li>Documenting layout methodologies, best practices, and validation results to support knowledge sharing and continuous improvement.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Bachelor or advanced degree in Electrical or Computer Engineering (or equivalent) with a solid background in transistor-level design.</li>\n<li>5+ years of experience in analog and mixed-signal CMOS layout design, including complex integrated circuits.</li>\n<li>Expertise in deep submicron CMOS technologies and layout effects (matching, reliability, proximity, EM, IR, etc.).</li>\n<li>Proficiency in layout floor planning, verification, and quality validation using industry-standard EDA tools.</li>\n<li>Strong knowledge of signal integrity, ESD, and latch-up mitigation techniques.</li>\n<li>Familiarity with UNIX operating systems and scripting languages (TCL, Python) is a plus.</li>\n<li>Experience with Synopsys EDA tools is highly desirable.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Detail-oriented and quality-focused, with a commitment to delivering robust and reliable designs.</li>\n<li>Excellent communicator, able to articulate technical concepts clearly to diverse audiences.</li>\n<li>Collaborative team player who builds productive relationships and networks effectively.</li>\n<li>Self-motivated, organized, and able to manage multiple priorities in a dynamic environment.</li>\n<li>Strong problem-solving skills and critical judgment, with a proactive approach to overcoming challenges.</li>\n<li>Adaptable and eager to learn new technologies and methodologies.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Accelerate the development of cutting-edge silicon IP, enabling faster integration of advanced capabilities into SoCs.</li>\n<li>Enhance the performance, reliability, and manufacturability of high-speed interface solutions for next-generation applications.</li>\n<li>Reduce time-to-market and risk for customers by delivering high-quality, validated layout designs.</li>\n<li>Contribute to the innovation of analog and mixed-signal design methodologies within a global team.</li>\n<li>Support the creation of differentiated products that power the Era of Smart Everything, from AI to IoT and beyond.</li>\n<li>Foster a culture of collaboration, knowledge sharing, and technical excellence within the team and across the organization.</li>\n</ul>\n<p>The Team You&#39;ll Be A Part Of:</p>\n<p>You will join a dynamic, international team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoC solutions. Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_6eb810f3-99d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ottawa/layout-design-staff-engineer-16003/44408/92625958368","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS circuit layout","high-speed SerDes physical interfaces","deep submicron CMOS technologies","layout effects","signal integrity","ESD","latch-up mitigation","UNIX operating systems","scripting languages","Synopsys EDA tools"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.656Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ottawa"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS circuit layout, high-speed SerDes physical interfaces, deep submicron CMOS technologies, layout effects, signal integrity, ESD, latch-up mitigation, UNIX operating systems, scripting languages, Synopsys EDA tools"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4815342e-ce8"},"title":"Analog Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p>You Are:</p>\n<p>You are a seasoned analog design engineer with deep expertise in high-speed SERDES IP. You thrive on solving complex circuit challenges, leading technical initiatives, and collaborating across multidisciplinary teams. Your track record in advanced CMOS design, effective communication skills, and passion for innovation make you a trusted mentor and a key contributor to project and team success.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Develop and specify SERDES transceiver architectures and sub-blocks based on standards.</li>\n<li>Design, simulate, and verify high-speed analog circuits for optimal power and performance.</li>\n<li>Collaborate with analog, digital, and CAD teams to ensure design quality and efficiency.</li>\n<li>Present technical results internally and externally to customers and industry groups.</li>\n<li>Oversee physical layout to address parasitics and reliability concerns.</li>\n<li>Document features and test plans, and support post-silicon analysis and updates.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Advance industry-leading SERDES IP for next-generation SoCs.</li>\n<li>Enhance product differentiation and customer value.</li>\n<li>Streamline design processes for quality and time-to-market.</li>\n<li>Mentor junior team members and share best practices.</li>\n<li>Influence technical direction and innovation at Synopsys.</li>\n<li>Support customer success and product reliability.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>Ph.D. with 6+ years or M.Sc. with 8+ years of analog IC design experience.</li>\n<li>Expertise in transistor-level CMOS design and SERDES sub-circuits.</li>\n<li>Proficiency with schematic, layout, and verification tools; SPICE simulators.</li>\n<li>Experience with scripting languages (Verilog-A, TCL, Python, etc.).</li>\n<li>Strong communication and documentation skills.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Technical leader and mentor</li>\n<li>Collaborative and proactive</li>\n<li>Analytical and detail-oriented</li>\n<li>Adaptable and innovative</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>A collaborative, high-performing analog and mixed-signal design group focused on developing advanced SERDES IP for leading-edge applications. The core purpose of the team is the development of 224-Gb/s Ethernet SerDes Transceivers for network infrastructure ICs, driving the future of high-speed connectivity in data centers and communications networks for the world.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_4815342e-ce8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/kanata/analog-design-engineer/44408/93286401584","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["High-speed SERDES IP","Transistor-level CMOS design","SERDES sub-circuits","Schematic, layout, and verification tools","SPICE simulators","Scripting languages (Verilog-A, TCL, Python, etc.)"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.629Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Kanata"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"High-speed SERDES IP, Transistor-level CMOS design, SERDES sub-circuits, Schematic, layout, and verification tools, SPICE simulators, Scripting languages (Verilog-A, TCL, Python, etc.)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_52170496-422"},"title":"Applications Engineer - ICV Runset Development","description":"<p>We are seeking an experienced Applications Engineer to join our team in Hyderabad. As an Applications Engineer, you will be responsible for developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool. You will collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Your responsibilities will also include automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. You will troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Additionally, you will interface directly with customers and Field Application Engineers (FAEs) to gather requirements, provide technical support, and ensure successful deployment of PV solutions. You will also mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team.</p>\n<p>You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&amp;D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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Your collaborative approach ensures seamless cross-functional coordination, and you have a knack for translating complex technical requirements into actionable project plans.</p>\n<p>Your communication skills,both written and verbal,enable you to engage effectively with stakeholders at all levels. You are motivated by the opportunity to contribute to high-impact projects, drive innovation in DDR/HBM PHY IP layout, and deliver differentiated products that shape the industry.</p>\n<p>If you are ready to lead, inspire, and make a lasting impact, Synopsys is the place for you.</p>\n<p>Leading the development of next-generation DDR/HBM IP layouts, driving technical innovation and quality excellence.</p>\n<p>Mentoring and managing a team of layout engineers, fostering growth and maximizing individual and team potential.</p>\n<p>Developing and maintaining project schedules, ensuring timely delivery while balancing technical and resource constraints.</p>\n<p>Collaborating cross-functionally with design, verification, and IP teams to align on project requirements and execution.</p>\n<p>Providing subject matter expertise in high-speed DDR/HBM IP layout, including floorplanning, layout reviews, and quality checks.</p>\n<p>Executing layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and IO requirement analysis.</p>\n<p>Supporting layout automation through scripting and tool enhancement, optimizing efficiency and productivity.</p>\n<p>Acting as an advisor to resolve project challenges and guide teams towards innovative solutions.</p>\n<p>Accelerating the integration of advanced capabilities into SoCs, helping customers achieve unique performance, power, and size targets.</p>\n<p>Reducing time-to-market and risk for differentiated products through robust layout design and technical leadership.</p>\n<p>Driving continuous improvement in layout methodologies and quality standards across cross-functional teams.</p>\n<p>Empowering your team to deliver high-performance DDR/HBM PHY IPs that set industry benchmarks.</p>\n<p>Fostering a collaborative, inclusive work environment that values innovation, accountability, and diversity.</p>\n<p>Contributing to Synopsys’ reputation as the provider of the world’s broadest portfolio of silicon IP.</p>\n<p>Shaping the future of chip design and verification technologies through your expertise and leadership.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_41cabece-785","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-supervisor/44408/93269033008","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["deep submicron effects","advanced floorplanning techniques","CMOS","FinFET","GAA","layout matching","ESD","latch-up","PERC","EMIR","DFM","LEF generation","bond-pad layout","IO frame and pitch requirements"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:15.106Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"deep submicron effects, advanced floorplanning techniques, CMOS, FinFET, GAA, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_aeb3214c-459"},"title":"Analog Design Engineer – DDR I/O","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Here, everyone is part of the story. Part of a community that connects across the globe. A place where creativity thrives, new perspectives are invited, and ideas matter. A team where everyone makes play happen.\\n\\n## Description &amp; Requirements\\n\\nThe Marketing Cinematics (Craft Cinematics) team is responsible for creating high-impact, real-time trailers across multiple EA IPs. We operate at the edge of what game engines can visually achieve - pushing Frostbite and Unreal beyond typical gameplay constraints to deliver visually stunning marketing content seen by millions of players worldwide.\\n\\nWe are looking for a Senior Cinematic Artist – Animator who is passionate about storytelling, performance, and camera language. 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If you reside in a different location, a recruiter will advise on the applicable range and benefits. Pay offered will be determined based on a number of relevant business and candidate factors (e.g. education, qualifications, certifications, experience, skills, geographic location, or business needs).\\n\\n## PAY RANGES\\n\\n\\\\\\<em> British Columbia (depending on location e.g. Vancouver vs. Victoria) \\\\</em>$91,100 - $126,900 CAD\\n\\nPay is just one part of the overall compensation at EA.\\n\\nFor Canada, we offer a package of benefits including vacation (3 weeks per year to start), 10 days per year of sick time, paid top-up to EI/QPIP benefits up to 100% of base salary when you welcome a new child (12 weeks for maternity, and 4 weeks for parental/adoption leave), extended health/dental/vision coverage, life insurance, disability insurance, retirement plan to regular full-time employees. Certain roles may also be eligible for bonus and equity.\\n\\n## _About Electronic Arts_\\n\\nWe’re proud to have an extensive portfolio of games and experiences, locations around the world, and opportunities across EA. We value adaptability, resilience, creativity, and curiosity. From leadership that brings out your potential, to creating space for learning and experimenting, we empower you to do great work and pursue opportunities for growth.\\n\\nWe adopt a holistic approach to our benefits programs, emphasizing physical, emotional, financial, career, and community wellness to support a balanced life. Our packages are tailored to meet local needs and may include healthcare coverage, mental well-being support, retirement savings, paid time off, family leaves, complimentary games, and more. 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You will collaborate with cross-disciplinary teams to create visually compelling designs that align with real-world references, brand guidelines, and the high standards expected of AAA game development.</p>\n<p><strong>Responsibilities:</strong></p>\n<ul>\n<li>Create high-quality 2D graphic assets and liveries for use across in-game content</li>\n<li>Translate real-world reference and brand styles into accurate and compelling in-game designs</li>\n<li>Develop original livery concepts that align with the creative direction of the project</li>\n<li>Apply designs to 3D models, working with UV layouts and textures to ensure high visual fidelity</li>\n<li>Collaborate closely with Art, Design, and Technical teams to ensure assets are implemented correctly and meet AAA quality standards</li>\n<li>Iterate quickly based on feedback, maintaining consistency and attention to detail throughout the development process</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>High proficiency in Adobe Photoshop and Illustrator</li>\n<li>Previous experience using 3D software is advantageous, particularly working with UV layouts and texturing of 3D models</li>\n<li>Ability to accurately replicate real-world reference as well as create original, creative livery concepts</li>\n<li>Strong attention to detail and visual accuracy</li>\n<li>Strong visual communication skills</li>\n<li>Ability to take feedback constructively and iterate quickly</li>\n<li>Clear communication skills and a collaborative approach to teamwork</li>\n</ul>\n<p><strong>Portfolio requirements:</strong></p>\n<ul>\n<li>Must include high-quality livery or graphic design work</li>\n<li>Evidence of working to real-world references or established brand styles</li>\n<li>Demonstrated creativity and clear iteration of ideas through development stages</li>\n</ul>\n<p><strong>Benefits:</strong></p>\n<ul>\n<li>We adopt a holistic approach to our benefits programs, emphasizing physical, emotional, financial, career, and community wellness to support a balanced life.</li>\n<li>Our packages are tailored to meet local needs and may include healthcare coverage, mental well-being support, retirement savings, paid time off, family leaves, complimentary games, and more.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_f8585ad7-0ae","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Electronic Arts","sameAs":"https://jobs.ea.com","logo":"https://logos.yubhub.co/jobs.ea.com.png"},"x-apply-url":"https://jobs.ea.com/en_US/careers/JobDetail/2D-Graphic-Artist/212388","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"Temporary - with Benefits (EU & Malaysia)","x-salary-range":null,"x-skills-required":["Adobe Photoshop","Adobe Illustrator","3D software","UV layouts","texturing"],"x-skills-preferred":["Motorsport","graphic design"],"datePosted":"2026-03-09T11:08:00.374Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Kuala Lumpur"}},"employmentType":"TEMPORARY","occupationalCategory":"Design","industry":"Technology","skills":"Adobe Photoshop, Adobe Illustrator, 3D software, UV layouts, texturing, Motorsport, graphic design"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_f2f62e3e-4a8"},"title":"R&D Engineering, Architect","description":"<p>At Synopsys, we drive the innovations that shape the way we live and connect. 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With a passion for solving complex problems, you thrive in a collaborative environment and are eager to contribute to the development of cutting-edge software solutions.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Designing new solutions to high-value problems in Custom Design and Layout areas, including new layout methodologies and applications of analytics and machine learning in layout.</li>\n<li>Collaborating on flagship layout automation projects maintained by local peers.</li>\n<li>Improving existing systems and providing solutions in Synopsys Custom products.</li>\n<li>Working with corporate application engineers to understand customer needs and provide tailored solutions.</li>\n<li>Writing well-designed, well-tested, high-quality C++ programs.</li>\n<li>Creating design specifications and reviewing code written by peer members.</li>\n</ul>\n<p><strong>Impact</strong></p>\n<ul>\n<li>Driving innovation in Custom Design and Layout solutions, addressing underserved areas and creating new methodologies.</li>\n<li>Enhancing the efficiency and effectiveness of layout automation tools, benefiting both internal and external stakeholders.</li>\n<li>Improving the performance and reliability of Synopsys Custom products, contributing to the overall success of the company.</li>\n<li>Ensuring high-quality software development practices, leading to robust and maintainable codebases.</li>\n<li>Providing critical insights and solutions that meet the evolving needs of our customers.</li>\n<li>Contributing to the development of advanced silicon analog and mixed-signal designs, optimizing for power, cost, and performance.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>Bachelor&#39;s or Master&#39;s Degree in Computer Science or Electrical Engineering.</li>\n<li>12+ years of experience in software development, including C++, TCL, Python, Linux, build and revision control systems, and specification writing/reviewing.</li>\n<li>Expertise in software design, including data structures, algorithms, GUI and interactive systems, and event-driven systems.</li>\n<li>Background in Layout Editor and its automation engines for Analog Design is highly desirable.</li>\n<li>Knowledge of digital EDA tools and flows, circuit analysis, layout principles, and semiconductor manufacturing.</li>\n</ul>\n<p><strong>Team</strong></p>\n<p>You will be part of the Custom Design &amp; Manufacturing business unit, which focuses on building software solutions for custom design, analog, and mixed-signal design. Our team collaborates closely with the signoff extraction, verification, and simulation teams to develop differentiated solutions for designing and verifying advanced silicon analog and mixed-signal designs. We work together to design the next-generation processes and models needed to manufacture these chips, enabling our customers to optimize their designs for power, cost, and performance.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<ul>\n<li>Health &amp; Wellness: Comprehensive medical and healthcare plans that work for you and your family.</li>\n<li>Time Away: In addition to company holidays, we have ETO and FTO Programs.</li>\n<li>Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</li>\n<li>ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</li>\n<li>Retirement Plans: Save for your future with our retirement plans that vary by region and country.</li>\n<li>Compensation: Competitive salaries.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_f2f62e3e-4a8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/r-and-d-engineering-architect/44408/91963069776","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["C++","TCL","Python","Linux","build and revision control systems","specification writing/reviewing"],"x-skills-preferred":["data structures","algorithms","GUI and interactive systems","event-driven systems","Layout Editor and its automation engines for Analog Design"],"datePosted":"2026-03-09T11:06:52.663Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C++, TCL, Python, Linux, build and revision control systems, specification writing/reviewing, data structures, algorithms, GUI and interactive systems, event-driven systems, Layout Editor and its automation engines for Analog Design"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_19f0656f-e16"},"title":"Character Artist (Wardrobe) - EA SPORTS FC","description":"<p>Join our team as a Character Artist (Wardrobe) and contribute to the creation of next-level entertainment experiences that inspire players and fans around the world.</p>\n<p>As a key member of the EA SPORTS ART team, you will play an important role in creating the cast of characters that populate the game universe. Our character artists are dynamic and efficient modelers with sculpting and texturing skills - able to create outstanding content with an imagination that is constantly in motion.</p>\n<p>We create amazing character models based on scan data, photo references or traditional 3D means. Committed to supporting our games with the creation of amazing content, the EA Sports Art Characters team enriches players&#39; experience with a cast of characters and a variety of character accessories such as full body outfits, hair and headgear.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Create high-fidelity 3D models of characters and accessories</li>\n<li>Develop and implement character textures and materials</li>\n<li>Collaborate with the project development team to ensure character models meet game requirements</li>\n<li>Work with limited reference material and concept art to visualize and create characters in 3D</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>3+ years of industry experience in character creation production</li>\n<li>Experience in high-fidelity 3D modeling and sculpting techniques</li>\n<li>Knowledge of PBR texture and material workflows</li>\n<li>Experience with content-driven game engines (e.g. Unreal, Frostbite, Unity)</li>\n<li>Visualize in three-dimensions and work from limited reference material/concept art</li>\n<li>Efficient in use of UV layout and ability to edit for highest visual payoff</li>\n</ul>\n<p>Pay Transparency - North America:\nThe ranges listed below are what EA in good faith expects to pay applicants for this role in these locations at the time of this posting. If you reside in a different location, a recruiter will advise on the applicable range and benefits.</p>\n<p>Pay Ranges:</p>\n<ul>\n<li>British Columbia (depending on location e.g. Vancouver vs. Victoria): $75,900 - $105,600 CAD</li>\n</ul>\n<p>Benefits:\nIn Canada, we offer a package of benefits including vacation (3 weeks per year to start), 10 days per year of sick time, and extended health/dental/vision coverage and basic life insurance.</p>\n<p>About Electronic Arts:\nWe&#39;re proud to have an extensive portfolio of games and experiences, locations around the world, and opportunities across EA. We value adaptability, resilience, creativity, and curiosity. From leadership that brings out your potential, to creating space for learning and experimenting, we empower you to do great work and pursue opportunities for growth.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_19f0656f-e16","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Electronic Arts","sameAs":"https://jobs.ea.com","logo":"https://logos.yubhub.co/jobs.ea.com.png"},"x-apply-url":"https://jobs.ea.com/en_US/careers/JobDetail/Character-Artist-Kits-EA-SPORTS-FC/212235","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"temporary","x-salary-range":"$75,900 - $105,600 CAD","x-skills-required":["3D modeling","sculpting","texturing","PBR texture and material workflows","content-driven game engines","UV layout"],"x-skills-preferred":["Marvelous Designer","Substance Painter","Designer"],"datePosted":"2026-03-09T11:06:48.487Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Vancouver"}},"employmentType":"TEMPORARY","occupationalCategory":"Engineering","industry":"Technology","skills":"3D modeling, sculpting, texturing, PBR texture and material workflows, content-driven game engines, UV layout, Marvelous Designer, Substance Painter, Designer","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":75900,"maxValue":105600,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_201bd031-487"},"title":"2D Graphic Artist","description":"<p>We&#39;re looking for a talented Associate 2D Artist to join EA Sports and Racing. In this role, you will contribute high-quality graphic and livery content that enhances the visual identity and authenticity of our titles. You will collaborate with cross-disciplinary teams to create visually compelling designs that align with real-world references, brand guidelines, and the high standards expected of AAA game development.</p>\n<p><strong>Responsibilities:</strong></p>\n<ul>\n<li>Create high-quality 2D graphic assets and liveries for use across in-game content</li>\n<li>Translate real-world reference and brand styles into accurate and compelling in-game designs</li>\n<li>Develop original livery concepts that align with the creative direction of the project</li>\n<li>Apply designs to 3D models, working with UV layouts and textures to ensure high visual fidelity</li>\n<li>Collaborate closely with Art, Design, and Technical teams to ensure assets are implemented correctly and meet AAA quality standards</li>\n<li>Iterate quickly based on feedback, maintaining consistency and attention to detail throughout the development process</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>High proficiency in Adobe Photoshop and Illustrator</li>\n<li>Previous experience using 3D software is advantageous, particularly working with UV layouts and texturing of 3D models</li>\n<li>Ability to accurately replicate real-world reference as well as create original, creative livery concepts</li>\n<li>Strong attention to detail and visual accuracy</li>\n<li>Strong visual communication skills</li>\n<li>Ability to take feedback constructively and iterate quickly</li>\n<li>Clear communication skills and a collaborative approach to teamwork</li>\n</ul>\n<p><strong>Portfolio requirements:</strong></p>\n<ul>\n<li>Must include high-quality livery or graphic design work</li>\n<li>Evidence of working to real-world references or established brand styles</li>\n<li>Demonstrated creativity and clear iteration of ideas through development stages</li>\n</ul>\n<p><strong>Benefits:</strong></p>\n<ul>\n<li>We adopt a holistic approach to our benefits programs, emphasizing physical, emotional, financial, career, and community wellness to support a balanced life.</li>\n<li>Our packages are tailored to meet local needs and may include healthcare coverage, mental well-being support, retirement savings, paid time off, family leaves, complimentary games, and more.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_201bd031-487","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Electronic Arts","sameAs":"https://jobs.ea.com","logo":"https://logos.yubhub.co/jobs.ea.com.png"},"x-apply-url":"https://jobs.ea.com/en_US/careers/JobDetail/2D-Graphic-Artist/212382","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"Temporary - with Benefits (EU & Malaysia)","x-salary-range":null,"x-skills-required":["Adobe Photoshop","Adobe Illustrator","3D software","UV layouts","texturing"],"x-skills-preferred":["Motorsport","Graphic design"],"datePosted":"2026-03-09T11:06:36.049Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Kuala Lumpur"}},"employmentType":"TEMPORARY","occupationalCategory":"Design","industry":"Technology","skills":"Adobe Photoshop, Adobe Illustrator, 3D software, UV layouts, texturing, Motorsport, Graphic design"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_de112d07-e65"},"title":"Analog Design, Principal Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15231</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/15/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<ul>\n<li>An experienced and passionate Analog and Mixed-Signal (A&amp;MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.</li>\n</ul>\n<ul>\n<li>You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<ul>\n<li>Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.</li>\n</ul>\n<ul>\n<li>You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.</li>\n</ul>\n<ul>\n<li>You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.</li>\n</ul>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Leading NRZ/PAM4 Serdes analog design transceiver solutions.</li>\n</ul>\n<ul>\n<li>Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Collaborating with silicon test and debug experts for Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Driving innovation in mixed-signal advanced analog serdes design.</li>\n</ul>\n<ul>\n<li>Enhancing the performance and efficiency of high-speed physical interfaces.</li>\n</ul>\n<ul>\n<li>Contributing to the development of cutting-edge technology in High Speed PHY IP.</li>\n</ul>\n<ul>\n<li>Improving quality and robustness of design through collaboration and Sim2Sil correlation.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.</li>\n</ul>\n<ul>\n<li>Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.</li>\n</ul>\n<ul>\n<li>Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .</li>\n</ul>\n<ul>\n<li>Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.</li>\n</ul>\n<ul>\n<li>Experience with PLL designs and high-speed digital circuit design.</li>\n</ul>\n<ul>\n<li>Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.</li>\n</ul>\n<ul>\n<li>Familiarity with digitally assisted analog circuit techniques.</li>\n</ul>\n<ul>\n<li>Capable to drive technical decision and tradeoff with customer focus</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.</p>\n<p>You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p><strong>Get an idea of what your daily routine <strong>around the office</strong> can be like</strong></p>\n<p>\\ Explore <strong>Noida</strong></p>\n<p>View Map</p>\n<p>---</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_de112d07-e65","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/analog-design-principal-engineer/44408/91802916768","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert","PLL , data converters and SERDES design","mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction","circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes","Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology","silicon test and debug experts to advance quality through Sim2Sil correlation","Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits","Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity ","RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:06:28.077Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert, PLL , data converters and SERDES design, mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction, circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes, Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology, silicon test and debug experts to advance quality through Sim2Sil correlation, Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits, Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity , RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_d3007d70-703"},"title":"R&D Engineering, Staff Engineer","description":"<p>You are a seasoned engineering leader with a passion for advancing semiconductor technology. Your expertise in analog and mixed-signal layout—especially in advanced CMOS, FinFET, and GAA nodes—sets you apart. You thrive in environments where innovation, collaboration, and precision are valued, and you are driven by the challenge of defining scalable methodologies that empower global engineering teams. Your strategic mindset enables you to translate complex technical challenges into actionable workflows, ensuring the highest standards of quality and efficiency. You are skilled at bridging communication between interdisciplinary teams and stakeholders, delivering clarity and aligning objectives. Mentoring is part of your DNA; you take pride in fostering growth in junior engineers and sharing knowledge across the organization. You are comfortable managing multiple priorities, adapting to fast-paced changes, and driving collective excellence. Your technical insight is matched by your organizational skills and your ability to inspire teams to embrace new methodologies and innovative solutions. If you’re committed to pushing the boundaries of analog/mixed-signal IP development and are ready to make a meaningful impact at a global leader in semiconductor technology, Synopsys is your next destination.</p>\n<p>Defining and deploying advanced layout methodologies that accelerate execution, enhance quality, and promote standardized best practices across global teams.</p>\n<p>Gathering customer requirements, translating them into clear technical specifications, and ensuring these specifications drive methodology and workflow development.</p>\n<p>Developing end-to-end workflows that enhance quality, consistency, and efficiency across Synopsys IP development.</p>\n<p>Collaborating closely with cross-functional teams—including Circuit Design, Physical Design, CAD, Product Engineering, and Quality—to enable adoption of methodologies for advanced technology nodes.</p>\n<p>Providing technical leadership across distributed teams, aligning planning and execution to meet project goals.</p>\n<p>Defining, tracking, and analyzing performance metrics to drive continuous improvement and influence future methodology strategy.</p>\n<p>Creating and maintaining comprehensive documentation to ensure clarity, scalability, and long-term usability.</p>\n<p>Engaging with internal partners and external customers as a trusted technical representative of the Methodology Team.</p>\n<p>Leading innovation in analog/mixed-signal layout flows, combining industry-standard tools and internal automation to validate and evolve methodologies.</p>\n<p>Mentoring and supporting junior engineers, enabling skill growth and knowledge sharing across the organization.</p>\n<p>Accelerating and improving the reliability of analog/mixed-signal IP development at advanced nodes.</p>\n<p>Driving alignment and quality across global design teams through standardized workflows and strong technical leadership.</p>\n<p>Strengthening collaboration and knowledge transfer across engineering disciplines.</p>\n<p>Influencing organizational and product strategy through methodology innovation and customer insights.</p>\n<p>Increasing transparency and maintainability of workflows through high-quality documentation.</p>\n<p>Contributing to reinforcing Synopsys’ position as a leader in semiconductor design technology.</p>\n<p>5+ years in analog/mixed-signal layout or ASIC physical design, with experience in FinFET and advanced nodes strongly preferred.</p>\n<p>Deep knowledge of analog and mixed-signal CMOS layout, device-level considerations, and chip-level integration.</p>\n<p>Strong expertise with industry tools such as Synopsys Custom Compiler, Cadence Virtuoso, ICV, Calibre, and related verification flows.</p>\n<p>Proven ability to gather customer requirements and convert them into technical specifications.</p>\n<p>Demonstrated experience building workflows that improve IP quality, efficiency, and consistency.</p>\n<p>Strong organizational skills, attention to detail, and ability to manage multiple complex initiatives simultaneously.</p>\n<p>Excellent communication, leadership, and mentoring abilities.</p>\n<p>Innovative and proactive in solving complex engineering challenges.</p>\n<p>Collaborative, with a talent for working across interdisciplinary teams.</p>\n<p>Strategic thinker who balances technical depth with big-picture vision.</p>\n<p>Effective communicator, able to convey technical concepts to diverse audiences.</p>\n<p>Mentor and coach, dedicated to supporting the growth of others.</p>\n<p>Adaptable and resilient in fast-paced and evolving environments.</p>\n<p>You will join the Mixed Signal IP Technology and Methodology Team—an advanced physical design group focused on developing full-custom analog and ASIC layout solutions for high-speed integrated circuits. The team is known for its collaborative culture, cutting-edge tool ecosystem, and strong commitment to innovation. As a Staff Engineer, you’ll work closely with experienced layout engineers, CAD specialists, and circuit designers to help define best-in-class methodologies and deliver high-quality solutions for Synopsys’ global customers.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access &amp; opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact <a href=\"mailto:hr-help-canada@synopsys.com\">hr-help-canada@synopsys.com</a>.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_d3007d70-703","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/r-and-d-engineering-staff-engineer-15233/44408/91711017792","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog and mixed-signal layout","FinFET and advanced nodes","Synopsys Custom Compiler","Cadence Virtuoso","ICV","Calibre","verification flows"],"x-skills-preferred":["customer requirements","technical specifications","methodology and workflow development","cross-functional teams","distributed teams","performance metrics","comprehensive documentation","innovation in analog/mixed-signal layout flows"],"datePosted":"2026-03-09T11:06:13.190Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog and mixed-signal layout, FinFET and advanced nodes, Synopsys Custom Compiler, Cadence Virtuoso, ICV, Calibre, verification flows, customer requirements, technical specifications, methodology and workflow development, cross-functional teams, distributed teams, performance metrics, comprehensive documentation, innovation in analog/mixed-signal layout flows"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5f4e85a9-296"},"title":"Staff Analog Design Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15391</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/23/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a seasoned analog design professional with a passion for pushing technology boundaries. With over a decade of hands-on experience in analog IC design, you thrive in fast-paced, collaborative environments and are motivated by technical challenges. Your expertise in Multi-Gbps NRZ &amp; PAM4 SERDES IP and familiarity with the latest FinFET and gate-all-around process nodes set you apart as a leader in the field. You are adept at translating complex SerDes standards into innovative, high-performance circuit architectures and are comfortable navigating the intricacies of transistor-level design, system-level budgeting, and analog/digital co-design.</p>\n<p>You excel at mentoring peers, sharing knowledge, and advocating for design excellence. Your strong analytical skills allow you to quickly identify architectural bottlenecks and propose effective solutions. You are detail-oriented, balancing deep technical focus with a strategic view of project goals and timelines. Communication is one of your strengths—whether presenting simulation data, documenting design features, or collaborating across multidisciplinary teams, you articulate complex ideas clearly to both technical and non-technical audiences.</p>\n<p>Beyond your technical expertise, you are committed to continuous learning and growth, staying abreast of industry trends and emerging technologies. You value diversity and inclusion, recognizing that great ideas come from a variety of perspectives. Your proactive and adaptable approach ensures you thrive in dynamic, innovative environments where your contributions drive meaningful impact.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.</li>\n</ul>\n<ul>\n<li>Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.</li>\n</ul>\n<ul>\n<li>Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.</li>\n</ul>\n<ul>\n<li>Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.</li>\n</ul>\n<ul>\n<li>Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews.</li>\n</ul>\n<ul>\n<li>Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements.</li>\n</ul>\n<ul>\n<li>Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Drive innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions.</li>\n</ul>\n<ul>\n<li>Shape the architectural direction of SERDES IP, influencing industry standards and future product offerings.</li>\n</ul>\n<ul>\n<li>Enhance the performance, power efficiency, and reliability of Synopsys’ silicon IP portfolio.</li>\n</ul>\n<ul>\n<li>Mentor and elevate the technical capabilities of team members, fostering a culture of excellence and continuous learning.</li>\n</ul>\n<ul>\n<li>Directly contribute to successful customer deployments by addressing post-silicon challenges and ensuring robust field performance.</li>\n</ul>\n<ul>\n<li>Strengthen Synopsys’ market leadership in advanced process nodes and high-speed communication technologies.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).</li>\n</ul>\n<ul>\n<li>Proven expertise with FinFET technologies and CMOS tape-outs.</li>\n</ul>\n<ul>\n<li>Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.</li>\n</ul>\n<ul>\n<li>Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).</li>\n</ul>\n<ul>\n<li>Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.</li>\n</ul>\n<ul>\n<li>Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).</li>\n</ul>\n<ul>\n<li>Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.</li>\n</ul>\n<ul>\n<li>Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.</li>\n</ul>\n<ul>\n<li>Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).</li>\n</ul>\n<ul>\n<li>Excellent communication and documentation skills.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Collaborative and open-minded, eager to share knowledge and learn from others.</li>\n</ul>\n<ul>\n<li>Detail-oriented and thorough, with a commitment to delivering high-quality results.</li>\n</ul>\n<ul>\n<li>Analytical thinker with strong problem-solving abilities and a proactive approach.</li>\n</ul>\n<ul>\n<li>Excellent communicator, able to convey complex technical concepts clearly.</li>\n</ul>\n<ul>\n<li>Adaptable and resilient in fast-paced, dynamic environments.</li>\n</ul>\n<ul>\n<li>Committed to fostering an inclusive, innovative, and supportive workplace.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a world-class analog and mixed-signal R&amp;D team at Synopsys, working alongside experts in high-speed IC design, verification, and CAD tool development. The team is collaborative, diverse, and passionate about innovation, with a focus on developing cutting-edge SERDES IP for advanced process nodes. You’ll have access to best-in-class design tools, mentorship, and opportunities for professional growth as you help shape the future of connectivity technology.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>What is it like to be an Analog Design Engineer at Synopsys?</p>\n<p>Arman Shahmuradyan</p>\n<p>Analog Design, Manager</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and patern</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5f4e85a9-296","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/staff-analog-design-engineer/44408/92076328848","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","FinFET technologies","CMOS tape-outs","Multi-Gbps high-speed designs","SERDES architectures","analog/digital co-design","calibration","adaptation","timing handoff","ESD protection","custom digital design","design for reliability","schematic entry","physical layout","design verification tools","SPICE simulators","scripting languages","system-level budgeting","signal integrity"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:05:32.632Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad, Telangana, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, FinFET technologies, CMOS tape-outs, Multi-Gbps high-speed designs, SERDES architectures, analog/digital co-design, calibration, adaptation, timing handoff, ESD protection, custom digital design, design for reliability, schematic entry, physical layout, design verification tools, SPICE simulators, scripting languages, system-level budgeting, signal integrity"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_11db841c-998"},"title":"Experience Designer - College Football","description":"<p>Electronic Arts is seeking an Experience Designer to join their team in Orlando, Florida. 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If you reside in a different location, a recruiter will advise on the applicable range and benefits. Pay offered will be determined based on a number of relevant business and candidate factors (e.g. education, qualifications, certifications, experience, skills, geographic location, or business needs).  PAY RANGES \\* British Columbia (depending on location e.g. Vancouver vs. Victoria) \\*$83,000 - $116,400 CAD  Pay is just one part of the overall compensation at EA. In Canada, we offer a package of benefits including vacation (3 weeks per year to start), 10 days per year of sick time, and extended health/dental/vision coverage and basic life insurance.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_11db841c-998","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Electronic Arts Inc.","sameAs":"https://jobs.ea.com","logo":"https://logos.yubhub.co/jobs.ea.com.png"},"x-apply-url":"https://jobs.ea.com/en_US/careers/JobDetail/Experience-Designer-American-Football-Live/212773","x-work-arrangement":"hybrid","x-experience-level":"mid","x-job-type":"temporary","x-salary-range":"$83,000 - $116,400 CAD","x-skills-required":["Graphic Design","Visual Design","Photoshop","Illustrator","Figma","Miro"],"x-skills-preferred":["Composition","Grid","Color Theory","Typography","Layout Design"],"datePosted":"2026-03-09T11:03:58.977Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Orlando, Florida"}},"employmentType":"TEMPORARY","occupationalCategory":"Design","industry":"Technology","skills":"Graphic Design, Visual Design, Photoshop, Illustrator, Figma, Miro, Composition, Grid, Color Theory, Typography, Layout Design","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":83000,"maxValue":116400,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_dfb98ecf-dd6"},"title":"Engineering Architect (Analog Mixed-Signal Architect)","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15195</p>\n<p><strong>Base Salary Range</strong></p>\n<p>$181000-$272000</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/16/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an accomplished engineering leader with a passion for advancing the frontiers of analog mixed-signal technology. With a deep understanding of memory and die-to-die interfaces, you thrive in environments where innovation meets real-world impact. You have a proven track record of architecting high-performance solutions, particularly in the realm of High Bandwidth Memory (HBM) interface design. You are committed to continuous learning, keeping pace with evolving technologies and industry trends. Your communication skills enable you to articulate ideas clearly and work effectively across sites and disciplines. Above all, you are driven by the opportunity to contribute to critical components powering AI systems, knowing your work has a lasting impact on the future of technology.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Reviewing and integrating the latest multichip and interposer technologies from various foundries into Synopsys’ HBM PHY products.</li>\n</ul>\n<ul>\n<li>Defining bump maps and top-level floorplans for HBM PHY products to ensure optimal performance, power, and area (PPA).</li>\n</ul>\n<ul>\n<li>Collaborating with layout teams to deliver top metal covercells optimized for performance and reliability in HBM PHY designs.</li>\n</ul>\n<ul>\n<li>Working with layout and SIPI teams to design interposer geometries that maximize performance and signal integrity.</li>\n</ul>\n<ul>\n<li>Mentoring junior engineers and providing technical guidance across multi-site teams.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Elevate the performance and reliability of Synopsys’ HBM PHY products, directly contributing to the advancement of AI and high-performance computing systems.</li>\n</ul>\n<ul>\n<li>Enable successful integration of cutting-edge multichip and interposer technologies, ensuring Synopsys remains at the forefront of semiconductor innovation.</li>\n</ul>\n<ul>\n<li>Improve manufacturability and scalability of memory interface IPs, supporting the needs of leading semiconductor companies worldwide.</li>\n</ul>\n<ul>\n<li>Drive technical excellence across cross-functional teams, fostering collaboration and knowledge sharing.</li>\n</ul>\n<ul>\n<li>Enhance customer satisfaction by delivering robust, high-quality solutions that meet demanding market requirements.</li>\n</ul>\n<ul>\n<li>Support Synopsys’ reputation as a trusted IP provider through leadership, innovation, and problem-solving.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MS or PhD in Electrical Engineering or related field.</li>\n</ul>\n<ul>\n<li>15+ years of experience in memory or die-to-die interface design.</li>\n</ul>\n<ul>\n<li>Expertise in floorplan optimization for IPs integrating full-custom analog and synthesized digital blocks.</li>\n</ul>\n<ul>\n<li>Strong experience with power grid design and EMIR analysis.</li>\n</ul>\n<ul>\n<li>Proficiency in interposer design and implementation.</li>\n</ul>\n<ul>\n<li>Solid understanding of analog principles and designs (bandgaps, LDO regulators, current mirrors, DLL/PLLs).</li>\n</ul>\n<ul>\n<li>Deep knowledge of signal-integrity and power integrity principles.</li>\n</ul>\n<ul>\n<li>Experience with layout impact on circuit performance and reliability.</li>\n</ul>\n<ul>\n<li>Ability to troubleshoot and debug memory interfaces effectively.</li>\n</ul>\n<ul>\n<li>Excellent communication and collaboration skills across multi-site teams.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>A collaborative leader who inspires and guides teams to technical excellence.</li>\n</ul>\n<ul>\n<li>Detail-oriented, analytical, and able to balance multiple priorities.</li>\n</ul>\n<ul>\n<li>Innovative thinker, open to new approaches and emerging technologies.</li>\n</ul>\n<ul>\n<li>Effective communicator, capable of translating complex technical concepts for diverse audiences.</li>\n</ul>\n<ul>\n<li>Resilient and proactive in addressing challenges and driving solutions.</li>\n</ul>\n<ul>\n<li>Committed to continuous learning and professional growth.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join our High Bandwidth Memory interface design team, a group of passionate engineers dedicated to developing best-in-class IP for the world’s most advanced computing systems. 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Additionally, you will support launch phases for manufacturing plants and implement standardized engineered solutions for metallurgical equipment.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Lead/Support process engineer for specifying and procuring equipment and tooling for metallurgical processing (carburizing, induction hardening, shot peening, and laser welding).</li>\n<li>Qualify machines/tools/processes and implement the machinery and equipment into mfg. systems in powertrain plants.</li>\n<li>Work within cross-functional teams to achieve program targets for cost, quality, and delivery.</li>\n<li>Participate in and support the development of operating strategies such as plant layouts, machinery spare parts, and visual factory, scrap identification/evaluation/disposal, and improve quality and reduce costs.</li>\n<li>Produce process documentation including process flow charts, process illustrations, PFMEA, DCP, process sheets, visual aids, gauging instructions, control charts, and others.</li>\n<li>Develop new materials/heat treatment processing/welding technology/shot peening.</li>\n<li>Support launch phases for manufacturing plants.</li>\n<li>Implement standardized engineered solutions for metallurgical equipment with lead responsibility for ergonomics, safety, productivity, and process conformity.</li>\n<li>Deploy standard engineering methods in the development and delivery of Metallurgical processes and systems.</li>\n<li>Develop metallurgical processes and procure metallurgical machines for all new model programs.</li>\n<li>Provide manufacturing assessments, cost estimates, and feasibility input to new program management.</li>\n<li>Support continuous improvement of Metallurgical Systems and the introduction of new technologies.</li>\n<li>Develop and maintain Bill of Process elements for all Metallurgical methods and equipment specifications.</li>\n<li>Support Design for Manufacturing guides in conjunction with prototypes and deliver Make-Like-Production (MLP) hardware for prototype builds.</li>\n<li>Develop of new testing routines for Core, Surface &amp; micro hardness, develop new cutting &amp; preparation methods for new Gear models and preliminary assessment of capability results.</li>\n<li>Metallurgical lab analysis of components to support forward and current model programs</li>\n</ul>\n<p><strong>Qualifications</strong></p>\n<ul>\n<li>Bachelor of Science in Engineering (Metallurgical or Materials Engineering preferred).</li>\n<li>5+ years of experience in manufacturing engineering and metallurgical laboratory analysis of components.</li>\n<li>High volume ferrous based metallurgical processing experience – including heat treatment, welding, and auxiliary surface treatments – combined with hands-on experience with tooling design for those processes.</li>\n<li>Proficiency in heat treatment processes, metallurgy, hardness testing (core, surface, and micro-hardness).</li>\n<li>Strong ability to perform complex failure analysis and interpret technical engineering drawings (including GD&amp;T).</li>\n<li>Strong communication skills with the ability to work in cross-functional teams and interface with suppliers and plant engineering.</li>\n<li>Strong organizational skills with the ability to handle complex projects, equipment procurement, and multiple objectives during launch phases.</li>\n<li>Ability to travel domestically – up to 20%.</li>\n<li>Vacuum carburizing experience.</li>\n<li>Some knowledge of gear machining and metrology is a plus.</li>\n</ul>\n<p><strong>Benefits</strong></p>\n<ul>\n<li>Immediate medical, dental, vision, and prescription drug coverage</li>\n<li>Flexible family care days, paid parental leave, new parent ramp-up programs, subsidized back-up child care, and more</li>\n<li>Family building benefits including adoption and surrogacy expense reimbursement, fertility treatments, and more</li>\n<li>Vehicle discount program for employees and family members and management leases</li>\n<li>Tuition assistance</li>\n<li>Established and active employee resource groups</li>\n<li>Paid time off for individual and team community service</li>\n<li>A generous schedule of paid holidays, including the week between Christmas and New Year’s Day</li>\n<li>Paid time off and the option to purchase additional vacation time.</li>\n</ul>\n<p><strong>Salary and Benefits</strong></p>\n<p>This position is a salary grade 7-8 and ranges from $84,480-162,120. Final determination of salary grade will be based on candidate&#39;s skills and experience, and base salary will be set within the applicable range according to job scope, responsibility, and competitive market value. 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You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. 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With more than 200 grand prix starts to our name, we pride ourselves on being an ambitious challenger within Formula 1 - and we want you to be part of that journey.</p>\n<p>The first American Formula 1 team to compete in the sport since 1986, TGR Haas F1 Team made an immediate impression with a memorable points-scoring debut at the 2016 Australian Grand Prix. Ten years later, the team is still building momentum, guided by clear objectives and technical partnerships, and fresh from securing its second biggest points haul in a Formula 1 season.</p>\n<p>Yes, you’ll learn from us, but we expect to learn from you too!</p>\n<p>General Summary:</p>\n<p>This position reports to the Head of Electronics or their designee; located in Banbury, UK. Responsible for leading the team  on specification, design, development and project delivery of all electronics and electrical components both on and off car in accordance with the F1 technical regulations.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Promote teamwork and effective communications to develop working relationships between all personnel and departments.</li>\n<li>Taking the lead and driving the design of on and off-car harnesses, units, sensors, plus other assemblies ensuring they meet performance and reliability requirements.</li>\n<li>Leading with the design of FIA, FOM and supplier component installations in accordance with their requirements, working closely with and advising the mechanical design office.</li>\n<li>Drive the specification and design of electronics systems to support on and off-car instrumentation and measurements.</li>\n<li>Generate and support the compilation of installation manuals and associated documentation to aid trackside installation of harnesses, units, sensors and associated components.</li>\n<li>Take a lead role to proactively investigate faults and generate fault reports working closely with the Reliability Engineer and the electronics trackside team.</li>\n<li>Generate mitigation solutions for fault resolutions of electronics, sensors and electrical components both on and off car.</li>\n<li>Continuously monitor and lead improvement of on and off car installations, design standards and operational processes and procedures.</li>\n<li>Support in a leading role, pre-season car build, test and rig events as required to oversee the installation of the electronics system in the chassis as well as garage environment.</li>\n<li>Actively engage in vehicle performance, development and reliability projects giving direction to the Mechanical Design Office for electrical and electronics solutions.</li>\n<li>Follow all safety regulations in all venues.</li>\n<li>Other duties as assigned by the Head of Electronics or their designee.</li>\n</ul>\n<p>Education and Work Experience:</p>\n<ul>\n<li>University Degree or equivalent is essential, preferably in Electronics or Electrical Engineering.</li>\n<li>Multi-year experience of working in state-of-the art electronics engineering in a high-level technology development environment is required.</li>\n<li>Motorsport experience would be advantageous.</li>\n</ul>\n<p>Specialized Knowledge and Skills:</p>\n<ul>\n<li>Thorough knowledge of electronics system design on an F1 chassis and ability to define accurate 3D layouts and drawings to a high standard.</li>\n<li>Advanced knowledge in schematic design and PCB layout and CAD design packages</li>\n<li>Highly experienced in the production of small batch/prototype analogue and digital circuits.</li>\n<li>Deep understanding of sensor technologies and the support electronics required.</li>\n<li>Proven track record of successful fault investigation, containment, and rectification</li>\n<li>Ability to develop, maintain and deliver project plans for all aspects of electronics and electrical development for an F1 race car and off car support equipment.</li>\n<li>Excellent time management skills and ability to work in a technically challenging environment.</li>\n<li>A sympathetic approach to work colleagues and an ability to integrate within a group environment.</li>\n<li>Capability of working in a multi-national team environment to a very high standard and with a positive can-do attitude.</li>\n</ul>\n<p>Equipment and Applications:</p>\n<ul>\n<li>Solid computer knowledge, experience in Microsoft Office products and CAD (e.g. Catia/3DX) and PCB Design (e.g. Altium).</li>\n<li>Knowledge of embedded system programming (e.g. C) and high-level software languages (e.g. C#/VBA) would be advantageous.</li>\n<li>Ability to follow complex regulations related to shipment of materials and facility maintenance requirements.</li>\n</ul>\n<p>Work Environment Physical Demands:</p>\n<p>An ability to work and prioritize within a high pressure, time sensitive environment while retaining a methodical approach is essential. The role may require some international travel and a willingness to work long and flexible hours including weekends.</p>\n<p>This position may require lifting to 50 pounds, repeated bending, squatting and manual dexterity. Fast-paced work environment requiring heavy mental demands. Work environment includes machinery, race cars, 7-post and other rigs, grinding debris, and hazardous fluids. All employees must ensure compliance with the Company Health and Safety Policy, and all relevant other statutory Health and Safety legislation.</p>\n<p>_This job description may not detail some less major duties, nor cover duties of a similar nature, which may from time to time be reasonably required by the relevant manager._</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_6dd982e5-3b6","directApply":true,"hiringOrganization":{"@type":"Organization","name":"TGR Haas F1 Team","sameAs":"https://haasf1team.bamboohr.com","logo":"https://logos.yubhub.co/haasf1team.bamboohr.com.png"},"x-apply-url":"https://haasf1team.bamboohr.com/careers/797","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["electronics system design","schematic design","PCB layout","CAD design","embedded system programming","high-level software languages","time management","project planning","teamwork","communication","problem-solving","fault investigation","containment","rectification"],"x-skills-preferred":["knowledge of F1 technical regulations","experience in motorsport","experience with Catia/3DX and Altium","experience with C and C# programming languages"],"datePosted":"2026-03-08T18:00:05.371Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Banbury, Oxfordshire"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Motorsport","skills":"electronics system design, schematic design, PCB layout, CAD design, embedded system programming, high-level software languages, time management, project planning, teamwork, communication, problem-solving, fault investigation, containment, rectification, knowledge of F1 technical regulations, experience in motorsport, experience with Catia/3DX and Altium, experience with C and C# programming languages"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_bd560ba5-e45"},"title":"Staff Analog Design Engineer (DTE)","description":"<p>This role exists to develop and deliver high-speed PAM4 SERDES IP for next-gen communication systems.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<p>You will be responsible for developing analog sub-block specs based on SerDes standards, refining circuit architectures for optimal power, area, and performance, designing and verifying circuits using advanced simulation tools, collaborating on physical layout to minimize parasitics and variation, presenting simulation data to peers and customers, and documenting design features and test plans.</p>\n<p><strong>What you need</strong></p>\n<ul>\n<li>MSc with 5+ years in analog IC design</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_bd560ba5-e45","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/markham/staff-analog-design-engineer-dte-13613/44408/89385354672","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"contract","x-salary-range":null,"x-skills-required":["analog IC design","SerDes sub-circuits","schematic","layout","verification tools","SPICE simulation","scripting","communication","documentation"],"x-skills-preferred":["transistor-level CMOS design"],"datePosted":"2026-03-06T07:36:56.393Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Markham"}},"employmentType":"CONTRACTOR","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, SerDes sub-circuits, schematic, layout, verification tools, SPICE simulation, scripting, communication, documentation, transistor-level CMOS design"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e6121398-141"},"title":"Applications Engineering, Sr Staff Engineer - RedHawk","description":"<p>We are seeking a highly skilled Applications Engineer to join our team in Zhubei, Taiwan. As a key member of our Applications Engineering team, you will be responsible for providing technical support and training to customers and channel partners.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Providing world-class support to customers and channel partners, ensuring effective usage and satisfaction with Apache BU simulation products focused on Power, Power Integrity, and Reliability.</li>\n<li>Applying advanced knowledge in custom circuit analysis, RTL design, high-performance VLSI design, standard cell physical layout, power-grid extraction, timing analysis, noise analysis, and voltage drop effects to solve complex SoC challenges.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Bachelor’s degree in Electrical Engineering (BSEE) with at least 6 years of experience, Master’s degree (MSEE) with 4 years, or PhD with 2 years in VLSI design.</li>\n<li>Expertise in custom circuit analysis, standard cell physical layout, timing and noise analysis, and voltage drop effects using CAD tools.</li>\n<li>Strong technical knowledge of EDA tools for layout, STA, Extraction (SPEF/DSPF), and Spice simulation.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_e6121398-141","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/zhubei/applications-engineering-sr-staff-engineer-redhawk/44408/92423913664","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["custom circuit analysis","standard cell physical layout","timing and noise analysis","voltage drop effects"],"x-skills-preferred":["EDA tools","layout","STA","Extraction","Spice simulation"],"datePosted":"2026-03-06T07:36:26.166Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Zhubei, Taiwan"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"custom circuit analysis, standard cell physical layout, timing and noise analysis, voltage drop effects, EDA tools, layout, STA, Extraction, Spice simulation"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c572da30-7d1"},"title":"Staff Analog & Mixed Signal Layout Engineer","description":"<p>We are seeking a highly skilled and collaborative engineer with a deep passion for analog and mixed-signal design. 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