{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/layout-effects"},"x-facet":{"type":"skill","slug":"layout-effects","display":"Layout Effects","count":3},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_6eb810f3-99d"},"title":"Layout Design, Staff Engineer-16003","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>As a Layout Design Engineer, you will be designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces. You will collaborate with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</p>\n<p>Responsibilities:</p>\n<ul>\n<li>Designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces.</li>\n<li>Collaborating with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</li>\n<li>Performing floor planning, layout entry, and comprehensive verification to ensure design quality and compliance with foundry rules.</li>\n<li>Applying advanced techniques to mitigate signal integrity issues, ESD, and latch-up risks, including differential routing, shielding, and substrate biasing.</li>\n<li>Optimizing layouts for reliability, matching, and minimizing parasitic effects such as EM and IR drop.</li>\n<li>Supporting design porting activities to enable seamless migration of layouts across multiple foundry nodes and technology platforms.</li>\n<li>Documenting layout methodologies, best practices, and validation results to support knowledge sharing and continuous improvement.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Bachelor or advanced degree in Electrical or Computer Engineering (or equivalent) with a solid background in transistor-level design.</li>\n<li>5+ years of experience in analog and mixed-signal CMOS layout design, including complex integrated circuits.</li>\n<li>Expertise in deep submicron CMOS technologies and layout effects (matching, reliability, proximity, EM, IR, etc.).</li>\n<li>Proficiency in layout floor planning, verification, and quality validation using industry-standard EDA tools.</li>\n<li>Strong knowledge of signal integrity, ESD, and latch-up mitigation techniques.</li>\n<li>Familiarity with UNIX operating systems and scripting languages (TCL, Python) is a plus.</li>\n<li>Experience with Synopsys EDA tools is highly desirable.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Detail-oriented and quality-focused, with a commitment to delivering robust and reliable designs.</li>\n<li>Excellent communicator, able to articulate technical concepts clearly to diverse audiences.</li>\n<li>Collaborative team player who builds productive relationships and networks effectively.</li>\n<li>Self-motivated, organized, and able to manage multiple priorities in a dynamic environment.</li>\n<li>Strong problem-solving skills and critical judgment, with a proactive approach to overcoming challenges.</li>\n<li>Adaptable and eager to learn new technologies and methodologies.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Accelerate the development of cutting-edge silicon IP, enabling faster integration of advanced capabilities into SoCs.</li>\n<li>Enhance the performance, reliability, and manufacturability of high-speed interface solutions for next-generation applications.</li>\n<li>Reduce time-to-market and risk for customers by delivering high-quality, validated layout designs.</li>\n<li>Contribute to the innovation of analog and mixed-signal design methodologies within a global team.</li>\n<li>Support the creation of differentiated products that power the Era of Smart Everything, from AI to IoT and beyond.</li>\n<li>Foster a culture of collaboration, knowledge sharing, and technical excellence within the team and across the organization.</li>\n</ul>\n<p>The Team You&#39;ll Be A Part Of:</p>\n<p>You will join a dynamic, international team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoC solutions. Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_6eb810f3-99d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ottawa/layout-design-staff-engineer-16003/44408/92625958368","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS circuit layout","high-speed SerDes physical interfaces","deep submicron CMOS technologies","layout effects","signal integrity","ESD","latch-up mitigation","UNIX operating systems","scripting languages","Synopsys EDA tools"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.656Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ottawa"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS circuit layout, high-speed SerDes physical interfaces, deep submicron CMOS technologies, layout effects, signal integrity, ESD, latch-up mitigation, UNIX operating systems, scripting languages, Synopsys EDA tools"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_2711d983-5f6"},"title":"Analog Layout Apprenticeship","description":"<p>Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally. Engineer your future with us!</p>\n<p>At Synopsys, Apprentices dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide,and having fun in the process! You&#39;ll have the freedom to share your ideas, unleash your creativity, and explore your interests.</p>\n<p><strong>Responsibilities:</strong> Support layout development of analog and mixed-signal CMOS layouts. Collaborate with layout engineers to understand schematics and implement corresponding layouts. Assist in resolving layout issues and participate in physical verification flows. Learn and follow standard layout methodologies, best practices, and tool flows. Coordinate with team members to ensure timely completion of layout tasks.</p>\n<p><strong>Requirements:</strong> B.E./B.Tech in Electronics, Electrical, Instrumentation, ECE, EEE, VLSI, or related fields. Fresh graduates from the class of 2024 or 2025 only. Not currently enrolled in any M-Tech programs or postgraduate diplomas. Not employed in any full-time positions at any company (limited internship experience is acceptable). Basic familiarity with CMOS layout techniques, design rules, and second-order layout effects. Strong working knowledge of MS Office Suite (Excel, Word, PowerPoint). Open to learning new tools, flows, and methodologies. Strong analytical thinking, good communication skills, and ability to work well in a team.</p>\n<p><strong>Key Program Facts:</strong> Program Length: 12 months apprenticeship program. Location: Bengaluru, India. Working Model: In-office. Full-Time/Part-Time: Full-time. Start Date: March / April 2026.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_2711d983-5f6","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/analog-layout-apprenticeship/44408/93426558144","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"internship","x-salary-range":null,"x-skills-required":["CMOS layout techniques","design rules","second-order layout effects","MS Office Suite","layout methodologies","best practices","tool flows"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:19:12.132Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"INTERN","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS layout techniques, design rules, second-order layout effects, MS Office Suite, layout methodologies, best practices, tool flows"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_0b3b891d-187"},"title":"Analog Design, Principal Engineer","description":"<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You Are:</p>\n<p>You are an experienced Analog Design Manager with a passion for high-speed SerDes technology. You have a proven track record in leading teams to develop cutting-edge analog integrated circuits. Your expertise in Multi-Gbps NRZ &amp; PAM4 SERDES IP, combined with your strong leadership skills, enables you to guide a team through complex design challenges. You thrive in a collaborative environment, working alongside analog and digital designers from diverse backgrounds. Your technical proficiency is complemented by your ability to develop schedules and action plans that ensure project success. With excellent communication and documentation skills, you effectively present design activities and solutions to critical issues. You are committed to fostering an environment of continuous improvement and operational excellence.</p>\n<p>What You’ll Be Doing:</p>\n<p>Directing and guiding the activities of a team of analog designers developing high-speed SERDES IP.\nConducting design reviews and evaluating the final results of simulation and electrical characterization reports.\nPresenting the results of design activities, technology assessments, or critical issue investigations and making recommendations for actions necessary to achieve desired results.\nSelecting, developing, and evaluating personnel to ensure the efficient operation of the team.\nDeveloping schedules and action plans to meet overall project timelines.\nReviewing documented design features and test plans.\nEnsuring that the team follows processes and operational policies for maximum design quality.\nConsulting on the electrical characterization of the SerDes IP product and proposing solutions for post-silicon design updates.</p>\n<p>What You’ll Need:</p>\n<p>B.Tech/BE/M.Tech/MS in Electronics Engineering.\n8+ years of experience in Analog Design for High-Speed SerDes applications.\n3-5 years of experience in a management or supervisory role.\nIn-depth familiarity with transistor level circuit design and sound CMOS design fundamentals.\nDetailed design experience with SerDes sub-circuits such as receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers,voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, and DAC, DSP, Signal Integrity\nFamiliarity with both analog and digital circuits and issues related to interfacing and timing between them.\nAware of ESD issues (i.e. circuit techniques, layout).\nFamiliarity with custom digital design (i.e. highspeed logic paths).\nKnowledge of design for reliability (i.e. EM, IR, aging, etc.).\nKnowledge of layout effects (i.e. matching, reliability, proximity effects, etc.).\nGood communication and documentation skills.</p>\n<p>The Impact You Will Have:</p>\n<p>Driving the development of high-speed SerDes IP that meets industry standards and customer requirements.\nFostering innovation and excellence within the analog design team.\nEnsuring the delivery of high-quality, reliable analog integrated circuits.\nContributing to the advancement of Synopsys&#39; technology portfolio in the analog and mixed-signal domains.\nEnhancing the performance and efficiency of our high-speed communication products.\nSupporting the growth and development of team members through effective leadership and mentorship.</p>\n<p>Who You Are:</p>\n<p>You are a proactive leader with a strong technical background in analog design. You possess excellent problem-solving skills and the ability to make sound decisions under pressure. Your collaborative nature allows you to work effectively with cross-functional teams. You are detail-oriented and have a keen eye for quality. Your passion for continuous learning and improvement drives you to stay updated with the latest industry trends and technologies. You are committed to fostering a positive and inclusive team culture, encouraging innovation and excellence.</p>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You will be part of a fast-growing analog and mixed-signal R&amp;D team developing high-speed analog integrated circuits in the latest FinFET process nodes. The team is composed of talented analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_0b3b891d-187","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/analog-design-principal-engineer-14131/44408/91386421616","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Analog Design","High-Speed SerDes Technology","Multi-Gbps NRZ & PAM4 SERDES IP","Transistor Level Circuit Design","CMOS Design Fundamentals","SerDes Sub-Circuits","ESD Issues","Custom Digital Design","Design for Reliability","Layout Effects"],"x-skills-preferred":["Leadership","Communication","Documentation","Problem-Solving","Decision-Making","Collaboration","Quality Assurance","Continuous Learning","Innovation","Excellence"],"datePosted":"2026-04-05T13:18:01.010Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog Design, High-Speed SerDes Technology, Multi-Gbps NRZ & PAM4 SERDES IP, Transistor Level Circuit Design, CMOS Design Fundamentals, SerDes Sub-Circuits, ESD Issues, Custom Digital Design, Design for Reliability, Layout Effects, Leadership, Communication, Documentation, Problem-Solving, Decision-Making, Collaboration, Quality Assurance, Continuous Learning, Innovation, Excellence"}]}