Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.
\nWe are seeking a Senior Engineer to join our R&D engineering team focused on virtual platform development and enhancement using Synopsys Virtualizer. The successful candidate will be responsible for implementing SystemC / TLM2.0 models within the Synopsys Virtualizer environment based on hardware specifications, developing and integrating C++ models for CPUs, interconnects, memories, and peripherals to create comprehensive virtual platforms, configuring and customizing Virtualizer platforms to support early firmware, bootloader development, and Linux/RTOS bring-up, optimizing models and platforms for performance, scalability, and maintainability, integrating virtual platforms with debuggers, build systems, and CI pipelines for seamless software development workflows, utilizing Python for Virtualizer automation, simulation orchestration, and test/regression frameworks, conducting deep root-cause analysis across hardware models and software stacks to ensure robust debugging and system analysis.
\nThe successful candidate will be part of a dedicated R&D engineering team focused on virtual platform development and enhancement using Synopsys Virtualizer. The team collaborates closely with firmware, OS, and hardware groups to enable early software development and system-level debugging. You will work in a supportive, innovative environment that values technical excellence, teamwork, and continuous learning.
\nThe ideal candidate will have a minimum of 2 years of professional experience in virtual prototyping, R&D, and embedded systems, expert-level proficiency in C++ (C++11/14/17 or later) and SystemC (including TLM2.0, model composition, timing, and synchronization), strong Python skills for automation, scripting, and testing, deep understanding of embedded systems architecture (ARM and/or RISC-V processors, memory-mapped I/O, interrupts, DMA, timers, interconnects), excellent command of Linux development and debugging workflows, good software debugging and root-cause analysis skills, fluent English communication skills (written and spoken), military service status: completed or exempted, hands-on experience with Synopsys Virtualizer and knowledge of functional safety standards (e.g., ISO 26262) are assets.
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\nOur ideal candidate will have a strong academic foundation in electrical engineering, formal training and demonstrated expertise in ISO 26262 functional safety standards, and hands-on experience with semiconductor development flows and digital design at the IP/SoC level. You will also have proficiency in English, both written and spoken, for effective collaboration and documentation.
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\nIf you are a detail-oriented and organized individual with exceptional analytical and problem-solving abilities, and a collaborative team player who communicates effectively with colleagues and customers worldwide, we encourage you to apply for this exciting opportunity.
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\nYou will work with AVL's team to ensure the development of safe and secure automotive systems. This role involves experience in safety standards (ISO 26262) and related methods, such as risk analysis, functional and technical safety concepts (FSC and TSC). You will also be responsible for performing Threat Analysis and Risk Assessment (TARA) for automotive components and systems, developing Security Concepts and Security Requirements, and supporting penetration testing, fuzz testing, and vulnerability analysis.
\nResponsibilities
\nBenefits
\nHow to Apply
\nIf you are interested in this role, please submit your application through our online application tool. We look forward to hearing from you!
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\nAbout AVL
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\nDefining and continuously updating the control architecture for the propulsion domain. Leading the roadmap and technical direction for control functions, including torque management, energy management, and diagnostics. Overseeing functional validation activities across SIL/HIL platforms and vehicle testing. Ensuring full requirements traceability and compliance with industry standards throughout the development cycle. Driving technical decision-making in coordination with Software Project Leaders, Hardware Leads, and the Calibration Manager. Managing KPI reporting and risk tracking in a clear and consistent manner. Contributing to technical or quality task forces and supporting rapid issue resolution during critical situations.
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\nThis role keeps a world-championship-winning F1 team running. When equipment fails, races can be lost, so your work directly impacts performance. You’ll develop deep expertise in high-spec facilities and have clear progression into senior facilities management roles. The F1 environment means you’ll work with cutting-edge building systems and learn from the best in the industry.
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