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    <job>
      <externalid>87c43ead-4a1</externalid>
      <Title>Staff Site Reliability Engineer, Security- GCP</Title>
      <Description><![CDATA[<p>Secure Every Identity</p>
<p>Okta secures AI by building the trusted, neutral infrastructure that enables organisations to safely embrace this new era.</p>
<p>We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work.</p>
<p>Okta&#39;s Workforce Identity Cloud Security Engineering group is looking for an experienced and passionate Staff Site Reliability Engineer to join a team focused on designing and developing Security solutions to harden our cloud infrastructure.</p>
<p>We encourage you to prescribe defence-in-depth measures, industry security standards and enforce the principle of least privilege to help take our Security posture to the next level.</p>
<p>Our Infrastructure Security team has a niche skill-set that balances Security domain expertise with the ability to design, implement, rollout infrastructure across multiple cloud environments without adding friction to product functionality or performance.</p>
<p>We are responsible for the ever-growing need to improve our customer safety and privacy by providing security services that are coupled with the core Okta product.</p>
<p>This is a high-impact role in a security-centric, fast-paced organisation that is poised for massive growth and success.</p>
<p>You will act as a liaison between the Security org and the Engineering org to build technical leverage and influence the security roadmap.</p>
<p>You will focus on engineering security aspects of the systems used across our services.</p>
<p>Join us and be part of a company that is about to change the cloud computing landscape forever.</p>
<p>As a Staff Engineer, you should be able to identify gaps, propose innovative solutions, and contribute to roadmaps while driving alignment across multiple teams within the organisation.</p>
<p>Additionally, you should serve as a role model, providing technical mentorship to junior team members and fostering a culture of learning and growth</p>
<p>What are we looking for?</p>
<p>We are looking for a security-first SRE engineer who doesn&#39;t just &#39;flag&#39; issues but builds the automation to solve them.</p>
<p>You should have a deep-seated intuition for cloud-native security and a proven track record of hardening large-scale GCP and AWS environments.</p>
<p>As a Technical SME, you will design and build production infrastructure with a &#39;security-at-scale&#39; mindset.</p>
<p>What You Will Work On?</p>
<p>Security Evangelism: Lead initiatives to strengthen our security posture for critical infrastructure and promote best practices across the engineering organisation.</p>
<p>Incident Response &amp; Reliability: Respond to production security incidents, perform root cause analysis, and build automated preventions to ensure high performance and reliability.</p>
<p>Automated Hardening: Identify manual security processes and automate them using custom tooling and CI/CD integrations.</p>
<p>Architecture &amp; Documentation: Develop technical documentation, runbooks, and procedures for a 24x7 online environment.</p>
<p>Platform Evolution: Continuously evolve our monitoring platforms, moving from simple auditing to active, automated prevention.</p>
<p>Minimum Required Knowledge, Skills, &amp; Abilities:</p>
<p>Experience: 8+ years of experience architecting and running complex cloud networking and infrastructure, with at least 7+ years specialised in DevSecOps or Cloud Security.</p>
<p>GCP Expertise: Minimum 3+ years of deep, hands-on experience securing GCP (GKE, GCE, Shared VPC etc).</p>
<p>Infrastructure as Code (IaC): 10+ years of experience using Terraform and Chef to manage complex cloud resources and OS hardening.</p>
<p>Automation Mastery: Expert-level proficiency in Go, Python, or Ruby for building custom security tooling and automated remediation.</p>
<p>Hardened Containers: Proven track record of securing containerised workloads, including image scanning, K8s RBAC, and runtime security tools (e.g., CrowdStrike Falcon, Falco, or gVisor).</p>
<p>Unflappable Troubleshooting: A &#39;see a problem, fix the problem&#39; mindset with the ability to debug complex networking, IAM, or performance issues under pressure.</p>
<p>Security Foundations: Strong grasp of Linux internals, OS hardening (CIS benchmarks), and IP protocols (TLS/SSL, DNSSEC, BGP).</p>
<p>Education: BS in Computer Science or equivalent professional experience.</p>
<p>Key Responsibilities:</p>
<p>IAM &amp; Secrets Management: Design and maintain large-scale production IAM policies and secrets management workflows.</p>
<p>Infrastructure Hardening: Implement and maintain Public Key Infrastructure (PKI) and ensure all GCE/GKE environments meet strict compliance standards.</p>
<p>Operational Excellence: Utilise industry-standard tools like OSQuery, Splunk, Chronicle, Nessus, or Qualys/Crowdstrike to monitor system health and security telemetry.</p>
<p>Strategic Rollouts: Lead the phased transition of security policies from Audit/Detection mode to Blocking/Prevention mode, ensuring zero impact on production uptime.</p>
<p>Bonus Points For:</p>
<p>Multi-Cloud IAM Governance: Experience designing a unified IAM framework across AWS and GCP, utilising federated Identities such as Workload, Workforce Identity Federation with understanding of SAML &amp; OIDC auth mechanism and automated &#39;Least Privilege&#39; enforcement.</p>
<p>Cloud-Native Reliability Engineering: Deep understanding of multi-cloud reliability patterns, maintaining high availability (HA) during security patching or infrastructure-wide hardening.</p>
<p>Hardened Kubernetes Orchestration: Advanced experience securing GKE, EKS, and kOps, specifically implementing Pod Security Standards, Network Policies, and Admission Controllers for a &#39;Zero-Trust&#39; posture.</p>
<p>Threat Modeling: Security Reviews &amp; Threat Modeling at both Design &amp; Implementation scope.</p>
<p>The Okta Experience - Supporting Your Well-Being - Driving Social Impact - Developing Talent and Fostering Connection + Community</p>
<p>We are intentional about connection. Our global community, spanning over 20 offices worldwide, is united by a drive to innovate. Your journey begins with an immersive, in-person onboarding experience designed to accelerate your impact and connect you to our mission and team from day one.</p>
<p>Okta is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, colour, religion, sex, sexual orientation, gender identity, national origin, ancestry, marital status, age, physical or mental disability, or status as a protected veteran. We also consider for employment qualified applicants with arrest and convictions records, consistent with applicable laws.</p>
<p>If reasonable accommodation is needed to complete any part of the job application, interview process, or onboarding please use this Form to request an accommodation.</p>
<p>Notice for New York City Applicants &amp; Employees: Okta may use Automated Employment Decision Tools (AEDT), as defined by New York City Local Law 144, that use artificial intelligence, machine learning, or other automated processes to assist in our recruitment and hiring process. In accordance with NYC Local Law 144, if you are an applicant or employee residing in New York City, please click here to view our full NYC AEDT Notice.</p>
<p>Okta is committed to complying with applicable data privacy and security laws and regulations. For more information, please see our Personnel and Job Candidate Privacy Notice at https://www.okta.com/legal/personnel-policy/</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>cloud-native security, GCP, AWS, DevSecOps, Cloud Security, Terraform, Chef, Go, Python, Ruby, containerised workloads, image scanning, K8s RBAC, runtime security tools, Linux internals, OS hardening, IP protocols, TLS/SSL, DNSSEC, BGP</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Okta</Employername>
      <Employerlogo>https://logos.yubhub.co/okta.com.png</Employerlogo>
      <Employerdescription>Okta provides cloud-based identity and access management solutions.</Employerdescription>
      <Employerwebsite>https://www.okta.com/</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://job-boards.greenhouse.io/okta/jobs/6671260</Applyto>
      <Location>Bengaluru, India</Location>
      <Country></Country>
      <Postedate>2026-04-18</Postedate>
    </job>
    <job>
      <externalid>d890a652-74d</externalid>
      <Title>Senior Security Engineer, SecOps</Title>
      <Description><![CDATA[<p>At Greenlight, we believe every child should have the opportunity to become financially healthy and happy. Our Security Operations team safeguards our mission-critical fintech infrastructure through advanced threat detection, innovative internally built AI tooling, comprehensive incident response, and strategic security architecture.</p>
<p>As a Senior Security Engineer, you will be a hands-on practitioner responsible for detecting, investigating, and responding to security threats across our cloud-native platform. You&#39;ll play a critical role in our day-to-day security operations triaging alerts, leading incident investigations, managing vulnerabilities, and continuously improving our detection capabilities.</p>
<p>This role is ideal for someone with strong security analyst fundamentals who is eager to grow their engineering skills and contribute to building and improving security tooling over time. You will collaborate closely with engineering, infrastructure, and product teams to ensure security is woven into everything we build.</p>
<p><strong>Responsibilities</strong></p>
<ul>
<li>Serve as a frontline responder for security incidents , triage alerts, lead investigations, coordinate cross-functional response efforts, and drive post-incident reviews and remediation</li>
<li>Monitor and tune security tooling and detection rules to identify threats across our cloud infrastructure and applications; reduce false positives and improve signal quality</li>
<li>Perform proactive threat hunting to identify attack patterns, anomalous behavior, and gaps in detection coverage</li>
<li>Support and maintain security controls across our AWS environment, including monitoring for misconfigurations, access issues, and infrastructure risks</li>
<li>Contribute to building and improving security automation, scripts, and internal tooling to reduce manual overhead and enhance operational efficiency; grow into deeper engineering contributions over time</li>
<li>Own the enterprise vulnerability management program, establishing risk-based prioritization frameworks and driving organization-wide remediation strategies</li>
<li>Spearhead AI/ML integration and automation initiatives to transform security operations, reduce manual overhead, and enhance detection capabilities</li>
<li>Assist with and contribute to AI-driven security initiatives and automation efforts within the team</li>
<li>Support ongoing security compliance, audit, and certification programs (e.g., PCI, SOC2)</li>
<li>Work closely with engineering, infrastructure, and product teams to provide security guidance and support security-by-design practices</li>
<li>Participate in team knowledge sharing, document runbooks and playbooks, and contribute to continuous improvement of SecOps processes</li>
<li>Participate in on-call rotation and serve as a first responder to security event escalations</li>
</ul>
<p><strong>Requirements</strong></p>
<ul>
<li>6+ years of experience in security operations, incident response, or a security analyst role, preferably in cloud-centric environments</li>
<li>Strong hands-on experience with incident response and investigation alert triage, forensic analysis, root cause determination, and remediation</li>
<li>Solid understanding of common attack vectors, threat intelligence fundamentals, and attacker tactics, techniques, and procedures (TTPs)</li>
<li>Working knowledge of cloud security fundamentals (AWS) IAM, VPC, CloudTrail, GuardDuty, Security Hub, or equivalent services</li>
<li>Familiarity with TCP/IP protocols, network analysis, and common network/security tooling (SIEM, EDR, IDS/IPS)</li>
<li>Demonstrated ability to identify exploits, vulnerabilities, and misconfigurations and drive remediation in cloud and server environments</li>
<li>Growth mindset genuine interest in developing engineering skills (scripting, automation, tooling) and growing beyond a pure analyst role</li>
<li>Ability to participate in an on-call rotation and respond to security event escalations</li>
<li>Team player comfortable collaborating across India and US teams (primarily PST timezone)</li>
</ul>
<p><strong>Nice to Have</strong></p>
<ul>
<li>Experience with scripting languages (Python, PowerShell, etc.)</li>
<li>Experience with public cloud security (AWS, Azure, GCP)</li>
<li>Red/Blue team experience</li>
<li>Security certifications (e.g., CISSP, Security+, CEH, GIAC)</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>hybrid</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>security operations, incident response, cloud security, AWS, TCP/IP protocols, network analysis, SIEM, EDR, IDS/IPS, scripting languages, public cloud security, Red/Blue team experience, security certifications</Skills>
      <Category>Engineering</Category>
      <Industry>Finance</Industry>
      <Employername>Greenlight</Employername>
      <Employerlogo>https://logos.yubhub.co/greenlight.com.png</Employerlogo>
      <Employerdescription>Greenlight is a family fintech company that provides a banking app for families. It serves over 6 million parents and kids.</Employerdescription>
      <Employerwebsite>https://www.greenlight.com/</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://jobs.lever.co/greenlight/fb069667-f056-4648-9fc7-0f20c6ace815</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-17</Postedate>
    </job>
    <job>
      <externalid>241e4fcf-3f6</externalid>
      <Title>ASIC Digital Design, Principal Engineer</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and passionate ASIC Digital Design Engineer who thrives in dynamic and collaborative environments. You have a proven track record in RTL design and verification, and you are excited about contributing to cutting-edge technology. With your extensive expertise, you can handle complex and unique issues, often requiring innovative solutions. You are adept at communicating with both internal and external stakeholders, ensuring that your designs meet the highest standards of quality and performance.</p>
<p>What You’ll Be Doing:</p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
<li>Developing and executing comprehensive test plans to verify the functionality and performance of your designs.</li>
<li>Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.</li>
<li>Mentoring junior engineers, providing guidance and support to help them grow their skills and contribute effectively to the team.</li>
<li>Staying up to date with the latest industry trends and technologies, continuously improving your skills and knowledge.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Driving innovation in ASIC design, contributing to the development of cutting-edge technology that shapes the future.</li>
<li>Ensuring the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.</li>
<li>Enhancing the overall quality and performance of Synopsys&#39; products through meticulous design and verification processes.</li>
<li>Collaborating with cross-functional teams to solve complex design challenges, ensuring seamless integration and functionality.</li>
<li>Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement within the team.</li>
<li>Contributing to Synopsys&#39; reputation as a leader in the semiconductor industry through your expertise and innovative solutions.</li>
</ul>
<p>What You’ll Need:</p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design, using industry standard HDLs; Verilog, SystemVerilog.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
<li>Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC design, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).</li>
<li>Broad knowledge of the full digital ASIC and IP development flow, including RTL design, lint, CDC, RDC, synthesis and STA.</li>
<li>Experience with power analysis and RTL level power optimization techniques.</li>
<li>Familiarity with verification languages and methodologies; SystemVerilog, SVA, UVM.</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>A proactive and self-motivated individual who takes initiative and acts independently with minimal oversight.</li>
<li>A strategic thinker with the ability to implement goals that have a direct impact on department results.</li>
<li>A detail-oriented engineer who works meticulously to ensure the highest standards of quality and performance.</li>
<li>A collaborative team player who thrives in dynamic and fast-paced environments.</li>
<li>A lifelong learner who stays up to date with the latest industry trends and continuously seeks to improve their skills and knowledge.</li>
</ul>
<p>The Team You’ll Be A Part Of:</p>
<p>You will be part of a highly skilled and dynamic ASIC Digital Design team focused on delivering high-performance and reliable ASIC solutions. Our team collaborates closely with various departments, including analog design, physical design, and applications engineering, to ensure the seamless integration of all design components. We are committed to continuous learning and improvement, fostering a culture of innovation and excellence.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design, Verilog, SystemVerilog, EDA tools, High-Performance Interface IP protocols, Power analysis, Verification languages and methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It was founded in 1986 and has since grown to become a global company with over 10,000 employees.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/asic-digital-design-principal-engineer/44408/91546981744</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>0478524b-cdb</externalid>
      <Title>ASIC Digital Design, Principal Engineer</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>As a Principal Engineer in ASIC Digital Design, you will lead the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals. You will collaborate closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</p>
<p>Key responsibilities include:</p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems</li>
<li>Collaborating with cross-functional teams to ensure seamless integration of all design components</li>
<li>Developing and executing comprehensive test plans to verify the functionality and performance of your designs</li>
<li>Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency</li>
<li>Mentoring junior engineers, providing guidance and support to help them grow their skills and contribute effectively to the team</li>
</ul>
<p>As a Principal Engineer, you will have a significant impact on the development of cutting-edge technology that shapes the future. You will ensure the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.</p>
<p>To succeed in this role, you will need:</p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification</li>
<li>Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC designs</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders</li>
</ul>
<p>If you are a proactive and self-motivated individual who takes initiative and acts independently with minimal oversight, we encourage you to apply for this exciting opportunity.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design, EDA tools, High-Performance Interface IP protocols, analytical skills, problem-solving skills, leadership skills, communication skills, collaboration skills</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions for the semiconductor industry.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/munich/asic-digital-design-principal-engineer/44408/92974526576</Applyto>
      <Location>Munich</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>5004de27-21f</externalid>
      <Title>ASIC Digital Verification, Principal Engineer</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and highly skilled ASIC Digital Verification Engineer with a passion for ensuring the highest quality in digital design. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges and delivering innovative solutions. You are detail-oriented, with a strong analytical mindset, and can communicate effectively with various stakeholders. Your ability to mentor and lead junior engineers is a testament to your extensive experience in the field. You thrive in a collaborative environment and are committed to continuous learning and improvement.</p>
<p>What You&#39;ll Be Doing:</p>
<ul>
<li>Designing and implementing verification environments to ensure the correctness of Interface IP protocols.</li>
<li>Creating and executing detailed test plans to verify complex ASIC designs.</li>
<li>Developing and maintaining verification IP and testbenches using SystemVerilog and UVM.</li>
<li>Collaborating with design and architecture teams to identify and fix bugs.</li>
<li>Performing functional coverage analysis and driving coverage closure.</li>
<li>Mentoring and guiding junior verification engineers in best practices and methodologies.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.</li>
<li>Enhancing the robustness and efficiency of our verification processes and methodologies.</li>
<li>Contributing to the successful launch of Interface IP products, impacting various industries.</li>
<li>Driving innovation and excellence within the verification team.</li>
<li>Improving the overall performance and functionality of Synopsys&#39; IP offerings.</li>
<li>Fostering a culture of continuous improvement and technical excellence.</li>
</ul>
<p>What You&#39;ll Need:</p>
<ul>
<li>Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet.</li>
<li>Proficiency in SystemVerilog and UVM methodologies.</li>
<li>Strong understanding of digital design and verification concepts.</li>
<li>Experience with simulation tools such as VCS, ModelSim, or similar.</li>
<li>Excellent problem-solving skills and attention to detail.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>Detail-oriented with a strong analytical mindset.</li>
<li>Excellent communicator, able to convey complex technical concepts clearly.</li>
<li>Collaborative team player who thrives in a dynamic environment.</li>
<li>Proactive and self-motivated, with a commitment to continuous learning.</li>
<li>Mentor and leader, capable of guiding and developing junior engineers.</li>
</ul>
<p>The Team You&#39;ll Be A Part Of:</p>
<p>You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange>$166,000-$249,000</Salaryrange>
      <Skills>ASIC digital verification, Interface IP protocols, SystemVerilog, UVM methodologies, Digital design and verification concepts, Simulation tools (VCS, ModelSim)</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It was founded in 1986 and has since grown to become a global company with over 10,000 employees.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/austin/asic-digital-verification-principal-engineer/44408/93498497008</Applyto>
      <Location>Austin</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>c160f208-ea8</externalid>
      <Title>Principal Engineer, ASIC Digital Design</Title>
      <Description><![CDATA[<p>We are seeking a Principal Engineer, ASIC Digital Design to join our team in Munich, Germany. As a Principal Engineer, you will be responsible for leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital design and verification, RTL design, EDA tools and methodologies, High-Performance Interface IP protocols, Complex design challenges</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. The company&apos;s technology is used to design and develop complex semiconductor solutions, and its products are used by companies around the world to create high-performance, reliable, and power-efficient chips.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/munich/principal-engineer-asic-digital-design/44408/91458064640</Applyto>
      <Location>Munich, Bavaria, Germany</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>0a64aeaf-c20</externalid>
      <Title>ASIC Digital Design, Architect</Title>
      <Description><![CDATA[<p>We are seeking an experienced ASIC Digital Design Engineer to join our team in Dublin. The successful candidate will be responsible for designing and verifying complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital design and verification, RTL design, EDA tools and methodologies, High-Performance Interface IP protocols, Complex design challenges</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. The company&apos;s technology is used to design and develop complex semiconductor products, such as chips and systems-on-chip (SoCs). Synopsys&apos; solutions are used by leading companies in the electronics industry to create innovative products that power a wide range of applications, from consumer electronics to data centres and artificial intelligence systems.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/dublin/asic-digital-design-architect/44408/91458064848</Applyto>
      <Location>Dublin</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>2a30b6e4-ca4</externalid>
      <Title>ASIC Verification, Principal Engineer</Title>
      <Description><![CDATA[<p>Opening.</p>
<p><strong>What you&#39;ll do</strong></p>
<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>
<ul>
<li>Designing, implementing and optimizing verification environments to ensure the correctness of Interface IP protocols.</li>
<li>Creating, executing and tracking against detailed test plans to verify complex ASIC designs.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).</li>
<li>Proficiency in System Verilog, SVA and UVM methodologies.</li>
<li>Strong understanding of digital design and verification concepts.</li>
<li>Familiarity with wider digital ASIC and IP development flow, including RTL design through synthesis.</li>
<li>Experience with simulation tools such as VCS, Model Sim, or similar.</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>remote</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital verification, Interface IP protocols, System Verilog, SVA, UVM methodologies, Digital design and verification concepts, Simulation tools, Analytical and problem-solving skills, Communication skills, RTL design through synthesis, VCS, Model Sim, or similar</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/reading/asic-verification-principal-engineer/44408/91539646624</Applyto>
      <Location>Reading, United Kingdom</Location>
      <Country></Country>
      <Postedate>2026-02-11</Postedate>
    </job>
  </jobs>
</source>