Responsibilities: Assist in the design, development, and analysis of vessel hull forms, arrangements, structures, and mechanical systems for ASVs Conduct hydrodynamic and stability calculations, including resistance, propulsion, seakeeping, and maneuvering simulations Collaborate with other engineers to perform CAD modeling, structural design, and weight management for vessel optimization Support the integration of autonomous navigation and control systems into vessel designs Assist in conducting model tests and validation in collaboration with engineers and programmers Participate in design reviews and brainstorming sessions for new and existing vessel concepts Research and stay updated on new developments in naval architecture, autonomous technology, and defense requirements Support documentation, technical writing, and preparation of reports for internal use and client presentations

Qualifications: Bachelors or Masters degree in Naval Architecture, Marine Engineering, Ocean Engineering, or a related field Strong fundamentals in core naval architecture principles, including ship design, stability, structures, propulsion, and hydrodynamics Proficiency with CAD software (e.g., Rhino, AutoCAD, SolidWorks, ShipConstructor) and simulation tools (e.g., Orca3D, Star CCM+, Simerics, IHDE, ANSYS, or equivalent)

Benefits: Medical Insurance: Comprehensive health insurance plans covering a range of services Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care Saronic pays 100% of the premium for employees and 80% for dependents Time Off: Generous PTO and Holidays Parental Leave: Paid maternity and paternity leave to support new parents Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses Retirement Plan: 401(k) plan Stock Options: Equity options to give employees a stake in the company’s success Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Physical Requirements: Mobility and Movement: Ability to stand and walk for extended periods (e.g., 4–8 hours/day), climb stairs or ladders occasionally (if accessing elevated workspaces), bend, stoop, kneel, or crouch as needed during inspections or audits Manual Dexterity: Ability to manipulate small parts and tools during product inspections. Ability to use precision measuring instruments (e.g., calipers, micrometers) Lifting and Carrying: Ability to lift and carry up to 25–50 pounds occasionally (e.g., sample materials, equipment). Ability to push or pull carts or equipment as needed Visual and Auditory Requirements: Must have strong visual acuity (close vision, color vision, depth perception) to inspect products and read technical documents. Ability to detect subtle differences in materials, surface finish, or defects. Adequate hearing ability to respond to alarms, machine sounds, or communicate in noisy environments Environmental Conditions: Ability to work in manufacturing, warehouse, or cleanroom environments (may include exposure to dust, noise, or temperature variations). May require wearing personal protective equipment (PPE) such as gloves, safety glasses, ear protection, or lab coats Technology Use: Comfortable working at a computer workstation for extended periods (for report writing, data analysis, and documentation)

Additional Information: This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3)

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The successful candidate will have hands-on experience in post-silicon test setups, sound knowledge of Digital/AMS chip design and post-silicon debug, a BS or MS degree in Electrical Engineering with 3+ years of experience, understanding of top-level physical design, board-level, and package-level designs, and expertise in RTL development and physical design.

As a member of our rapidly expanding PVT IP group, you will collaborate with a group of innovative and highly skilled professionals to drive the future of technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

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As a Sr Staff Engineer in ASIC Digital Design, you will be responsible for architecting and designing embedded RISC microprocessor IP at both architectural and RTL levels. You will write comprehensive high-level architecture and micro-architecture specifications for processor designs, optimize designs for performance, speed, area, and power, and develop standalone Verilog testbenches to verify modules and ensure robust functionality.

You will also debug design issues and collaborate closely with verification teams to resolve bugs and improve quality. Additionally, you will maintain existing processor product lines and derivative products, ensuring ongoing reliability and innovation.

You will work closely with multi-site, multi-time zone, and multi-cultural teams on aspects like design, implementation, physical design, and verification. You will also develop and manage project plans, working closely with program managers to align deliverables and timelines.

As a member of the Synopsys ARC Processor hardware team, you will contribute to the advancement of processor technology and work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will join a team of passionate engineers dedicated to advancing processor technology and collaborate with global teams to deliver innovative solutions. You will work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will be responsible for driving improvements in design methodology and verification processes, raising the bar for quality and speed of delivery. You will also facilitate seamless collaboration across global teams, fostering a culture of shared knowledge and success.

You will support the growth and maintenance of Synopsys' processor product portfolio, ensuring market competitiveness. You will enable customers to build smarter, faster, and more energy-efficient devices by delivering optimized processor designs.

You will contribute to the evolution of silicon chip technology that powers intelligent systems worldwide.

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We are seeking an experienced and highly motivated individual with a passion for technology and innovation. You will serve as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs) and working to enable IP as a product development platform. You will handle hands-on post-silicon test setups, collaborate on top-level physical design, board-level, and package-level designs, and develop post-silicon reports and conduct debug analysis.

The successful candidate will drive the successful development and deployment of PVT IP sensors, enhance the reliability and performance of Synopsys' silicon lifecycle monitoring solutions, ensure high-quality product development through meticulous testing and debugging, and contribute to the continuous innovation in chip design and software security.

Key responsibilities include:

• Serving as the single point of contact for post-silicon debug activities
• Enabling Product Requirement Documents (PRDs)
• Working to enable IP as a product development platform
• Handling hands-on post-silicon test setups
• Collaborating on top-level physical design, board-level, and package-level designs
• Developing post-silicon reports and conducting debug analysis

Requirements:

• Hands-on experience in post-silicon test setups
• Sound knowledge of Digital/AMS chip design and post-silicon debug
• BS or MS degree in Electrical Engineering with 3+ years of experience
• Understanding of top-level physical design, board-level, and package-level designs
• Expertise in RTL development and physical design

The ideal candidate will be a strong communicator with excellent teamwork and interpersonal skills, detail-oriented with a mindset geared towards IP debug and documentation, proactive learner with the ability to adapt to new IP functionalities, effective leader with strong people management skills, and highly motivated and capable of mentoring both internal teams and external customers.

You will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process. Collaborate with a group of innovative and highly skilled professionals to drive the future of technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Sales Account Management, Sr Staff - HiTech

Shanghai, Shanghai Municipality, China

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Category: SalesHire Type: Employee

Job ID 16465Date posted 03/22/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned sales professional with a passion for connecting technology solutions to customer needs. You thrive in dynamic environments, leveraging your deep understanding of the semiconductor industry to build meaningful relationships and drive business growth. You possess a strategic mindset, consistently identifying opportunities to expand market share and deliver value to clients. Your high energy and collaborative spirit make you a trusted partner both internally and externally. You are adept at navigating complex sales cycles, communicating technical concepts to varied audiences, and negotiating win-win outcomes. Comfortable with ambiguity, you proactively seek solutions, adapt to evolving priorities, and inspire your team to achieve ambitious goals. You value diversity and inclusion, recognizing the power of varied perspectives in delivering exceptional results. Your commitment to excellence is evident in your meticulous attention to detail, relentless pursuit of targets, and dedication to continuous learning. You are motivated not only by individual success but by contributing to the broader mission of Synopsys, helping to shape the future of technology in Shanghai and beyond.

What You’ll Be Doing:

• Developing and executing strategic account plans for key customers in the semiconductor, electronics, and software sectors.

• Building and maintaining long-term relationships with clients, ensuring high levels of satisfaction and retention.

• Identifying new business opportunities, driving revenue growth through solution-based selling.

• Collaborating closely with technical teams to align Synopsys’ offerings with customer requirements and market trends.

• Managing complex sales cycles, including contract negotiations, pricing discussions, and closing deals.

• Providing market insights and feedback to internal stakeholders to inform product development and business strategy.

• Representing Synopsys at industry events, conferences, and customer meetings to showcase our innovative solutions.

The Impact You Will Have:

• Drive significant revenue growth across the Greater China region, contributing to Synopsys’ global expansion.

• Strengthen Synopsys’ market position by developing deep customer relationships and identifying strategic opportunities.

• Influence product direction by bringing customer feedback and market intelligence to internal teams.

• Enhance customer satisfaction by delivering tailored solutions and exceptional service.

• Foster cross-functional collaboration between sales, engineering, and marketing teams.

• Champion Synopsys’ brand and technology leadership within the industry.

What You’ll Need:

• Bachelor’s degree in Engineering, Business, or related field; Master’s preferred.

• 8+ years of sales experience, preferably within semiconductor, EDA, or high-tech industries.

• Proven track record of exceeding sales targets and managing enterprise-level accounts.

• Strong understanding of chip design, verification, and IP integration technologies.

• Exceptional negotiation, communication, and presentation skills.

• Familiarity with CRM tools and sales analytics platforms.

Who You Are:

• Strategic thinker with a results-driven mindset.

• Excellent problem-solving and analytical abilities.

• Collaborative team player who values diverse perspectives.

• Adaptable, resilient, and proactive in facing challenges.

• Customer-centric with strong relationship-building skills.

• Ethical, trustworthy, and committed to delivering value.

The Team You’ll Be A Part Of:

You’ll join a dynamic and highly skilled sales team focused on driving growth in Shanghai and the broader Greater China region. Our team collaborates closely with technical experts, marketing professionals, and global leadership to deliver innovative solutions tailored to customer needs. We foster a culture of support, knowledge sharing, and continuous improvement, empowering each member to achieve their full potential.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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We are seeking a Senior Staff Engineer - Solutions Engineering to join our team. As a Senior Staff Engineer, you will be responsible for serving as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs), working to enable IP as a product development platform, handling hands-on post-silicon test setups, collaborating on top-level physical design, board-level, and package-level designs, developing post-silicon reports, and conducting debug analysis.

The successful candidate will have hands-on experience in post-silicon test setups, sound knowledge of Digital/AMS chip design and post-silicon debug, a BS or MS degree in Electrical Engineering with 6+ years of experience, understanding of top-level physical design, board-level, and package-level designs, and expertise in RTL development and physical design.

As a Senior Staff Engineer, you will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process. Collaborate with a group of innovative and highly skilled professionals to drive the future of technology.

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As a Senior Product Sales Manager (Embedded Systems), you will be responsible for driving product sales activities for new and renewal business across assigned product lines to achieve or exceed revenue objectives.

Key responsibilities include:

• Selling products and services through both telephone and face-to-face interactions, adapting your approach to suit customer preferences.
• Collaborating with field sales, enterprise sales, and channel partners to develop and execute strategies that maximize product and service revenue.
• Identifying and uncovering opportunities in current and new accounts, seamlessly transitioning leads to direct sales teams for follow-up.
• Facilitating communication between sales and technical teams to share updates on product capabilities, success stories, and winning strategies.

In this role, you will have the opportunity to:

• Accelerate revenue growth and market share for assigned product lines through proactive sales and strategic partnerships.
• Enhance the visibility and reputation of Synopsys solutions within the industry by delivering impactful presentations and participating in conventions.
• Strengthen relationships with customers and partners, fostering loyalty and long-term engagement.

To succeed in this role, you will need:

• A bachelor's degree in technical, engineering, business, or related field; or equivalent sales/consulting experience.
• Minimum 4+ years of sales or consulting experience in engineering/technology applications with proven success, or 6+ years without a degree.
• Strong understanding of product market position and sales fundamentals.
• Ability to work cross-functionally with teams such as ACE, DEV, Marketing, PM, and across various hierarchies.
• Proven ability to foster collaboration and coordinate with globally distributed personnel.
• Aptitude for problem-solving and delivering tailored solutions for customers.
• Fluency in English and the local language of the territory.
• Willingness and ability to travel up to 50% as required.

If you are a driven and results-oriented sales professional with a passion for technology and engineering solutions, we encourage you to apply for this exciting opportunity.

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You are an experienced and highly motivated individual with a passion for technology and innovation. You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development. Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled. You thrive in a dynamic environment and excel in communication, teamwork, and leadership.

As a Staff Engineer in our PVT IP group, you will be responsible for driving the successful development and deployment of PVT IP sensors. You will enhance the reliability and performance of Synopsys' silicon lifecycle monitoring solutions, ensure high-quality product development through meticulous testing and debugging, and contribute to the continuous innovation in chip design and software security.

Key responsibilities include serving as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs), working to enable IP as a product development platform, handling hands-on post-silicon test setups, collaborating on top-level physical design, board-level, and package-level designs, developing post-silicon reports, and conducting debug analysis.

To succeed in this role, you will need hands-on experience in post-silicon test setups, sound knowledge of Digital/AMS chip design and post-silicon debug, a BS or MS degree in Electrical Engineering with 3+ years of experience, understanding of top-level physical design, board-level, and package-level designs, and expertise in RTL development and physical design.

You will be part of a rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process.

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At Synopsys, we're seeking a Staff Engineer (Machine Learning) to join our Machine Learning Center of Excellence (ML CoE) within our Silicon Design & Verification business. As a key member of this highly innovative team, you'll be responsible for designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.

Key Responsibilities:

• Designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.
• Integrating ML-driven solutions into a variety of EDA tools, building on the success of DSO.ai and expanding beyond physical implementation.
• Automating chip design flows with scripting languages (Perl, Python, Tcl, shell scripts) to increase efficiency and reproducibility.
• Collaborating with cross-functional teams to identify design bottlenecks and propose innovative solutions for enhancing power, performance, and area (PPA).
• Conducting research and prototyping novel chip design methodologies, demonstrating new concepts, and driving them to productization.
• Staying current with industry trends in silicon design, machine learning, and EDA, and championing their adoption within Synopsys' product lines.

Impact:

• Accelerate the development of next-generation silicon chips by enabling smarter, faster design optimization through AI and machine learning.
• Reduce time-to-market for customers by eliminating months off project schedules, directly impacting their competitiveness.
• Enhance the performance, power efficiency, and cost-effectiveness of chips designed with Synopsys' tools, driving industry-leading outcomes.
• Shape the evolution of EDA software by pioneering ML-driven methodologies adopted by semiconductor leaders worldwide.
• Enable customers to autonomously explore vast design spaces, achieving optimal results with reduced manual intervention.
• Strengthen Synopsys' position as the global leader in silicon design and verification by delivering innovative, high-impact solutions.

Requirements:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related discipline.
• 5+ years of experience in chip design, EDA, or related fields.
• Expertise in at least one domain of chip design (architectural, micro-architectural, RTL, circuit, or physical design).
• Strong programming and automation skills using Perl, Python, Tcl, or shell scripting.
• Solid understanding of Unix/Linux environments and design flow automation.
• Knowledge of industry-standard RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, and signoff flows.
• Familiarity with low power design techniques, computer architecture, and machine learning principles.

Who We're Looking For:

• A creative problem solver who approaches challenges with curiosity and resilience.
• An effective communicator who collaborates well with multidisciplinary teams.
• Detail-oriented with a passion for quality and continuous improvement.
• Self-driven, adaptable, and comfortable with ambiguity in fast-paced environments.
• Committed to learning, growth, and sharing knowledge with others.

The Team You'll Be A Part Of:

You'll join the Machine Learning Center of Excellence (ML CoE) within Synopsys' Silicon Design & Verification business. This highly innovative team is at the forefront of integrating AI and ML into chip design, collaborating with experts across architecture, implementation, and verification. Together, you'll drive the development of ML-based design optimization solutions and set new standards for the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Location

San Francisco

Employment Type

Full time

Department

Scaling

Compensation

• $225K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

Benefits

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.

About the Role

We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge

This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees.

In this role, you will:

• Lead system signal integrity (SI) design for AI supercomputer product in the data center application.

• Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies

• Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity

• Perform simulation and modeling to identify and troubleshoot signal integrity issues

• Lead system interconnect design, bring up and qualification

• As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.

You might thrive in this role if you:

• Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications

• Have a strong bias toward action, and won’t take no for an answer.

• Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level

• Have experience with PCB, connector and cable design

• Have a strong intrinsic desire to learn and fill in missing skills; and an equally strong talent for sharing that information clearly and concisely with others.

• Are comfortable with ambiguity and rapidly changing conditions.

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What you'll do

• Providing technical guidance and hands-on support to customers integrating Synopsys Interface IP (PCI Express and High Speed SerDes design) into their ASIC SoC/systems
• Conducting detailed integration reviews at key customer milestones and troubleshooting complex integration challenges throughout the SoC design flow.

What you need

• Bachelor's and/or masters with a minimum 10+yrs of Industry experience or equivalent
• At least 5+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered)
• Solid understanding of ASIC design flows, including simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure
• Hands-on expertise in integration and validation of High Speed SerDes IPs for PCIe, ETH, USB

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What you'll do

• Providing technical guidance and hands-on support to customers integrating Synopsys Interface IP (PCI Express and High Speed SerDes design) into their ASIC SoC/systems
• Conducting detailed integration reviews at key customer milestones and troubleshooting complex integration challenges throughout the SoC design flow.

What you need

• Masters with 10+yrs of Industry experience or equivalent
• At least 10+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered)

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What you'll do

• Developing and executing strategic account plans to drive revenue growth and achieve sales targets.
• Building and maintaining strong relationships with key decision-makers at enterprise clients.

What you need

• Extensive experience in enterprise sales within the semiconductor or technology industry.

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What you'll do

• Engaging in business development and customer meetings to identify and drive business opportunities.
• Defining and promoting products to achieve sustainable growth within the USB Solution IP product lines.

What you need

• BS EE with 10+ years of relevant experience, or MS EE with 8+ years of relevant experience (MBA preferred).
• Experience in product marketing or technical marketing, preferably in system-level, ASIC, or system-on-chip design.
• Knowledge of USB protocol, mixed signal, and semiconductor chip design.
• Ability to analyze market segments and applications.

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What you'll do

• Developing and executing strategic account plans to drive revenue growth and achieve sales targets.
• Building and maintaining strong relationships with key decision-makers at enterprise clients.
• Identifying new business opportunities and expanding Synopsys' footprint within assigned accounts

What you need

• Extensive experience in enterprise sales within the semiconductor or technology industry.
• Strong understanding of chip design, EDA tools, or IP integration solutions.
• Proven ability to manage complex sales cycles and negotiate large-scale contracts.

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What you'll do

• Empowering the creation of high-performance silicon chips and software content.

What you need

• Strong technical skills in chip design, verification, and IP integration.

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