Responsibilities:

• Architect and implement high-performance C++ and Python systems across cross-platform environments.
• Lead the design and integration of distributed systems, simulation tools, and third-party hardware/software.
• Define and enforce technical direction, design patterns, and integration practices across projects.
• Guide teams in building robust messaging and API layers (e.g., gRPC, REST, ZeroMQ) that bridge critical system components.
• Own the evolution and support of CI/CD pipelines using GitLab CI, Docker, Conan, and CMake.
• Lead debugging and optimization of real-time and multi-threaded systems across a range of domains.
• Drive end-to-end integration efforts, including planning, implementation, and verification across simulation and operational systems.
• Serve as a force multiplier by mentoring other engineers and contributing to shared tooling and process improvements.
• Evaluate and incorporate new technologies that improve system performance, stability, and developer efficiency.

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As a Senior Software Engineer, C++ Software Integration, you will design, implement, and maintain C++ and Python software in support of complex, cross-platform systems. You will contribute to system architecture with a focus on performance, maintainability, and integration. You will develop and support APIs and messaging interfaces, integrate third-party software and hardware systems, including real-time and simulation tools. You will debug and support distributed systems, with attention to threading, timing, and data flow. You will apply modern agile practices such as test-driven development, continuous integration, and automated testing. You will improve and maintain CI/CD workflows using tools like GitLab CI, Docker, CMake, and Conan. You will collaborate across teams and projects to share solutions and promote good software practices. You will continuously learn and adapt to new tools, standards, and technologies.

This position is ideal for a C++ generalist who thrives on tackling complex challenges in systems and systems integration. If you enjoy building cross-language software, improving CI/CD pipelines, and integrating distributed real-time systems, you'll find this role rewarding.

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Responsibilities:

• Architect and implement high-performance C++ and Python systems across cross-platform environments.
• Lead the design and integration of distributed systems, simulation tools, and third-party hardware/software.
• Define and enforce technical direction, design patterns, and integration practices across projects.
• Guide teams in building robust messaging and API layers (e.g., gRPC, REST, ZeroMQ) that bridge critical system components.
• Own the evolution and support of CI/CD pipelines using GitLab CI, Docker, Conan, and CMake.
• Lead debugging and optimization of real-time and multi-threaded systems across a range of domains.
• Drive end-to-end integration efforts, including planning, implementation, and verification across simulation and operational systems.
• Serve as a force multiplier by mentoring other engineers and contributing to shared tooling and process improvements.
• Evaluate and incorporate new technologies that improve system performance, stability, and developer efficiency.

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Responsibilities:

• Architect and implement high-performance C++ and Python systems across cross-platform environments.
• Lead the design and integration of distributed systems, simulation tools, and third-party hardware/software.
• Define and enforce technical direction, design patterns, and integration practices across projects.
• Guide teams in building robust messaging and API layers (e.g., gRPC, REST, ZeroMQ) that bridge critical system components.
• Own the evolution and support of CI/CD pipelines using GitLab CI, Docker, Conan, and CMake.
• Lead debugging and optimization of real-time and multi-threaded systems across a range of domains.
• Drive end-to-end integration efforts, including planning, implementation, and verification across simulation and operational systems.
• Serve as a force multiplier by mentoring other engineers and contributing to shared tooling and process improvements.
• Evaluate and incorporate new technologies that improve system performance, stability, and developer efficiency.

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As a High-Speed Interface Digital Design Manager, you will be responsible for managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement. You will drive architecture specification, digital design, and verification activities for current and next-generation products, engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met.

Key responsibilities include:

• Leading a high-performing digital and verification engineering team focused on the design and delivery of advanced SerDes IP
• Managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement
• Driving architecture specification, digital design, and verification activities for current and next-generation products
• Engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met

Requirements include:

• Bachelor's or Master's degree in Electrical Engineering or related field
• 10+ years of hands-on digital design and verification experience in the semiconductor industry
• 5+ years of proven leadership and people management experience, preferably in ASIC or IP development environments
• Deep knowledge of the ASIC development flow, including architecture specification, digital design, and verification methodologies
• Experience with high-speed interface protocols (e.g., PCIe, Ethernet, USB) and digital signal processing techniques
• Expertise in managing customer escalations and facilitating technical discussions during pre- and post-sales phases
• Proficiency with industry-standard EDA tools, scripting, and project management platforms

Benefits include:

• Comprehensive medical and healthcare plans
• Time away programs
• Family support
• ESPP
• Retirement plans
• Competitive salaries

If you are a strong leader with excellent team-building and mentoring skills, a customer-focused and results-oriented individual with sound decision-making abilities, a collaborative communicator able to build strong cross-functional alliances, organized, detail-oriented, and adept at managing multiple priorities efficiently, adaptable, proactive, and committed to continuous improvement, we encourage you to apply.

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As an experienced and visionary ASIC digital design architect, you will thrive in a fast-paced, collaborative environment. You will bring a passion for solving complex system-level challenges and a track record of delivering innovative, high-quality silicon solutions.

Your deep understanding of IP and SoC architectures enables you to see the big picture while meticulously refining subsystem details. You are comfortable navigating ambiguity, building consensus across diverse teams, and translating product requirements into robust, scalable architectures.

Your leadership inspires those around you, and you excel at mentoring and empowering engineers to reach their full potential. You are adept at balancing trade-offs across performance, power, area, and security, always striving for the optimal solution.

Communication is your strength,you articulate technical concepts clearly to both technical and non-technical stakeholders, ensuring alignment and shared understanding.

With a growth mindset, you embrace new challenges, technologies, and methodologies, continuously seeking opportunities to innovate and improve.

You value inclusion and diversity, recognizing that the best ideas emerge from a culture where everyone feels empowered to contribute.

As an IP Subsystems Architect, you will define architectural specifications for complex subsystems, translate system-level requirements into detailed subsystem architectures, and integrate multiple IP blocks into cohesive subsystems.

You will lead cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.

Establishing and guiding verification and validation strategies, including defining coverage requirements and participating in silicon bring-up and debug sessions.

Producing comprehensive architecture documents, specifications, and guidelines, and clearly communicating architectural intent to a wide range of stakeholders.

Mentoring and coaching engineers, driving best practices, and fostering a culture of technical excellence.

Shape the architecture of industry-leading silicon IP and subsystem solutions that power millions of devices worldwide.

Accelerate time-to-market for differentiated products by ensuring robust and efficient subsystem design and integration.

Reduce risk through rigorous requirements management, architectural clarity, and cross-functional alignment.

Enhance product performance, power efficiency, and reliability, directly impacting customer satisfaction and competitive advantage.

Foster innovation by mentoring teams, introducing new methodologies, and championing best practices.

Strengthen Synopsys’ position as a trusted technology leader in the semiconductor ecosystem.

Bachelor’s or Master’s degree in Electronics or a related field, with 15+ years of industry experience.

At least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture roles.

Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (e.g., SV UVM, BFM development).

Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.).

Experience with synthesis, lint, CDC, low-power flows, and achieving verification closure.

Strong documentation and communication skills for effective cross-team alignment and requirements management.

A strategic thinker with exceptional leadership and mentoring capabilities.

A collaborative partner who thrives in diverse, cross-functional teams.

An excellent communicator, able to tailor messaging for both technical and non-technical audiences.

Innovative and proactive, always seeking opportunities to improve processes and outcomes.

Resilient and adaptable, comfortable with change and ambiguity.

Committed to fostering an inclusive and empowering team culture.

Join the Digital IP Subsystems Team at Synopsys,a high-performing group of architects, designers, and engineers focused on delivering world-class silicon IP and subsystem solutions.

The team collaborates closely with hardware, software, verification, and product teams across the globe, driving innovation in next-generation SoCs for AI, automotive, 5G, IoT, and more.

Together, we value creativity, technical excellence, and inclusion, empowering each team member to make a significant impact.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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As a Senior Manager of SOC Engineering, you will oversee and drive end-to-end RTL design, verification, architecture, and integration of advanced subsystems. You will lead teams in Bangalore/Hyderabad, manage customer communications, and ensure timely, high-quality delivery. You will guide your team through the full lifecycle: from requirements to release, ensuring excellence at every stage. Foster innovation and continuous improvement, motivating engineers to reach their full potential.

Key Qualifications:

• Bachelor's or Master's in Electronics or related field, with 15+ years of overall experience
• 8+ years of hands-on techno-managerial experience managing remote and local teams
• Strong track record in Subsystem/SoC design, architecture, and implementation
• Deep expertise in Verilog/System Verilog and simulation tools
• Proficiency with interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.)
• Experience with synthesis, lint, CDC, low power flows, and verification closure (SV UVM, BFM development, test environment creation)
• Outstanding communication skills and a passion for team development

What Sets You Apart:

• You have strong, hands-on technical experience and thrive on rolling up your sleeves to solve complex challenges
• You excel at turning high-level requirements into innovative solutions and see projects through to successful, timely completion
• You build strong, trust-based relationships with customers and stakeholders, always putting their needs at the centre
• You bring a creative mindset and lead proactively, inspiring your team to think big, embrace change, and drive continuous improvement

Hands-on experience is an absolute must for success in this role.

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Key Responsibilities:

• Collaborate with digital design teams to develop high-speed mixed-signal PHY IPs.
• Participate in RTL and Gate-Level Simulation (GLS) verification for mixed-signal designs.
• Define, develop, and execute functional verification plans and test strategies.
• Conduct RTL and SDF-annotated gate-level simulations using UVM-based methodologies.
• Generate VCD files and perform power analysis/reporting using PrimeTime PX.

Requirements:

• Minimum of 2 years of experience in ASIC RTL design flow.
• Proficiency in RTL and GLS verification, with strong debugging capabilities.
• Excellent teamwork and communication skills, with professional proficiency in English.
• Strong knowledge of high-speed interface protocols (e.g., DDR, HBM, or PCIe PHYs) is a distinct advantage.

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking a highly skilled and experienced ASIC verification professional to lead technical teams and drive excellence in digital design.

As a Sr Staff Engineer - DDR, you will be responsible for technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.

You will specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores.

You will perform verification tasks for IP cores, working closely with RTL designers and architects to ensure functional correctness.

You will develop and implement advanced test plans and test environments at both unit and system levels.

You will code and debug test cases, including the creation of complex checkers and assertions using System Verilog/UVM.

You will extract and review functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.

You will manage regressions and contribute to the continuous improvement of verification strategies and test environments.

This role requires a deep understanding of verification methodologies, serial interface protocols, and the intricacies of IP core development.

You should have demonstrated experience in technically leading a team for DDR IP projects, with a track record of successful collaboration and stakeholder management.

You should have proven expertise in developing HVL (System Verilog/UVM) based test environments for complex ASIC designs.

You should have advanced skills in developing and implementing rigorous test plans, checkers, and assertions.

You should have strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.

You should have experience with serial interface protocols and IP design/verification processes; knowledge of DDR/LPDDR is highly desirable.

You should have hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.

You will join the DesignWare IP Verification R&D team, a group of talented and passionate engineers committed to advancing Synopsys' leadership in semiconductor IP.

The team focuses on delivering world-class verification solutions for a broad portfolio of synthesizable IP cores, leveraging the latest methodologies and technologies to ensure our products meet the most rigorous quality and performance standards.

Collaboration, innovation, and a drive for excellence define our culture.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a skilled and passionate engineer with expertise in system design, embedded firmware, digital design, and verification with over 8+ years of experience. You are a skilled engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry. You value collaboration and mentorship, welcoming opportunities to both learn from and share knowledge with your peers. Your experience with memory interface protocols such as DDR, LPDDR and HBM enables you to quickly contribute to our next-generation solutions.

Technical knowledge in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results. You are passionate about right first-time development, ensuring traceability of all verification requirements and covering the whole ecosystem of Controller and PHY.

You bring knowledge of system, digital, firmware design, high-speed memory interface skills. Your experience includes delivering "best-in-class" solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows.

What You’ll Be Doing:

• Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs
• Contributing and collaborating with hardware teams to analyze and debug embedded firmware
• Optimizing and developing new PHY training algorithms using system level modeling tools
• Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity
• Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support
• Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals
• Reproducing silicon failures on FPGA/Emulation to identify root causes
• Fostering technical excellence and knowledge sharing across the organization.

The Impact You Will Have:

• Enhancing cross-functional collaboration to improve product quality and end customer satisfaction.
• Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up
• Standardizing and optimizing workflows to increase efficiency and compliance.
• Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration.
• Directly impact customer success by providing guidance, technical support, and innovative solutions.
• Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.

What You’ll Need:

• 8+ years of experience in Firmware, ASIC design, verification, system validation, and technical roles.
• Be results driven
• Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment.
• Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.
• In-depth knowledge of system-level validation for high-speed interface PHY
• Proven track record of working cross-functionally and driving issues to closure
• Knowledge of mixed-signal design
• Experience in working in cross-functional collaborations
• Be an excellent communicator and a beacon for change

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity:

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements, and get differentiated products to market quickly with reduced risk.

You Are:

You are a talented Firmware Development Engineer with a passion for embedded systems and software innovation. You thrive in environments where high-speed and precision matter, bringing a strong programming background and an aptitude for developing reliable, scalable firmware solutions. Your expertise in C programming and familiarity with scripting languages such as Perl, TCL, or Python make you a versatile contributor. You are experienced in developing firmware for complex embedded systems and high-speed interfaces, and you take pride in rigorous problem-solving and debugging. You enjoy collaborating with hardware engineers to ensure seamless integration between firmware and hardware, and you are skilled at navigating verification and emulation environments to enhance product quality. Your attention to detail and commitment to delivering robust, high-quality firmware are matched by your ability to adapt to new challenges in a fast-moving industry. You value diversity and inclusion, and you are comfortable working in a dynamic, multicultural team. Whether you are mentoring junior engineers, spearheading integration efforts, or contributing to pre-silicon environments, you consistently demonstrate initiative, innovation, and a collaborative spirit. If you are excited to power the Era of Smart Everything and help shape tomorrow’s breakthroughs, you’ll find your place at Synopsys.

What You’ll Be Doing:

• Designing and implementing firmware for high-speed PHY IPs using C programming.
• Developing and maintaining software development environments and tools to streamline workflows.
• Collaborating with hardware engineers to ensure firmware compatibility and optimized integration with hardware designs.
• Conducting rigorous unit testing and debugging to ensure high-quality firmware performance
• Utilizing verification and emulation environments to enhance the integration process and support pre-silicon development.
• Documenting design processes, maintaining code quality, and ensuring compliance with industry standards.
• Staying current with emerging technologies in embedded systems and high-speed interfaces.

The Impact You Will Have:

• Accelerating the integration of advanced capabilities into SoCs through robust firmware development.
• Enhancing product reliability, performance, and time-to-market for customers in diverse industries.
• Supporting the development of differentiated products that power innovations like AI, 5G, IoT, and self-driving cars.
• Reducing risk and optimizing project outcomes by leveraging your expertise in embedded systems and high-speed interfaces.
• Driving cross-functional collaboration between software and hardware teams to deliver seamless solutions.
• Contributing to Synopsys’ leadership in silicon IP and embedded technology by delivering high-quality, scalable firmware.

What You’ll Need:

• Bachelor’s degree in Electronics Engineering with 3-8 years of relevant experience, or Master’s degree with 2-6 years.
• Strong programming skills in C and familiarity with software development methodologies.
• Experience with scripting languages such as Perl, TCL, or Python.
• Proven experience in firmware development for complex embedded systems or high-speed interfaces.
• Excellent problem-solving and debugging skills, especially in unit testing and integration scenarios.
• Knowledge of high-speed interface protocols such as DDR, LPDDR (preferred).
• Experience with pre-silicon environments, including verification or emulation (preferred).

Who You Are:

• Analytical, detail-oriented, and committed to delivering high-quality results.
• Collaborative and effective communicator, able to work across diverse teams and disciplines.
• Adaptable and eager to learn new technologies and methodologies.
• Proactive, with a passion for innovation and continuous improvement.
• Inclusive and respectful, supporting a diverse and multicultural work environment.

The Team You’ll Be A Part Of:

You will join a vibrant Silicon IP engineering team dedicated to developing and integrating advanced firmware for high-speed interfaces. The team consists of experts in embedded systems, software, and hardware design, working together to solve complex challenges and deliver industry-leading solutions. Collaboration, innovation, and a commitment to excellence define the team’s culture as they support customers in bringing differentiated products to market quickly and efficiently.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Date posted 02/24/2026

Category EngineeringHire Type EmployeeJob ID 15312Remote Eligible NoDate Posted 02/24/2026

Senior Digital Verification Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an ambitious and detail-oriented engineering professional with a passion for digital verification and ASIC design. You thrive in dynamic and diverse environments, bringing a collaborative spirit and a strong eagerness to learn. Your background in electronics engineering equips you with deep technical expertise, and your experience in pre-silicon verification of complex PHY IPs, ASIC, or SoC designs sets you apart. You approach challenges with a solution-oriented mindset and are adept at diagnosing intricate issues efficiently. You are comfortable working across multiple verification platforms and methodologies, and you enjoy mentoring and sharing knowledge within your team. Your adaptability enables you to keep pace with evolving technologies, and you value inclusion, diversity, and continuous improvement. You are motivated by the opportunity to contribute to groundbreaking innovations in the silicon IP domain, and you are committed to delivering quality results that help bring differentiated products to market quickly. If you are excited by the chance to be at the forefront of smart technology—powering everything from AI to IoT—you will find your next challenge here at Synopsys.

What You’ll Be Doing:

• Developing robust functional verification environments (test benches) for high-speed PHY IPs.
• Creating comprehensive test plans and detailed test cases to ensure thorough coverage.
• Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs).
• Executing simulations, generating both random and focused stimuli, and performing coverage analysis to validate design functionality.
• Building architectural and micro-architectural understanding of complex digital design blocks under verification.
• Collaborating with cross-functional engineering teams to resolve issues and optimize verification strategies.
• Contributing to process improvements and sharing best practices within the team.

The Impact You Will Have:

• Accelerate the integration of advanced capabilities into SoCs, enabling customers to meet performance, power, and size requirements.
• Ensure the delivery of differentiated, high-quality silicon IP products with reduced risk and faster time-to-market.
• Drive innovation in verification methodologies that support the development of next-generation technologies, including AI, cloud, 5G, and IoT.
• Enhance the reliability and functionality of high-speed digital interfaces, powering smart devices across industries.
• Support Synopsys’ leadership in chip design and software security by maintaining rigorous verification standards.
• Contribute to a culture of inclusion and excellence, mentoring junior engineers and promoting diversity within the team.

What You’ll Need:

• Bachelor’s degree in Electronics Engineering with 3-8 years of relevant experience, or Master’s degree with 2-6 years.
• Solid background in pre-silicon verification of complex PHY IPs, ASIC, or SoC designs.
• Proficiency in Verilog, System Verilog, UVM, and netlist simulations.
• Experience with industry-standard development and verification tools and methodologies.
• Excellent diagnostic and problem-solving skills for identifying and resolving verification issues.
• Preferred: Experience with formal verification, System Verilog Assertions, and code/functional coverage implementation and analysis.
• Preferred: Familiarity with scripting languages such as Perl, TCL, and Shell scripting.
• Preferred: Knowledge of high-speed interface protocols such as DDR and LPDDR.

Who You Are:

• Detail-oriented and analytical thinker with a proactive approach to problem-solving.
• Effective communicator who thrives in collaborative and diverse team environments.
• Adaptable and eager to learn new technologies and methodologies.
• Resourceful and resilient in overcoming technical challenges.
• Committed to fostering inclusion, respect, and continuous improvement within the workplace.

The Team You’ll Be A Part Of:

You will join a high-performing Silicon IP engineering team that specializes in developing and verifying advanced digital design blocks for integration into SoCs. Our team values innovation, collaboration, and knowledge sharing, working together to deliver industry-leading solutions for customers worldwide. We are passionate about technology and driven by the success of our products and people.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

A peek inside our office

Po Popal

Workplace Resources, Sr Director

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Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Senior Digital Verification Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements, and get differentiated products to market quickly with reduced risk. Join us to transform the future through continuous technological innovation.

You Are:

You are a driven Digital Verification Engineer with a passion for technology and innovation. You thrive on tackling complex verification challenges and excel in pre-silicon functional verification of high-speed PHY IPs. Your strong foundation in RTL enables you to develop robust verification environments, and your eagerness to learn keeps you at the forefront of industry advancements. You possess a dynamic personality that brings energy to your team, and you’re adept at collaborating with diverse colleagues. You take ownership of verification activities, from creating comprehensive test plans and test cases to implementing advanced checkers and assertions. Your diagnostic and problem-solving skills are exceptional, allowing you to quickly analyze failures and optimize verification flows. You are comfortable with industry-standard tools and methodologies, and you enjoy working in environments that require both independent initiative and teamwork. Your familiarity with scripting languages and high-speed interface protocols further enhances your versatility. If you are ready to lead verification efforts that power the Era of Smart Everything, Synopsys is the place where your skills and passion will make a lasting impact.

What You’ll Be Doing:

• Developing functional verification environments (test benches) for complex digital design blocks.
• Creating comprehensive test plans and test cases to ensure thorough coverage and robust design validation.
• Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs).
• Performing simulations, generating random and focused stimulus, and conducting coverage analysis to verify functionality.
• Building architecture and micro-architecture knowledge of digital blocks under test to drive effective verification strategies.
• Collaborating with cross-functional teams to share insights and resolve issues throughout the pre-silicon verification process.
• Utilizing industry-standard verification tools and methodologies to enhance efficiency and quality.

The Impact You Will Have:

• Ensuring the reliability and performance of high-speed PHY IPs through rigorous pre-silicon functional verification.
• Accelerating product time-to-market by identifying and resolving design issues early in the development cycle.
• Reducing risk for customers by delivering thoroughly verified and differentiated silicon IP solutions.
• Supporting the development of next-generation products that power innovations in AI, 5G, IoT, and more.
• Contributing technical expertise to the team, fostering a culture of continuous improvement and learning.
• Promoting collaboration and knowledge sharing across engineering teams to achieve collective goals.

What You’ll Need:

• Bachelor’s degree in Electronics Engineering with 3-8 years of relevant experience, or Master’s degree with 2-6 years.
• Background in pre-silicon verification of complex PHY IPs, ASIC, or SoC designs.
• Proficiency in Verilog, System Verilog, UVM, and netlist simulations.
• Excellent diagnostic and problem-solving skills for debugging and optimizing verification flows.
• Experience with industry-standard development and verification tools and methodologies.
• Familiarity with scripting languages such as Perl, TCL, and Shell scripting (preferred).
• Experience with formal verification, System Verilog Assertions, and code/functional coverage analysis (preferred).
• Knowledge of high-speed interface protocols such as DDR and LPDDR (preferred).

Who You Are:

• Analytical thinker with a strong eagerness to learn and grow.
• Dynamic personality, energizing and motivating team members.
• Strong communicator, able to collaborate effectively in diverse environments.
• Self-motivated leader, capable of driving verification activities independently and as part of a team.
• Detail-oriented, ensuring thorough validation and quality in all deliverables.

The Team You’ll Be A Part Of:

You will be part of a highly skilled Silicon IP engineering team focused on delivering robust verification solutions for high-speed PHY interfaces. The team is composed of experts in digital design, verification, and architecture, working collaboratively to solve complex challenges and push the boundaries of semiconductor technology. Together, you will contribute to the development of industry-leading products that power the next generation of intelligent devices.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

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You are an experienced ASIC Digital Signoff Engineer with a deep passion for developing cutting-edge technology and direct hands-on experience with EM and IR flows. With over 10 years of hands-on experience, you have honed your skills in high-speed digital IP cores and/or SOCs development. You have a solid understanding of digital design flows and deep expertise in Static Timing Analysis (STA), Power Analysis, and EM/IR for advanced node designs.

Your technical expertise is complemented by your ability to foster cross-functional collaboration, driving innovation and effective communication across global teams. Your analytical mind and problem-solving skills enable you to tackle complex challenges and deliver high-quality results. You are known for your clear and concise documentation, and your familiarity with Synopsys tools and high-speed interface protocols is a significant advantage.

You will develop and deploy advanced node signoff methodologies for cutting-edge IP designs targeting different foundries. You will work with leading edge designs and teams to drive the industry best PPA for IP designs. You will evaluate and exercise various aspects of the development flow which include signoff timing, power, physical verification, EM/IR analysis, and ECO's.

You will develop and maintain best in class digital design methodologies, including documentation, scripts, and training materials. You will work as a liaison between EDAG tool and IP design teams. You will continuously improve and refine design processes to enhance efficiency and performance.

You will have a BS or MS in EE with 10+ years of hands-on experience developing high-speed digital IP cores and/or SOCs. You will have knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions. You will have direct hands-on experience with enabling advanced node Redhawk SC EM and IR flows.

You will have the ability to facilitate cross-functional collaboration, including fostering innovation, improving communication, and driving results. You will have good analysis, debugging, and problem-solving skills. You will have solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.

You will have familiarity with other Synopsys tools such as StarRC and ICV is a plus. You will have working knowledge of high-speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.

You will drive innovation in high-speed digital IP core and Subsystem development. You will enhance the efficiency and effectiveness of our design and verification processes. You will contribute to the development of state-of-the-art technology that powers the next generation of intelligent systems. You will ensure the highest quality standards in the design and implementation of our products.

You will facilitate seamless collaboration across global teams, fostering a culture of innovation and excellence. You will support the continuous improvement of our design methodologies and tools, staying at the forefront of industry advancements.

You will join the Interface IP Digital Design Methodology team, working with global teams to define best practice ASIC design standards and flows. This team is dedicated to supporting IP development teams and is involved with next-generation SerDes and Memory interface controllers, PHYs, and subsystems.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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What you'll do

As a Sr Staff Engineer, you will be responsible for designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.

• Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.
• Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.
• Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.

What you need

• MS/PhD in Computer Science, Electrical Engineering, or related field from a reputed institute, with 10+ years of relevant experience.
• Expertise in RTL development using Verilog or System Verilog, with a strong background in digital design principles.
• Hands-on experience with Xilinx and Altera FPGA platforms, including familiarity with Xilinx Vivado and related tools.
• Advanced problem-solving and debugging skills, especially in digital verification, emulation, and prototyping environments.
• Experience with scripting languages such as Tcl, Python, Perl, and a solid understanding of system and CPU architecture (DMA, interrupts, etc.).
• Exposure to embedded system development and interface protocols (USB, PCIe, DDR, AXI).

Why this matters

• Accelerate the development of industry-leading prototyping systems, enabling faster time-to-market for cutting-edge ASIC designs.
• Enhance the functionality and reliability of Synopsys' HAPS and ProtoCompiler products through innovative hardware and software solutions.
• Drive customer satisfaction by delivering robust, scalable, and user-friendly prototyping tools that meet diverse engineering needs.
• Contribute to Synopsys' reputation as a leader in verification and prototyping technology, influencing industry standards and practices.

What you'll be doing

• Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.
• Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.
• Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.
• Developing and maintaining complex EDA software for high-performance prototyping systems.
• Implementing digital debug, verification, emulation, and prototyping strategies to ensure robust and reliable designs.
• Creating RTL for interfaces such as USB, PCIe, DDR, and AXI, and overseeing full design flow including verification and lab bring-up.
• Supporting and enhancing existing products and features, responding to evolving customer needs with innovative solutions.
• Exploring and implementing new approaches to address current and future challenges, continuously learning and applying new technologies.
• Mentoring junior engineers, providing guidance and support to foster growth and technical excellence within the team.
• Collaborating independently and within cross-functional teams, networking with senior internal and external stakeholders.

Why you'll love this role

• Opportunity to work on cutting-edge projects and technologies.
• Collaborative and dynamic work environment.
• Professional growth and development opportunities.
• Recognition and rewards for outstanding performance.
• Comprehensive benefits and compensation package.

What you'll need to succeed

• Strong technical skills and knowledge in digital design, verification, and prototyping.
• Excellent problem-solving and debugging skills.
• Strong communication and collaboration skills.
• Ability to work independently and as part of a team.
• Adaptability and flexibility in a fast-paced environment.

How to apply

• If you're ready to make a meaningful impact and help shape the next generation of prototyping systems, Synopsys is the place for you.
• Apply now to join our team of talented engineers and contribute to the development of industry-leading prototyping solutions.

Benefits

• Comprehensive medical and healthcare plans that work for you and your family.
• Time away, including company holidays, ETO, and FTO programs.
• Family support, including maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
• ESPP, with a 15% discount on Synopsys common stock.
• Retirement plans, varying by region and country.
• Competitive salaries.

How we hire

• We're proud to be an equal opportunities employer and welcome applications from diverse candidates.
• Our hiring process typically involves a phone screen, followed by an interview with the hiring team.
• We're committed to providing a supportive and inclusive work environment, where everyone has the opportunity to grow and succeed.

Join our team

• If you're passionate about innovation and technology, and want to be part of a dynamic and collaborative team, apply now to join Synopsys.
• We can't wait to hear from you!

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What you'll do

• Conducting comprehensive testing on silicon implementations of high-speed analog integrated circuits in a cutting-edge R&D lab environment.
• Reviewing and debugging silicon under test, as well as supporting associated hardware systems to ensure optimal performance.

What you need

• Bachelor’s degree in Electrical Engineering (BSEE) or equivalent technical field with at least 3+ years of industry direct related experience.

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What you'll do

Develop a complete front-to-back end design implementation methodology (RTL to GDSII) using Synopsys' best in class tools and technologies.

Work with leading edge designs and teams to drive the industry best PPA for IP designs.

Evaluate and exercise various aspects of the development flow which may include design for test logic, synthesis, place & route, timing and power (incl. EM/IR) optimization and analysis.

Develop and maintain best in class digital design methodologies, including documentation, scripts, and training materials.

Work as a liaison between EDAG tool and IP design teams.

Continuously improve and refine design processes to enhance efficiency and performance.

What you need

BS or MS in EE with 10+ years of hands-on experience developing high-speed digital IP cores and/or SOCs.

Knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions.

Direct hands-on experience with Fusion Compiler or industry equivalent Synthesis and Place & Route tools.

Ability to facilitate cross-functional collaboration, including fostering innovation, improving communication, and driving results.

Good analysis, debugging, and problem-solving skills.

Solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.

Familiarity with other Synopsys tools (Primetime, PrimePower, RLTA, CoreTools) is a plus.

Working knowledge of high-speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.

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