<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>241e4fcf-3f6</externalid>
      <Title>ASIC Digital Design, Principal Engineer</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and passionate ASIC Digital Design Engineer who thrives in dynamic and collaborative environments. You have a proven track record in RTL design and verification, and you are excited about contributing to cutting-edge technology. With your extensive expertise, you can handle complex and unique issues, often requiring innovative solutions. You are adept at communicating with both internal and external stakeholders, ensuring that your designs meet the highest standards of quality and performance.</p>
<p>What You’ll Be Doing:</p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
<li>Developing and executing comprehensive test plans to verify the functionality and performance of your designs.</li>
<li>Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.</li>
<li>Mentoring junior engineers, providing guidance and support to help them grow their skills and contribute effectively to the team.</li>
<li>Staying up to date with the latest industry trends and technologies, continuously improving your skills and knowledge.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Driving innovation in ASIC design, contributing to the development of cutting-edge technology that shapes the future.</li>
<li>Ensuring the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.</li>
<li>Enhancing the overall quality and performance of Synopsys&#39; products through meticulous design and verification processes.</li>
<li>Collaborating with cross-functional teams to solve complex design challenges, ensuring seamless integration and functionality.</li>
<li>Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement within the team.</li>
<li>Contributing to Synopsys&#39; reputation as a leader in the semiconductor industry through your expertise and innovative solutions.</li>
</ul>
<p>What You’ll Need:</p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design, using industry standard HDLs; Verilog, SystemVerilog.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
<li>Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC design, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).</li>
<li>Broad knowledge of the full digital ASIC and IP development flow, including RTL design, lint, CDC, RDC, synthesis and STA.</li>
<li>Experience with power analysis and RTL level power optimization techniques.</li>
<li>Familiarity with verification languages and methodologies; SystemVerilog, SVA, UVM.</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>A proactive and self-motivated individual who takes initiative and acts independently with minimal oversight.</li>
<li>A strategic thinker with the ability to implement goals that have a direct impact on department results.</li>
<li>A detail-oriented engineer who works meticulously to ensure the highest standards of quality and performance.</li>
<li>A collaborative team player who thrives in dynamic and fast-paced environments.</li>
<li>A lifelong learner who stays up to date with the latest industry trends and continuously seeks to improve their skills and knowledge.</li>
</ul>
<p>The Team You’ll Be A Part Of:</p>
<p>You will be part of a highly skilled and dynamic ASIC Digital Design team focused on delivering high-performance and reliable ASIC solutions. Our team collaborates closely with various departments, including analog design, physical design, and applications engineering, to ensure the seamless integration of all design components. We are committed to continuous learning and improvement, fostering a culture of innovation and excellence.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design, Verilog, SystemVerilog, EDA tools, High-Performance Interface IP protocols, Power analysis, Verification languages and methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It was founded in 1986 and has since grown to become a global company with over 10,000 employees.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/asic-digital-design-principal-engineer/44408/91546981744</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>0478524b-cdb</externalid>
      <Title>ASIC Digital Design, Principal Engineer</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>As a Principal Engineer in ASIC Digital Design, you will lead the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals. You will collaborate closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</p>
<p>Key responsibilities include:</p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems</li>
<li>Collaborating with cross-functional teams to ensure seamless integration of all design components</li>
<li>Developing and executing comprehensive test plans to verify the functionality and performance of your designs</li>
<li>Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency</li>
<li>Mentoring junior engineers, providing guidance and support to help them grow their skills and contribute effectively to the team</li>
</ul>
<p>As a Principal Engineer, you will have a significant impact on the development of cutting-edge technology that shapes the future. You will ensure the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.</p>
<p>To succeed in this role, you will need:</p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification</li>
<li>Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC designs</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders</li>
</ul>
<p>If you are a proactive and self-motivated individual who takes initiative and acts independently with minimal oversight, we encourage you to apply for this exciting opportunity.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>RTL design, EDA tools, High-Performance Interface IP protocols, analytical skills, problem-solving skills, leadership skills, communication skills, collaboration skills</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions for the semiconductor industry.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/munich/asic-digital-design-principal-engineer/44408/92974526576</Applyto>
      <Location>Munich</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>5004de27-21f</externalid>
      <Title>ASIC Digital Verification, Principal Engineer</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and highly skilled ASIC Digital Verification Engineer with a passion for ensuring the highest quality in digital design. You have a deep understanding of verification methodologies and are proficient in using advanced verification tools and techniques. Your expertise allows you to work independently, taking on complex challenges and delivering innovative solutions. You are detail-oriented, with a strong analytical mindset, and can communicate effectively with various stakeholders. Your ability to mentor and lead junior engineers is a testament to your extensive experience in the field. You thrive in a collaborative environment and are committed to continuous learning and improvement.</p>
<p>What You&#39;ll Be Doing:</p>
<ul>
<li>Designing and implementing verification environments to ensure the correctness of Interface IP protocols.</li>
<li>Creating and executing detailed test plans to verify complex ASIC designs.</li>
<li>Developing and maintaining verification IP and testbenches using SystemVerilog and UVM.</li>
<li>Collaborating with design and architecture teams to identify and fix bugs.</li>
<li>Performing functional coverage analysis and driving coverage closure.</li>
<li>Mentoring and guiding junior verification engineers in best practices and methodologies.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Ensuring the delivery of high-quality, reliable ASIC designs that meet customer specifications.</li>
<li>Enhancing the robustness and efficiency of our verification processes and methodologies.</li>
<li>Contributing to the successful launch of Interface IP products, impacting various industries.</li>
<li>Driving innovation and excellence within the verification team.</li>
<li>Improving the overall performance and functionality of Synopsys&#39; IP offerings.</li>
<li>Fostering a culture of continuous improvement and technical excellence.</li>
</ul>
<p>What You&#39;ll Need:</p>
<ul>
<li>Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet.</li>
<li>Proficiency in SystemVerilog and UVM methodologies.</li>
<li>Strong understanding of digital design and verification concepts.</li>
<li>Experience with simulation tools such as VCS, ModelSim, or similar.</li>
<li>Excellent problem-solving skills and attention to detail.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>Detail-oriented with a strong analytical mindset.</li>
<li>Excellent communicator, able to convey complex technical concepts clearly.</li>
<li>Collaborative team player who thrives in a dynamic environment.</li>
<li>Proactive and self-motivated, with a commitment to continuous learning.</li>
<li>Mentor and leader, capable of guiding and developing junior engineers.</li>
</ul>
<p>The Team You&#39;ll Be A Part Of:</p>
<p>You will be part of a highly skilled and motivated verification team focused on delivering cutting-edge Interface IP solutions. The team is dedicated to maintaining the highest standards of quality and performance, working collaboratively to tackle complex verification challenges. You will have the opportunity to work alongside industry experts and contribute to the development of next-generation technologies.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange>$166,000-$249,000</Salaryrange>
      <Skills>ASIC digital verification, Interface IP protocols, SystemVerilog, UVM methodologies, Digital design and verification concepts, Simulation tools (VCS, ModelSim)</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It was founded in 1986 and has since grown to become a global company with over 10,000 employees.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/austin/asic-digital-verification-principal-engineer/44408/93498497008</Applyto>
      <Location>Austin</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>c160f208-ea8</externalid>
      <Title>Principal Engineer, ASIC Digital Design</Title>
      <Description><![CDATA[<p>We are seeking a Principal Engineer, ASIC Digital Design to join our team in Munich, Germany. As a Principal Engineer, you will be responsible for leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital design and verification, RTL design, EDA tools and methodologies, High-Performance Interface IP protocols, Complex design challenges</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. The company&apos;s technology is used to design and develop complex semiconductor solutions, and its products are used by companies around the world to create high-performance, reliable, and power-efficient chips.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/munich/principal-engineer-asic-digital-design/44408/91458064640</Applyto>
      <Location>Munich, Bavaria, Germany</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>0a64aeaf-c20</externalid>
      <Title>ASIC Digital Design, Architect</Title>
      <Description><![CDATA[<p>We are seeking an experienced ASIC Digital Design Engineer to join our team in Dublin. The successful candidate will be responsible for designing and verifying complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Leading the design and verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.</li>
<li>Collaborating closely with cross-functional teams, including analog design, physical design, and applications engineering, to ensure seamless integration of all design components.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital design and verification, with a strong background in RTL design.</li>
<li>Proficiency in using industry-standard EDA tools and methodologies for design and verification.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital design and verification, RTL design, EDA tools and methodologies, High-Performance Interface IP protocols, Complex design challenges</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. The company&apos;s technology is used to design and develop complex semiconductor products, such as chips and systems-on-chip (SoCs). Synopsys&apos; solutions are used by leading companies in the electronics industry to create innovative products that power a wide range of applications, from consumer electronics to data centres and artificial intelligence systems.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/dublin/asic-digital-design-architect/44408/91458064848</Applyto>
      <Location>Dublin</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>2a30b6e4-ca4</externalid>
      <Title>ASIC Verification, Principal Engineer</Title>
      <Description><![CDATA[<p>Opening.</p>
<p><strong>What you&#39;ll do</strong></p>
<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>
<ul>
<li>Designing, implementing and optimizing verification environments to ensure the correctness of Interface IP protocols.</li>
<li>Creating, executing and tracking against detailed test plans to verify complex ASIC designs.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>Extensive experience in ASIC digital verification, specifically with Interface IP protocols, such as PCIe, CXL, DDR, Ethernet, AMBA (CHI, AXI, AHB, APB).</li>
<li>Proficiency in System Verilog, SVA and UVM methodologies.</li>
<li>Strong understanding of digital design and verification concepts.</li>
<li>Familiarity with wider digital ASIC and IP development flow, including RTL design through synthesis.</li>
<li>Experience with simulation tools such as VCS, Model Sim, or similar.</li>
<li>Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.</li>
<li>Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>remote</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC digital verification, Interface IP protocols, System Verilog, SVA, UVM methodologies, Digital design and verification concepts, Simulation tools, Analytical and problem-solving skills, Communication skills, RTL design through synthesis, VCS, Model Sim, or similar</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/reading/asic-verification-principal-engineer/44408/91539646624</Applyto>
      <Location>Reading, United Kingdom</Location>
      <Country></Country>
      <Postedate>2026-02-11</Postedate>
    </job>
  </jobs>
</source>