{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/high-frequency-multi-voltage-designs"},"x-facet":{"type":"skill","slug":"high-frequency-multi-voltage-designs","display":"High-frequency/multi-voltage designs","count":1},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4f7dae70-9ee"},"title":"R&D Engineer, Staff (PD, PnR, CTS)","description":"<p>Join Synopsys as a Staff R&amp;D Engineer in Physical Design (PD), Place and Route (PnR), and Chip Technology Software (CTS). As a member of our Hardware-Analytics and Test (HAT) business unit, you will be part of the SLM Hardware Group (SHG) developing advanced SLM IPs and subsystems.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Design and implement physical design flows for SLM IPs and subsystems, including state-of-the-art SLM Controllers and on-chip Monitors.</li>\n<li>Execute RTL2GDS flows on advanced process nodes (16nm to 3nm and beyond), ensuring robust performance and reliability.</li>\n<li>Perform static timing analysis, synthesis, and layout closure using industry-leading EDA tools, preferably Synopsys PrimeTime, ICC2, Design Compiler, or Fusion Compiler.</li>\n<li>Collaborate with cross-functional teams to integrate soft and mixed-signal IPs, optimize design margins, and address high-frequency, multi-voltage, and low-power requirements.</li>\n<li>Develop and enhance automation scripts (TCL/PERL) to streamline design processes and improve execution efficiency.</li>\n<li>Participate in project planning, execution, and mentoring, supporting both internal teams and external customers with technical expertise and guidance.</li>\n<li>Contribute to the signoff and verification of designs, ensuring compliance with quality and reliability standards.</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the integration and deployment of next-generation SLM products, enabling customers to bring differentiated solutions to market faster and with reduced risk.</li>\n<li>Optimize semiconductor lifecycle management through innovative hardware IP, test, and analytics, enhancing performance, power, area, and yield.</li>\n<li>Drive advancements in chip design and verification methodologies, supporting the evolution of process nodes and IP integration.</li>\n<li>Enhance reliability and scalability of technology products, contributing to breakthroughs in AI, IoT, automotive, and cloud sectors.</li>\n<li>Empower global teams and customers with robust solutions, technical guidance, and effective collaboration.</li>\n<li>Support Synopsys&#39; leadership in the Era of Smart Everything, powering the technologies that shape our connected world.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Strong experience in standard ASIC RTL2GDS physical implementation and signoff flows.</li>\n<li>Hands-on expertise in synthesis, pre-layout STA, post-layout STA, and CTS tools.</li>\n<li>BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience.</li>\n<li>Automation-focused mindset with proven experience in scripting (TCL/PERL) and custom flow development.</li>\n<li>Exposure to soft and mixed-signal IPs, high-frequency/multi-voltage designs, and low-power methodologies.</li>\n<li>Proficiency with EDA tools from any vendor, preferably Synopsys tools (PrimeTime, ICC2, Design Compiler, Fusion Compiler).</li>\n<li>Solid understanding of OCV, POCV, derates, crosstalk, and design margins.</li>\n<li>Experience in layout of digital blocks, timing constraints, STA, and timing closure.</li>\n<li>Experience with PVT-sensors and/or DFT/DFx technologies is a strong plus.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Collaborative and inclusive team player who values diversity and supports others.</li>\n<li>Excellent communicator, able to convey complex technical concepts clearly and effectively.</li>\n<li>Mentor and leader, providing guidance and support to peers and junior engineers.</li>\n<li>Adaptable and innovative, eager to learn and embrace new technologies and methodologies.</li>\n<li>Self-motivated with strong project execution and planning skills.</li>\n<li>Customer-focused, dedicated to delivering high-quality solutions and support.</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You’ll join the rapidly expanding Hardware-Analytics and Test (HAT) business unit as a member of the SLM Hardware Group (SHG). The team is dedicated to developing advanced SLM IPs and subsystems, leveraging expertise in backend and physical design to deliver robust, high-performance solutions.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_4f7dae70-9ee","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/r-and-d-engineer-staff-pd-pnr-cts/44408/93647959680","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL2GDS physical implementation","Synthesis","Static timing analysis","Place and route","Layout closure","Automation scripting","TCL/PERL","EDA tools","Synopsys PrimeTime","ICC2","Design Compiler","Fusion Compiler","Soft and mixed-signal IPs","High-frequency/multi-voltage designs","Low-power methodologies","PVT-sensors","DFT/DFx technologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:12:09.026Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL2GDS physical implementation, Synthesis, Static timing analysis, Place and route, Layout closure, Automation scripting, TCL/PERL, EDA tools, Synopsys PrimeTime, ICC2, Design Compiler, Fusion Compiler, Soft and mixed-signal IPs, High-frequency/multi-voltage designs, Low-power methodologies, PVT-sensors, DFT/DFx technologies"}]}