You are a dynamic engineer with working experience in RTL implementation, DFT, verification, flow automation and understanding of 3DIC solutions and UCIe protocols. You should have a passion for working with the best of the brains in the industry in developing end-to-end solutions and deploying them at our premier customer base. Your technical excellence and analytical skills, coupled with strong communication and interpersonal skills, make you an asset to any team.

Key responsibilities include:

• Working closely with a world-class R&D team, you’ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM) and 3DIC technologies.

• Working closely with customers, you will bring detailed requirements into the factory to enable R&D for strong, robust, and successful product development.

• Working closely with product development team, you will validate an end-to-end solution both internally (before shipment) as well as in customer environment.

• Driving the deployment and smooth execution of SLM solutions into customers’ projects.

• Enabling customers to realize the value of silicon health monitoring in the context of 3DIC systems throughout the lifecycle of silicon bring-up, validation, through in-field operations.

The impact you will have includes enhancing Synopsys’ Silicon Lifecycle Management (SLM) and 3DIC solutions’ IP portfolio and end-to-end solution especially in the growing field of multi-die (3DIC) domain, driving the adoption of Synopsys’ SLM and 3DIC solutions at premier customer base worldwide, and influencing the development of next-generation SLM IPs and solutions.

XML job scraping automation by YubHub

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

An experienced and visionary ASIC Digital Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of protocols such as HBM, DDR, PCIe/CXL, AMBA and its applications. You can define and execute a new architecture for protocols such as UAL (Universal Accelerator Link). You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.

What You’ll Be Doing:

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing design plans for complex digital designs, particularly focusing on HBM, PCIe/CXL and AMBA protocols.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
• Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

The Impact You Will Have:

• Enhancing the reliability and performance of Synopsys’ digital design processes.
• Driving innovations in HBM, PCIe/CXL and AMBA technology, contributing to the development of cutting-edge semiconductor solutions.
• Improving time-to-market for high-performance silicon chips through efficient methodologies.
• Building and nurturing a highly skilled development team, elevating overall project quality.
• Influencing strategic decisions that shape the future of Synopsys’ capabilities.
• Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.

What You’ll Need:

• Extensive experience in ASIC RTL design.
• In-depth knowledge of HBM, PCIe, CXL, AMBA and similar IO protocols and their applications.
• Proficiency in advanced digital design tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Who You Are:

• A visionary leader with a strategic mindset.
• A mentor who fosters talent and encourages innovation.
• A proactive problem solver who thrives in complex environments.
• An effective communicator with the ability to convey technical concepts to a broad audience.
• A team player who values collaboration and diversity.

The Team You’ll Be A Part Of:

You will join a dynamic and innovative team focused on advancing Synopsys' design technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

As a Staff ASIC Digital Design Engineer, you will be part of our R&D Professional team, specializing in mixed-signal ASIC development and supporting HBM/DDR PHY IP customers. You will work with experts in design, implementation, and verification.

Key responsibilities include:

Creating and debugging test benches and test cases Running RTL and gate-level simulations Supporting application engineers and customers on HBM/DDR PHY topics Contributing to technical documentation Driving product improvements based on customer feedback

The ideal candidate will specialize in one of the following, experience in multiple areas would be a bonus:

ASIC RTL design and verification experience Verilog, PERL, TCL, Python skills Static timing analysis and synthesis knowledge Simulation and debugging abilities HBM/DDR protocol experience is an asset

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more details about salary and perks during the hiring process.

XML job scraping automation by YubHub

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You Are:

An experienced and visionary ASIC Digital Verification Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of HBM or PCIe/CXL and its applications. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience.

What You'll Be Doing:

• Defining and developing ASIC RTL design and verification at both chip and block levels.
• Creating and executing verification plans for complex digital designs, particularly focusing on HBM or PCIe/CXL.
• Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
• Utilizing advanced verification methodologies and tools to achieve high-quality verification results.
• Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
• Communicating with internal and external stakeholders to align on project goals and deliverables.

The Impact You Will Have:

• Enhancing the reliability and performance of Synopsys' digital verification processes.
• Driving innovations in HBM or PCIe/CXL technology, contributing to the development of cutting-edge semiconductor solutions.
• Improving time-to-market for high-performance silicon chips through efficient verification methodologies.
• Building and nurturing a highly skilled verification team, elevating overall project quality.
• Influencing strategic decisions that shape the future of Synopsys' verification capabilities.
• Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.

What You'll Need:

• Extensive experience in ASIC RTL design and verification.
• In-depth knowledge of HBM or PCIe protocols and their applications.
• Proficiency in advanced verification tools and methodologies.
• Strong problem-solving skills and the ability to work independently.
• Excellent communication skills for effective collaboration with diverse teams.

Who You Are:

• A team member who encourages innovation.
• A proactive problem solver who thrives in complex environments.
• An effective communicator with the ability to convey technical concepts to a broad audience.
• A team player who values collaboration and diversity.

The Team You'll Be A Part Of:

You will join a dynamic and innovative team focused on advancing Synopsys' verification technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits:

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

• Health & Wellness: Comprehensive medical and healthcare plans that work for you and your family.
• Time Away: In addition to company holidays, we have ETO and FTO Programs.
• Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• ESPP: Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
• Retirement Plans: Save for your future with our retirement plans that vary by region and country.
• Compensation: Competitive salaries.

XML job scraping automation by YubHub

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

13752

Remote Eligible

No

Date Posted

12/16/2025

Responsibilities

• Reviewing Die, package, and PCB physical layout designs
• Modelling, simulating, and verifying high-speed interface performance against specifications
• Participating in the improvement of SI/PI methodology flows
• Collaborating and networking with other teams on task-oriented projects
• Independently driving SI/PI research and development activities

Impact

• Enabling SI/PI sign-off of high-speed interfaces for various Customer SoC/PKG/PCB designs targetting different applications
• Improve SI/PI methodology flows, increasing efficiency and accuracy
• Foster collaboration and innovation across globally distributed teams
• Drive research and development initiatives of next gen IP's (MRDIMM, LPDDR6, HBM4, UCIE) to stay ahead in the industry and offer guidance to our customers
• Support Synopsys' mission to lead in the Era of Pervasive Intelligence

Requirements

• Bachelor's or Master's degree in Electrical or Electronics Engineering
• Minimum of 8 years of relevant experience
• Proficient in Transmission line theory and time/frequency-domain analysis
• Experienced with SPICE and familiar with 3D field solvers
• Conversant with working of DDR, HBM, UCIE and PCIe/Ethernet interfaces
• Good verbal and written English communication skills
• Experience in scripting languages such as Python and TCL is a plus
• Familiarity with both Windows and Linux operating systems

Who You Are

You are a proactive and innovative engineer who thrives in a collaborative environment. You have a strong technical background and excellent problem-solving skills. Your ability to communicate effectively and work well with diverse teams makes you an asset to any project. You are dedicated to continuous learning and development, and your passion for technology drives you to stay ahead of industry trends. You are adaptable, detail-oriented, and committed to delivering high-quality results.

Team

You will be working with a group of highly-skilled, supportive, and globally spread-out teams. Our team is dedicated to driving innovation and excellence in SIPI analysis of high speed interface IP's. We value collaboration, continuous learning, and a can-do attitude. Together, we strive to develop the most advanced technologies and deliver exceptional results for our clients.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub

They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Date posted: 03/09/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect.

Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and accomplished digital design engineer with an unyielding drive for excellence.

You thrive in technically challenging environments, where your deep understanding of RTL design and system architecture allows you to craft innovative solutions for complex problems.

With a solid foundation in electrical engineering or VLSI, you have accumulated over five years of hands-on experience in designing and implementing ASIC solutions, particularly focusing on high-performance protocols such as DDR PHY, PCIe, USB, or HBM.

Your expertise extends beyond individual contribution—you are equally comfortable leading and mentoring small design teams, fostering an environment of collaboration and shared learning.

What You’ll Be Doing:

• Lead and Drive all aspects of complete IP Design execution from start to end.

• Architecting, designing, and implementing state-of-the-art RTL for the next-generation high-performance DDR PHY and related IP cores.

• Translating standard and functional specifications into detailed architecture, micro-architecture, and design documentation for medium- to high-complexity features.

• Contributing as an individual designer and also lead other engineers in —handling RTL coding, lint/CDC analysis, synthesis, debug, and test plan development.

• Collaborating with global teams across multiple sites, ensuring cohesive project execution and knowledge sharing.

• Lead and mentor teams of RTL designers, providing technical guidance and fostering professional development.

• Engaging in continuous process improvement, proposing and implementing enhancements to design flows and methodologies.

• Troubleshooting and resolving design and verification issues, ensuring robust and high-quality deliverables.

The Impact You Will Have:

• Directly contributing to the design and delivery of high-performance IP cores that power industry-leading semiconductor solutions worldwide.

• Elevating Synopsys’ reputation for technical excellence and innovation in the IP design space.

• Accelerating the adoption of advanced protocols and interfaces in cutting-edge technologies.

• Enabling customers to achieve faster time-to-market and superior silicon performance.

• Mentoring and uplifting team members, fostering a culture of knowledge sharing and technical growth.

• Driving continuous improvement in design methodologies, enhancing efficiency and product quality.

• Supporting Synopsys’ mission to remain at the forefront of the Era of Pervasive Intelligence through breakthrough silicon solutions.

What You’ll Need:

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related discipline.

• 10+ years of relevant industry experience in ASIC digital design, with a focus on protocols like DDR, PCIe, USB, or HBM.

• Past experience of leading IP deign projects, team.

• In-depth experience with RTL coding in Verilog/SystemVerilog and simulation tools for ASIC design.

• Strong command of design flows, including lint, CDC, synthesis, static timing analysis, and formal verification.

• Hands-on expertise in architecting and implementing control path-oriented designs (e.g., asynchronous FIFOs, DMA, SPRAM/DPRAM interfaces).

• Familiarity with scripting languages such as Perl or Shell—an advantage.

• Demonstrated ability to technically lead or mentor small teams of engineers.

Who You Are:

• A collaborative team player who thrives in a multi-site, multicultural environment.

• An effective communicator, able to translate complex technical concepts for diverse audiences.

• A proactive problem-solver with strong analytical and troubleshooting skills.

• Self-motivated, showing high initiative and ownership of responsibilities.

• Adaptable and eager to learn, always seeking opportunities for personal and professional growth.

• Committed to fostering a positive, inclusive, and innovative team culture.

The Team You’ll Be A Part Of:

You will join the R&D Solutions Group at our Bengaluru Design Center, a dynamic and diverse team dedicated to the design and development of industry-leading DesignWare IP cores.

As a Technical Individual Contributor, you will collaborate with global experts in a multi-site environment, contributing to technically challenging projects that push the boundaries of silicon design.

The team values innovation, continuous learning, and the sharing of knowledge, offering ample opportunities for growth and leadership.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world.

We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day.

We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

XML job scraping automation by YubHub

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a skilled and passionate engineer with expertise in system design, embedded firmware, digital design, and verification with over 8+ years of experience. You are a skilled engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry. You value collaboration and mentorship, welcoming opportunities to both learn from and share knowledge with your peers. Your experience with memory interface protocols such as DDR, LPDDR and HBM enables you to quickly contribute to our next-generation solutions.

Technical knowledge in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results. You are passionate about right first-time development, ensuring traceability of all verification requirements and covering the whole ecosystem of Controller and PHY.

You bring knowledge of system, digital, firmware design, high-speed memory interface skills. Your experience includes delivering "best-in-class" solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows.

What You’ll Be Doing:

• Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs
• Contributing and collaborating with hardware teams to analyze and debug embedded firmware
• Optimizing and developing new PHY training algorithms using system level modeling tools
• Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity
• Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support
• Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals
• Reproducing silicon failures on FPGA/Emulation to identify root causes
• Fostering technical excellence and knowledge sharing across the organization.

The Impact You Will Have:

• Enhancing cross-functional collaboration to improve product quality and end customer satisfaction.
• Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up
• Standardizing and optimizing workflows to increase efficiency and compliance.
• Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration.
• Directly impact customer success by providing guidance, technical support, and innovative solutions.
• Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.

What You’ll Need:

• 8+ years of experience in Firmware, ASIC design, verification, system validation, and technical roles.
• Be results driven
• Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment.
• Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.
• In-depth knowledge of system-level validation for high-speed interface PHY
• Proven track record of working cross-functionally and driving issues to closure
• Knowledge of mixed-signal design
• Experience in working in cross-functional collaborations
• Be an excellent communicator and a beacon for change

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity:

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

XML job scraping automation by YubHub

What you'll do

• Leading and managing a team of ASIC Digital Verification engineers, providing guidance and mentorship;
• Creating and maintaining testbenches using SystemVerilog and UVM methodologies;

What you need

• Extensive experience in ASIC digital verification, particularly with HBM (or DDR/LPDDR) protocols;
• Proficiency in SystemVerilog, UVM, and other verification tools and methodologies;

XML job scraping automation by YubHub

What you'll do

You will be responsible for developing and delivering RTL designs for High Bandwidth Memory (HBM) PHY IP, working at the intersection of digital, mixed-signal, and analog domains.

• Translating architectural requirements and industry standard specifications into robust, high-performance RTL implementations using SystemVerilog and Verilog.

What you need

• 7-10 years of hands-on experience in RTL design, including significant work on high-speed digital and mixed-signal interfaces.

Why this matters

Drive the development of cutting-edge HBM PHY IP, enabling industry-leading memory bandwidth for next-generation computing systems.

XML job scraping automation by YubHub

What you'll do

• Lead the design and development of high-speed IO, DDR, and HBM interfaces.
• Collaborate with cross-functional teams to drive innovation and deliver high-quality products.
• Develop and maintain technical documentation and presentations.

What you need

• Bachelor's degree in Electrical Engineering or Computer Science.
• 10+ years of experience in analog and mixed-signal design.
• Strong understanding of analog IC architecture and transistor-level circuit design.
• Excellent communication and leadership skills.

Why this matters

• Enhance team efficiency and influence product strategy.
• Deliver innovative solutions that shape the future of semiconductor technology.
• Make a significant impact and drive business growth.

XML job scraping automation by YubHub