ea6a34b3-c1d Staff Memory Layout Engineer We are seeking a Staff Memory Layout Engineer to join our team. As a Staff Memory Layout Engineer, you will be responsible for leading the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels.

What you'll do

  • Lead the physical layout design of advanced memory IP (SRAM, ROM, eDRAM, etc.) at cell, array, and peripheral levels
  • Ensure compliance with foundry process design rules (DRC/LVS) and memory-specific constraints

What you need

  • Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related fields
  • Minimum of 5 years of experience in layout design

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]]> employee staff onsite layout design, foundry process design rules, memory-specific constraints, Custom Compiler, IC Compiler, Virtuoso Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys drives the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. https://careers.synopsys.com https://careers.synopsys.com/job/da-nang/staff-memory-layout-engineer-in-da-nang/44408/91391710096 Da Nang 2026-03-06