5566d11e-802 RTL Design & Verification - Senior Staff Engineer Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.

You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.

You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.

You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.

You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.

To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.

You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.

You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.

Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.

XML job scraping automation by YubHub

]]> full-time senior onsite EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, Unix/Linux environments, debugging and problem-solving skills, digital, analog, and mixed-signal IP/circuit design, 3D-IC standards and semiconductor verification best practices Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys develops and provides electronic design automation (EDA) software and intellectual property (IP) products used in the design and manufacturing of semiconductors. https://careers.synopsys.com https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-senior-staff-engineer/44408/93169653024 Yerevan 2026-04-05 8409e0bb-24a RTL Design & Verification Staff Engineer At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

We are looking for a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will thrive in collaborative environments, bringing together diverse perspectives to solve complex challenges. With a strong foundation in RTL design and verification, you will approach every project with a sense of ownership and a commitment to excellence.

As an effective communicator, you will clearly articulate technical concepts to both internal teams and external customers, fostering strong partnerships and driving innovation. You will be adaptable, self-motivated, and resilient in the face of challenges, always seeking opportunities to learn and grow.

Your responsibilities will include designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance. You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.

You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies. You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

The impact you will have includes accelerating the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions. You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy.

You will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will have 5+ years of hands-on experience in RTL design and verification. You will be proficient in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.

You will be an analytical and critical thinker with a detail-oriented approach. You will be an effective communicator, comfortable collaborating across teams and with customers. You will be self-motivated and proactive in seeking solutions and driving projects forward.

You will join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions.

XML job scraping automation by YubHub

]]> full-time staff onsite RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys is a leading provider of electronic design automation (EDA) software and services for the semiconductor and electronics industries. https://careers.synopsys.com https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-staff-engineer/44408/93169652816 Yerevan 2026-04-05 07d0d6b0-9ac RTL Design & Verification Engineer (R&D Engineering, Sr Engineer) We are seeking a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will be responsible for designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.

What you'll do

  • Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
  • Developing comprehensive test cases to ensure robust product functionality and performance.

What you need

  • BS/MS in Computer Science, Electrical Engineering, or related field.
  • 5 years of hands-on experience in RTL design and verification.

XML job scraping automation by YubHub

]]> employee senior onsite RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, digital, analog, mixed-signal IP/circuit design, 3D-IC standards, semiconductor verification best practices Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. https://careers.synopsys.com https://careers.synopsys.com/job/bengaluru/rtl-design-and-verification-engineer-r-and-d-engineering-sr-engineer/44408/90568184224 Bengaluru 2026-03-06 1e32ec8b-15e R&D Engineering, Sr Staff Engineer (RTL Design & Verification) Opening. This role exists to drive the development of industry-leading Silicon Lifecycle Management IPs that power the world's top technology companies.

What you'll do

You will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.

  • Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
  • Developing comprehensive test cases to ensure robust product functionality and performance.
  • Collaborating with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.
  • Staying current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.
  • Contributing to the improvement of verification methodologies and automation flows.
  • Documenting design specifications, verification plans, and results to ensure transparency and repeatability.
  • Participating in code reviews and technical discussions to drive innovation and continuous improvement.

What you need

  • BS/MS in Computer Science, Electrical Engineering, or related field.
  • 8+ years of hands-on experience in RTL design and verification.
  • Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.
  • Experience working in Unix/Linux environments.
  • Strong debugging and problem-solving skills, especially in complex chip design environments.
  • Excellent written and verbal communication skills in English.
  • Knowledge of digital, analog, and mixed-signal IP/circuit design (a plus).
  • Familiarity with 3D-IC standards and semiconductor verification best practices (desirable).

XML job scraping automation by YubHub

]]> full-time senior onsite RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, Unix/Linux environments, Digital, analog, and mixed-signal IP/circuit design, 3D-IC standards and semiconductor verification best practices Engineering Technology Synopsys https://logos.yubhub.co/careers.synopsys.com.png Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. https://careers.synopsys.com https://careers.synopsys.com/job/bengaluru/r-and-d-engineering-sr-staff-engineer-rtl-design-and-verification/44408/91089467920 Bengaluru 2026-01-28