{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/floorplanning"},"x-facet":{"type":"skill","slug":"floorplanning","display":"Floorplanning","count":5},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_41cabece-785"},"title":"Layout Design, Sr Supervisor","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You are a visionary leader and seasoned layout design professional, passionate about advancing the frontiers of semiconductor technology. With over eight years of hands-on experience, you thrive in dynamic environments where innovation and technical excellence are paramount.</p>\n<p>You possess a deep understanding of deep submicron effects, advanced floorplanning techniques, and process technologies like CMOS, FinFET, and GAA at 7nm and below. Your expertise extends to layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, and IO frame and pitch requirements.</p>\n<p>You are adept at leading multi-disciplinary teams, creating an environment of accountability, ownership, and growth, while mentoring junior engineers and empowering senior team members to excel.</p>\n<p>You value diversity and inclusion, fostering a culture where every voice is heard and respected. Your collaborative approach ensures seamless cross-functional coordination, and you have a knack for translating complex technical requirements into actionable project plans.</p>\n<p>Your communication skills,both written and verbal,enable you to engage effectively with stakeholders at all levels. You are motivated by the opportunity to contribute to high-impact projects, drive innovation in DDR/HBM PHY IP layout, and deliver differentiated products that shape the industry.</p>\n<p>If you are ready to lead, inspire, and make a lasting impact, Synopsys is the place for you.</p>\n<p>Leading the development of next-generation DDR/HBM IP layouts, driving technical innovation and quality excellence.</p>\n<p>Mentoring and managing a team of layout engineers, fostering growth and maximizing individual and team potential.</p>\n<p>Developing and maintaining project schedules, ensuring timely delivery while balancing technical and resource constraints.</p>\n<p>Collaborating cross-functionally with design, verification, and IP teams to align on project requirements and execution.</p>\n<p>Providing subject matter expertise in high-speed DDR/HBM IP layout, including floorplanning, layout reviews, and quality checks.</p>\n<p>Executing layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and IO requirement analysis.</p>\n<p>Supporting layout automation through scripting and tool enhancement, optimizing efficiency and productivity.</p>\n<p>Acting as an advisor to resolve project challenges and guide teams towards innovative solutions.</p>\n<p>Accelerating the integration of advanced capabilities into SoCs, helping customers achieve unique performance, power, and size targets.</p>\n<p>Reducing time-to-market and risk for differentiated products through robust layout design and technical leadership.</p>\n<p>Driving continuous improvement in layout methodologies and quality standards across cross-functional teams.</p>\n<p>Empowering your team to deliver high-performance DDR/HBM PHY IPs that set industry benchmarks.</p>\n<p>Fostering a collaborative, inclusive work environment that values innovation, accountability, and diversity.</p>\n<p>Contributing to Synopsys’ reputation as the provider of the world’s broadest portfolio of silicon IP.</p>\n<p>Shaping the future of chip design and verification technologies through your expertise and leadership.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_41cabece-785","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-supervisor/44408/93269033008","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["deep submicron effects","advanced floorplanning techniques","CMOS","FinFET","GAA","layout matching","ESD","latch-up","PERC","EMIR","DFM","LEF generation","bond-pad layout","IO frame and pitch requirements"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:15.106Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"deep submicron effects, advanced floorplanning techniques, CMOS, FinFET, GAA, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_cc76d9ba-dc2"},"title":"Staff Layout Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Drive layout development for high-speed SerDes physical interfaces and complex analog/mixed-signal CMOS blocks.</li>\n</ul>\n<ul>\n<li>Lead the complete layout design process, including floorplanning, verification, and quality assurance, with a strong emphasis on reliability and manufacturability.</li>\n</ul>\n<ul>\n<li>Port designs across multiple foundry nodes, ensuring optimal performance and compliance with technology-specific requirements.</li>\n</ul>\n<ul>\n<li>Implement advanced techniques for signal integrity, ESD, and latch-up mitigation, such as differential routing, shielding, and biasing.</li>\n</ul>\n<ul>\n<li>Collaborate closely with design, verification, and manufacturing teams to deliver robust and scalable layout solutions.</li>\n</ul>\n<ul>\n<li>Utilize Synopsys EDA tools and scripting languages (TCL, Python) to automate layout tasks and optimize workflow efficiency.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Enable Synopsys customers to achieve higher performance and reliability in their silicon designs.</li>\n</ul>\n<ul>\n<li>Accelerate the time-to-market for cutting-edge semiconductor products by delivering high-quality, manufacturable layouts.</li>\n</ul>\n<ul>\n<li>Enhance the robustness and scalability of Synopsys IP through meticulous attention to detail and innovative design solutions.</li>\n</ul>\n<ul>\n<li>Drive advancements in deep submicron CMOS technology adoption and integration.</li>\n</ul>\n<ul>\n<li>Foster a collaborative environment that supports knowledge sharing, mentorship, and professional growth.</li>\n</ul>\n<ul>\n<li>Support Synopsys’ leadership in chip design and verification by contributing to the development of industry-leading IP blocks.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MSc in Electrical/Computer Engineering (or equivalent).</li>\n</ul>\n<ul>\n<li>Minimum 3 years hands-on experience in analog and mixed-signal CMOS layout, including high-speed SerDes interfaces.</li>\n</ul>\n<ul>\n<li>Deep knowledge of deep submicron CMOS technologies and design for reliability (EM/IR, matching, proximity effects).</li>\n</ul>\n<ul>\n<li>Proficiency in layout floorplanning, porting designs across foundry nodes, and implementing signal integrity and ESD mitigation strategies.</li>\n</ul>\n<ul>\n<li>Experience with custom digital and high-speed digital layout, as well as Synopsys EDA tools.</li>\n</ul>\n<ul>\n<li>Strong skills in UNIX environments, including shell scripting and command-line operations.</li>\n</ul>\n<ul>\n<li>Familiarity with scripting languages such as TCL and Python.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Excellent problem-solving, organizational, and communication skills.</li>\n</ul>\n<ul>\n<li>Self-motivated and proactive, with the ability to work independently and as part of a team.</li>\n</ul>\n<ul>\n<li>Effective collaborator who values diverse perspectives and fosters inclusive teamwork.</li>\n</ul>\n<ul>\n<li>Adaptable and open to new challenges, with a commitment to continuous improvement.</li>\n</ul>\n<ul>\n<li>Detail-oriented with a strong sense of ownership and pride in delivering high-quality work.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15411</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/23/2026</p>\n<p><strong>Alternate Job Titles:</strong></p>\n<ul>\n<li>Staff Applications Engineer, Digital Implementation</li>\n</ul>\n<ul>\n<li>Staff AE – RTL-to-GDS Solutions</li>\n</ul>\n<ul>\n<li>Senior Digital Design Flow Engineer</li>\n</ul>\n<ul>\n<li>Customer Success Engineer – Physical Design</li>\n</ul>\n<ul>\n<li>Staff Field Applications Engineer – EDA</li>\n</ul>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an experienced engineering professional with a passion for digital design flows and a drive to see customers succeed. You thrive at the intersection of deep technical problem-solving and collaborative partnership, always eager to tackle challenges that span RTL handoff to physical signoff. Your expertise in RTL-to-GDS flows allows you to confidently lead technical engagements, while your curiosity and commitment to learning keep you at the forefront of evolving methodologies and tools.</p>\n<p>You are self-driven, organized, and able to independently manage complex projects, always maintaining a strong sense of ownership over deliverables. You communicate clearly and effectively, whether you are guiding customers through best practices, collaborating with R&amp;D, or translating customer requirements into actionable feature requests. Your analytical skills help you quickly understand diverse customer scenarios, and your adaptability enables you to develop innovative solutions for unique challenges.</p>\n<p>You value teamwork and are motivated by the opportunity to influence both customer success and product evolution. You believe in continuous improvement, for yourself and for the solutions you support. If you are eager to make a tangible impact on the next generation of digital design, we invite you to join us.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Serve as the primary technical advisor for customers implementing Synopsys’ RTL-to-GDS (R2G) solution, including synthesis, physical implementation, and signoff flows.</li>\n</ul>\n<ul>\n<li>Lead customer onboarding, technical evaluations, benchmarking, and full production deployments across advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Analyze complex customer challenges and deliver tailored solutions using deep expertise in digital implementation flows.</li>\n</ul>\n<ul>\n<li>Develop and optimize RTL-to-GDS methodologies, including floorplanning, placement, clock tree synthesis, routing, and signoff correlation.</li>\n</ul>\n<ul>\n<li>Collaborate with global Applications Engineering, R&amp;D, and Product Management teams to enhance methodologies and influence tool development.</li>\n</ul>\n<ul>\n<li>Provide technical guidance and best practices to customers while ensuring successful project delivery and adoption of Synopsys tools.</li>\n</ul>\n<ul>\n<li>Troubleshoot and triage tool issues, provide reproducible testcases, and advocate for customer-driven enhancements.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Drive successful adoption and expansion of Synopsys’ digital implementation toolchain across key customer accounts.</li>\n</ul>\n<ul>\n<li>Enable customers to achieve optimal PPA (Power, Performance, Area) and signoff closure on complex projects.</li>\n</ul>\n<ul>\n<li>Serve as the voice of the customer, directly influencing tool enhancements and product roadmap evolution.</li>\n</ul>\n<ul>\n<li>Accelerate customer productivity and innovation by delivering robust methodologies and automation solutions.</li>\n</ul>\n<ul>\n<li>Foster long-term, trusted relationships with customers, contributing to Synopsys’ industry leadership and growth.</li>\n</ul>\n<ul>\n<li>Enhance cross-functional collaboration within Synopsys, driving continuous improvement in product quality and support.</li>\n</ul>\n<ul>\n<li>Champion best practices and knowledge sharing within the Applications Engineering community.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Proven expertise in RTL-to-GDS flows, including digital synthesis (Design Compiler/Fusion Compiler), physical implementation (ICC2/Fusion Compiler), and static timing analysis (PrimeTime).</li>\n</ul>\n<ul>\n<li>Hands-on experience with advanced node design, floorplanning, PPA optimization, and signoff-driven closure.</li>\n</ul>\n<ul>\n<li>Strong proficiency in scripting languages (Tcl, Python, Perl) for flow automation and customization.</li>\n</ul>\n<ul>\n<li>Ability to independently own technical deliverables, lead customer evaluations, and drive production deployments.</li>\n</ul>\n<ul>\n<li>Deep understanding of digital design methodologies, process technology challenges, and EDA tool ecosystems.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Analytical and methodical, able to evaluate diverse customer scenarios and devise effective solutions.</li>\n</ul>\n<ul>\n<li>Exceptional communicator, comfortable engaging with both internal teams and external partners.</li>\n</ul>\n<ul>\n<li>Self-motivated and accountable, thriving with moderate supervision and a high degree of autonomy.</li>\n</ul>\n<ul>\n<li>Collaborative team player, eager to share knowledge and learn from others.</li>\n</ul>\n<ul>\n<li>Customer-focused, energetic, and adaptable to fast-paced, evolving environments.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a dynamic, globally distributed Applications Engineering team at Synopsys, dedicated to driving customer success in digital implementation. Our team works closely with R&amp;D, Product Management, and field engineers to deliver innovative solutions, optimize design flows, and influence product direction. We foster a culture of collaboration, continuous learning, and knowledge sharing, empowering each other to solve complex challenges and achieve excellence for our customers.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p>Back to nav</p>\n<p>Get an idea of what your daily routine **around the office*</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_9a8cc13a-0a3","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/penang/staff-applications-engineer-digital-implementation/44408/92092150640","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL-to-GDS flows","digital synthesis","physical implementation","static timing analysis","advanced node design","floorplanning","PPA optimization","signoff-driven closure","scripting languages","Tcl","Python","Perl","EDA tool ecosystems"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:06:20.254Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Penang, Malaysia"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL-to-GDS flows, digital synthesis, physical implementation, static timing analysis, advanced node design, floorplanning, PPA optimization, signoff-driven closure, scripting languages, Tcl, Python, Perl, EDA tool ecosystems"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_2e9367c2-7d7"},"title":"SerDes IP's Applications Engineering, Sr Staff Engineer","description":"<p>We are seeking a highly motivated and experienced Sr Staff Engineer to join our SerDes IP&#39;s Applications Engineering team. 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