Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nThese engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nYou are a visionary leader and seasoned layout design professional, passionate about advancing the frontiers of semiconductor technology. With over eight years of hands-on experience, you thrive in dynamic environments where innovation and technical excellence are paramount.
\nYou possess a deep understanding of deep submicron effects, advanced floorplanning techniques, and process technologies like CMOS, FinFET, and GAA at 7nm and below. Your expertise extends to layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, and IO frame and pitch requirements.
\nYou are adept at leading multi-disciplinary teams, creating an environment of accountability, ownership, and growth, while mentoring junior engineers and empowering senior team members to excel.
\nYou value diversity and inclusion, fostering a culture where every voice is heard and respected. Your collaborative approach ensures seamless cross-functional coordination, and you have a knack for translating complex technical requirements into actionable project plans.
\nYour communication skills,both written and verbal,enable you to engage effectively with stakeholders at all levels. You are motivated by the opportunity to contribute to high-impact projects, drive innovation in DDR/HBM PHY IP layout, and deliver differentiated products that shape the industry.
\nIf you are ready to lead, inspire, and make a lasting impact, Synopsys is the place for you.
\nLeading the development of next-generation DDR/HBM IP layouts, driving technical innovation and quality excellence.
\nMentoring and managing a team of layout engineers, fostering growth and maximizing individual and team potential.
\nDeveloping and maintaining project schedules, ensuring timely delivery while balancing technical and resource constraints.
\nCollaborating cross-functionally with design, verification, and IP teams to align on project requirements and execution.
\nProviding subject matter expertise in high-speed DDR/HBM IP layout, including floorplanning, layout reviews, and quality checks.
\nExecuting layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and IO requirement analysis.
\nSupporting layout automation through scripting and tool enhancement, optimizing efficiency and productivity.
\nActing as an advisor to resolve project challenges and guide teams towards innovative solutions.
\nAccelerating the integration of advanced capabilities into SoCs, helping customers achieve unique performance, power, and size targets.
\nReducing time-to-market and risk for differentiated products through robust layout design and technical leadership.
\nDriving continuous improvement in layout methodologies and quality standards across cross-functional teams.
\nEmpowering your team to deliver high-performance DDR/HBM PHY IPs that set industry benchmarks.
\nFostering a collaborative, inclusive work environment that values innovation, accountability, and diversity.
\nContributing to Synopsys’ reputation as the provider of the world’s broadest portfolio of silicon IP.
\nShaping the future of chip design and verification technologies through your expertise and leadership.
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\nThese engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nYou Are:
\nYou are a passionate and detail-oriented engineer who thrives in the fast-paced world of advanced semiconductor layout. You possess a deep understanding of analog and mixed-signal CMOS design principles, with a particular focus on high-speed SerDes interfaces. Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.
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\nThe Impact You Will Have:
\nWhat You’ll Need:
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\nYou will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.
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\nYour focus will be in the areas of design planning, floorplanning, place and route, parasitic extraction, signal integrity analysis and prevention, IR drop/EM analysis and physical verification (DRC/LVS).
\nA secondary focus will be in static timing analysis, Low Power Static check and formal verification. You will work as a member of the customer's IC design team, leveraging their experience and Synopsys' best practices to have immediate impact on their current project while transferring valuable knowledge for future projects.
\nYou will interact regularly with customers to identify and eliminate barriers to project success. You will plan and manage delivery of own project-related tasks. You will leverage entire Synopsys team to ensure project success. You will provide feedback to R&D/AE on suggested tool enhancements or issues.
\nYou will work with or as Project Leader to develop technical proposals, working through project life cycle and produce consistently high-quality technical solutions.
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\nThe Event Operations Director will be responsible for developing and executing comprehensive event operations plans aligning with organisational goals. They will collaborate with clients to understand and meet their event expectations operationally, set timelines and milestones for event operations preparation and execution, and create and oversee event budgets ensuring cost-effectiveness.
\nThe role also involves managing a small, highly effective operations team, plus appropriate freelance consultants and suppliers, identifying and securing suitable venues, negotiating contracts and agreements, and managing relationships with vendors, suppliers, and service providers to ensure timely delivery.
\nThe Event Operations Director will oversee all logistical facets including transportation, accommodation, and catering, ensure functionality of event infrastructure like audiovisual equipment and staging, and develop contingency plans to address potential issues.
\nThey will also ensure compliance with all relevant regulations, permits, and licenses, conduct risk assessments and implement safety protocols, coordinate security measures and emergency response plans, and design strategies to enhance attendee satisfaction.
\nThe Event Operations Director will utilise event management software and digital tools to streamline operations, implement solutions such as event apps, registration systems, and virtual platforms, and conduct evaluations to assess performance against objectives.
\nThe ideal candidate will have a minimum of 10 years of professional experience with at least 5 years in a senior event operations role within a commercial conference or exhibition organizer. They will have extensive experience in delivering large-scale events, including complex outdoor builds in the UK, and a proven track record in managing conferences and exhibitions with over 1,000 attendees, 50+ exhibitors, and multiple conference tracks.
\nThe Event Operations Director will have a strong background in procurement, supplier contract negotiations, and budget management, expertise in event design, floorplans, and maximizing attendee experience, and an excellent understanding of outdoor events infrastructure including power, waste, and temporary structures.
\nThey will also have familiarity with health & safety compliances; IOSH/NEBOSH certification preferred, a passion for climate change and sustainability, aiming to reduce carbon footprints through event planning, and strong leadership abilities with a knack for leading large onsite teams.
\nThe Event Operations Director will have outstanding communication and interpersonal skills, a flexible and solution-driven approach to challenges, and the ability to work under pressure and make sound decisions in a fast-paced environment.
\nWhat we offer:
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\nOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nJob Description
\nCategory
\nEngineering
\nHire Type
\nEmployee
\nJob ID
\n15411
\nRemote Eligible
\nNo
\nDate Posted
\n02/23/2026
\nAlternate Job Titles:
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
\nYou Are:
\nYou are an experienced engineering professional with a passion for digital design flows and a drive to see customers succeed. You thrive at the intersection of deep technical problem-solving and collaborative partnership, always eager to tackle challenges that span RTL handoff to physical signoff. Your expertise in RTL-to-GDS flows allows you to confidently lead technical engagements, while your curiosity and commitment to learning keep you at the forefront of evolving methodologies and tools.
\nYou are self-driven, organized, and able to independently manage complex projects, always maintaining a strong sense of ownership over deliverables. You communicate clearly and effectively, whether you are guiding customers through best practices, collaborating with R&D, or translating customer requirements into actionable feature requests. Your analytical skills help you quickly understand diverse customer scenarios, and your adaptability enables you to develop innovative solutions for unique challenges.
\nYou value teamwork and are motivated by the opportunity to influence both customer success and product evolution. You believe in continuous improvement, for yourself and for the solutions you support. If you are eager to make a tangible impact on the next generation of digital design, we invite you to join us.
\nWhat You’ll Be Doing:
\nThe Impact You Will Have:
\nWhat You’ll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nYou’ll join a dynamic, globally distributed Applications Engineering team at Synopsys, dedicated to driving customer success in digital implementation. Our team works closely with R&D, Product Management, and field engineers to deliver innovative solutions, optimize design flows, and influence product direction. We foster a culture of collaboration, continuous learning, and knowledge sharing, empowering each other to solve complex challenges and achieve excellence for our customers.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
\nBenefits
\nAt Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.
\nVisit Benefits Page
\nComprehensive medical and healthcare plans that work for you and your family.
\nIn addition to company holidays, we have ETO and FTO Programs.
\nMaternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
\nPurchase Synopsys common stock at a 15% discount, with a 24 month look-back.
\nSave for your future with our retirement plans that vary by region and country.
\nCompetitive salaries.
\n\\\\ Benefits vary by country and region - check with your recruiter to confirm
\nBack to nav
\nGet an idea of what your daily routine **around the office*
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\nOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nJob Description
\nCategory
\nEngineering
\nHire Type
\nEmployee
\nJob ID
\n15195
\nBase Salary Range
\n$181000-$272000
\nRemote Eligible
\nNo
\nDate Posted
\n02/16/2026
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
\nYou Are:
\nYou are an accomplished engineering leader with a passion for advancing the frontiers of analog mixed-signal technology. With a deep understanding of memory and die-to-die interfaces, you thrive in environments where innovation meets real-world impact. You have a proven track record of architecting high-performance solutions, particularly in the realm of High Bandwidth Memory (HBM) interface design. You are committed to continuous learning, keeping pace with evolving technologies and industry trends. Your communication skills enable you to articulate ideas clearly and work effectively across sites and disciplines. Above all, you are driven by the opportunity to contribute to critical components powering AI systems, knowing your work has a lasting impact on the future of technology.
\nWhat You’ll Be Doing:
\nThe Impact You Will Have:
\nWhat You’ll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nYou’ll join our High Bandwidth Memory interface design team, a group of passionate engineers dedicated to developing best-in-class IP for the world’s most advanced computing systems. Our team collaborates across multiple sites and disciplines, leveraging expertise in analog mixed-signal design, layout, and signal integrity to deliver innovative solutions that power the next generation of AI and high-performance devices.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nWhat you need
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